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-rw-r--r--cpu/arm_cortexa8/mx6/iomux-v3.c2
-rw-r--r--include/asm-arm/arch-mx6/iomux-v3.h2
2 files changed, 2 insertions, 2 deletions
diff --git a/cpu/arm_cortexa8/mx6/iomux-v3.c b/cpu/arm_cortexa8/mx6/iomux-v3.c
index a147c4e..6041a07 100644
--- a/cpu/arm_cortexa8/mx6/iomux-v3.c
+++ b/cpu/arm_cortexa8/mx6/iomux-v3.c
@@ -52,7 +52,7 @@ int mxc_iomux_v3_setup_pad(iomux_v3_cfg_t pad)
if (pad_ctrl & PAD_CTL_LVE) {
/* Set the bit for LVE */
pad_ctrl |= (1 << PAD_CTL_LVE_OFFSET);
- pad_ctrl &= ~(1 << PAD_CTL_LVE);
+ pad_ctrl &= ~(PAD_CTL_LVE);
}
__raw_writel(pad_ctrl, base + pad_ctrl_ofs);
}
diff --git a/include/asm-arm/arch-mx6/iomux-v3.h b/include/asm-arm/arch-mx6/iomux-v3.h
index 4ce38a5..6f33552 100644
--- a/include/asm-arm/arch-mx6/iomux-v3.h
+++ b/include/asm-arm/arch-mx6/iomux-v3.h
@@ -96,7 +96,7 @@ typedef unsigned int iomux_pin_name_t;
/*
* Use to set PAD control
*/
-#define PAD_CTL_LVE_OFFSET (1 << 22)
+#define PAD_CTL_LVE_OFFSET (22)
#define PAD_CTL_LVE (1 << 18)
#define NO_PAD_CTRL (1 << 17)
#define PAD_CTL_HYS (1 << 16)