diff options
84 files changed, 1022 insertions, 1012 deletions
@@ -1,6 +1,7 @@ # # For a description of the syntax of this configuration file, -# see Documentation/kbuild/kconfig-language.txt. +# see the file Documentation/kbuild/kconfig-language.txt in the +# Linux kernel source tree. # mainmenu "U-Boot $UBOOTVERSION Configuration" @@ -17,7 +18,7 @@ config LOCALVERSION string "Local version - append to U-Boot release" help Append an extra string to the end of your U-Boot version. - This will show up on your boot log, for example. + This will show up in your boot log, for example. The string you set here will be appended after the contents of any files with a filename matching localversion* in your object and source tree, in that order. Your total string can @@ -28,11 +29,11 @@ config LOCALVERSION_AUTO default y help This will try to automatically determine if the current tree is a - release tree by looking for git tags that belong to the current + release tree by looking for Git tags that belong to the current top of tree revision. A string of the format -gxxxxxxxx will be added to the localversion - if a git-based tree is found. The string generated by this will be + if a Git-based tree is found. The string generated by this will be appended after any matching localversion* files, and after the value set in CONFIG_LOCALVERSION. @@ -56,7 +57,7 @@ config SYS_MALLOC_F bool "Enable malloc() pool before relocation" default y if DM help - Before relocation memory is very limited on many platforms. Still, + Before relocation, memory is very limited on many platforms. Still, we can provide a small malloc() pool if needed. Driver model in particular needs this to operate, so that it can allocate the initial serial device and any others that are needed. @@ -66,7 +67,7 @@ config SYS_MALLOC_F_LEN depends on SYS_MALLOC_F default 0x400 help - Before relocation memory is very limited on many platforms. Still, + Before relocation, memory is very limited on many platforms. Still, we can provide a small malloc() pool if needed. Driver model in particular needs this to operate, so that it can allocate the initial serial device and any others that are needed. @@ -78,7 +79,7 @@ menuconfig EXPERT This option allows certain base U-Boot options and settings to be disabled or tweaked. This is for specialized environments which can tolerate a "non-standard" U-Boot. - Only use this if you really know what you are doing. + Use this only if you really know what you are doing. if EXPERT config SYS_MALLOC_CLEAR_ON_INIT @@ -95,7 +96,7 @@ if EXPERT Then the boot time can be significantly reduced. Warning: When disabling this, please check if malloc calls, maybe - should be replaced by calloc - if expects zeroed memory. + should be replaced by calloc - if one expects zeroed memory. endif endmenu # General setup @@ -117,10 +118,10 @@ config SPL config SPL_SYS_MALLOC_SIMPLE bool depends on SPL - prompt "Only use malloc_simple functions in the spl" + prompt "Only use malloc_simple functions in the SPL" help Say Y here to only use the *_simple malloc functions from - malloc_simple.c, rather then using the versions from dlmalloc.c + malloc_simple.c, rather then using the versions from dlmalloc.c; this will make the SPL binary smaller at the cost of more heap usage as the *_simple malloc functions do not re-use free-ed mem. diff --git a/arch/arm/cpu/armv8/start.S b/arch/arm/cpu/armv8/start.S index dceedd7..deb44a8 100644 --- a/arch/arm/cpu/armv8/start.S +++ b/arch/arm/cpu/armv8/start.S @@ -201,15 +201,6 @@ ENDPROC(apply_core_errata) WEAK(lowlevel_init) mov x29, lr /* Save LR */ -#ifndef CONFIG_ARMV8_MULTIENTRY -#if defined(CONFIG_GICV2) || defined(CONFIG_GICV3) - /* - * For single-entry systems the lowlevel init is very simple. - */ - ldr x0, =GICD_BASE - bl gic_init_secure -#endif -#else /* CONFIG_ARMV8_MULTIENTRY is set */ #if defined(CONFIG_GICV2) || defined(CONFIG_GICV3) branch_if_slave x0, 1f ldr x0, =GICD_BASE @@ -223,7 +214,6 @@ WEAK(lowlevel_init) ldr x1, =GICC_BASE bl gic_init_secure_percpu #endif -#endif branch_if_master x0, x1, 2f diff --git a/arch/arm/dts/am437x-gp-evm.dts b/arch/arm/dts/am437x-gp-evm.dts index 8e23b96..142bfc5 100644 --- a/arch/arm/dts/am437x-gp-evm.dts +++ b/arch/arm/dts/am437x-gp-evm.dts @@ -573,7 +573,7 @@ bus-width = <4>; pinctrl-names = "default"; pinctrl-0 = <&mmc1_pins>; - cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>; + cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>; }; &mmc3 { diff --git a/arch/arm/dts/am437x-sk-evm.dts b/arch/arm/dts/am437x-sk-evm.dts index 260edb9..927d8d3 100644 --- a/arch/arm/dts/am437x-sk-evm.dts +++ b/arch/arm/dts/am437x-sk-evm.dts @@ -536,7 +536,7 @@ vmmc-supply = <&dcdc4>; bus-width = <4>; - cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>; + cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>; }; &usb2_phy1 { diff --git a/arch/arm/dts/am57xx-beagle-x15.dts b/arch/arm/dts/am57xx-beagle-x15.dts index e424562..38b266a 100644 --- a/arch/arm/dts/am57xx-beagle-x15.dts +++ b/arch/arm/dts/am57xx-beagle-x15.dts @@ -586,7 +586,7 @@ vmmc_aux-supply = <&vdd_3v3>; pbias-supply = <&pbias_mmc_reg>; bus-width = <4>; - cd-gpios = <&gpio6 27 0>; /* gpio 219 */ + cd-gpios = <&gpio6 27 GPIO_ACTIVE_LOW>; /* gpio 219 */ }; &mmc2 { diff --git a/arch/arm/dts/dra7-evm.dts b/arch/arm/dts/dra7-evm.dts index 242fd53..08ef04e 100644 --- a/arch/arm/dts/dra7-evm.dts +++ b/arch/arm/dts/dra7-evm.dts @@ -469,6 +469,11 @@ status = "okay"; vmmc-supply = <&ldo1_reg>; bus-width = <4>; + /* + * SDCD signal is not being used here - using the fact that GPIO mode + * is always hardwired. + */ + cd-gpios = <&gpio6 27 GPIO_ACTIVE_LOW>; }; &mmc2 { diff --git a/arch/arm/dts/dra72-evm.dts b/arch/arm/dts/dra72-evm.dts index fc2d167..205103e 100644 --- a/arch/arm/dts/dra72-evm.dts +++ b/arch/arm/dts/dra72-evm.dts @@ -503,7 +503,7 @@ * SDCD signal is not being used here - using the fact that GPIO mode * is a viable alternative */ - cd-gpios = <&gpio6 27 0>; + cd-gpios = <&gpio6 27 GPIO_ACTIVE_LOW>; }; &mmc2 { diff --git a/arch/arm/dts/socfpga_arria5_socdk.dts b/arch/arm/dts/socfpga_arria5_socdk.dts index 9ac48a1..7265058 100644 --- a/arch/arm/dts/socfpga_arria5_socdk.dts +++ b/arch/arm/dts/socfpga_arria5_socdk.dts @@ -21,7 +21,7 @@ }; aliases { - /* this allow the ethaddr uboot environmnet variable contents + /* this allow the ethaddr uboot environment variable contents * to be added to the gmac1 device tree blob. */ ethernet0 = &gmac1; diff --git a/arch/arm/dts/socfpga_cyclone5_socdk.dts b/arch/arm/dts/socfpga_cyclone5_socdk.dts index da13435..d4df1a1 100644 --- a/arch/arm/dts/socfpga_cyclone5_socdk.dts +++ b/arch/arm/dts/socfpga_cyclone5_socdk.dts @@ -21,7 +21,7 @@ }; aliases { - /* this allow the ethaddr uboot environmnet variable contents + /* this allow the ethaddr uboot environment variable contents * to be added to the gmac1 device tree blob. */ ethernet0 = &gmac1; diff --git a/arch/arm/dts/socfpga_cyclone5_socrates.dts b/arch/arm/dts/socfpga_cyclone5_socrates.dts index 591d96c..d2ab3b3 100644 --- a/arch/arm/dts/socfpga_cyclone5_socrates.dts +++ b/arch/arm/dts/socfpga_cyclone5_socrates.dts @@ -15,6 +15,11 @@ }; aliases { + /* + * This allows the ethaddr uboot environment variable + * contents to be added to the gmac1 device tree blob. + */ + ethernet0 = &gmac1; udc0 = &usb1; }; diff --git a/arch/arm/dts/socfpga_cyclone5_sr1500.dts b/arch/arm/dts/socfpga_cyclone5_sr1500.dts index 32c6aad..739bbb7 100644 --- a/arch/arm/dts/socfpga_cyclone5_sr1500.dts +++ b/arch/arm/dts/socfpga_cyclone5_sr1500.dts @@ -16,7 +16,7 @@ aliases { /* - * This allows the ethaddr uboot environmnet variable + * This allows the ethaddr uboot environment variable * contents to be added to the gmac1 device tree blob. */ ethernet0 = &gmac1; diff --git a/arch/arm/include/asm/arch-am33xx/spl.h b/arch/arm/include/asm/arch-am33xx/spl.h index 43401d0..f744ab0 100644 --- a/arch/arm/include/asm/arch-am33xx/spl.h +++ b/arch/arm/include/asm/arch-am33xx/spl.h @@ -56,8 +56,9 @@ #define BOOT_DEVICE_MMC1 0x07 #define BOOT_DEVICE_MMC2 0x08 #define BOOT_DEVICE_SPI 0x0A +#define BOOT_DEVICE_USB 0x0D #define BOOT_DEVICE_UART 0x41 -#define BOOT_DEVICE_USB 0x45 +#define BOOT_DEVICE_USBETH 0x45 #define BOOT_DEVICE_CPGMAC 0x47 #define MMC_BOOT_DEVICES_START BOOT_DEVICE_MMC1 diff --git a/arch/m68k/cpu/mcf523x/start.S b/arch/m68k/cpu/mcf523x/start.S index 8a23e72..1702f98 100644 --- a/arch/m68k/cpu/mcf523x/start.S +++ b/arch/m68k/cpu/mcf523x/start.S @@ -141,8 +141,12 @@ _start: move.l #__got_start, %a5 /* put relocation table address to a5 */ - bsr cpu_init_f /* run low-level CPU init code (from flash) */ - bsr board_init_f /* run low-level board init code (from flash) */ + /* run low-level CPU init code (from flash) */ + move.l #cpu_init_f, %a1 + jsr (%a1) + /* run low-level board init code (from flash) */ + move.l #board_init_f, %a1 + jsr (%a1) /* board_init_f() does not return */ diff --git a/arch/m68k/cpu/mcf52x2/start.S b/arch/m68k/cpu/mcf52x2/start.S index 8a59496..4af691f 100644 --- a/arch/m68k/cpu/mcf52x2/start.S +++ b/arch/m68k/cpu/mcf52x2/start.S @@ -198,8 +198,12 @@ _after_flashbar_copy: move.l #__got_start, %a5 /* put relocation table address to a5 */ - bsr cpu_init_f /* run low-level CPU init code (from flash) */ - bsr board_init_f /* run low-level board init code (from flash) */ + /* run low-level CPU init code (from flash) */ + move.l #cpu_init_f, %a1 + jsr (%a1) + /* run low-level board init code (from flash) */ + move.l #board_init_f, %a1 + jsr (%a1) /* board_init_f() does not return */ diff --git a/arch/m68k/cpu/mcf532x/start.S b/arch/m68k/cpu/mcf532x/start.S index 3b9ede0..131ad6e 100644 --- a/arch/m68k/cpu/mcf532x/start.S +++ b/arch/m68k/cpu/mcf532x/start.S @@ -155,8 +155,12 @@ _start: move.l #__got_start, %a5 /* put relocation table address to a5 */ - bsr cpu_init_f /* run low-level CPU init code (from flash) */ - bsr board_init_f /* run low-level board init code (from flash) */ + /* run low-level CPU init code (from flash) */ + move.l #cpu_init_f, %a1 + jsr (%a1) + /* run low-level board init code (from flash) */ + move.l #board_init_f, %a1 + jsr (%a1) /* board_init_f() does not return */ diff --git a/arch/m68k/cpu/mcf5445x/start.S b/arch/m68k/cpu/mcf5445x/start.S index ae261b1..f50f147 100644 --- a/arch/m68k/cpu/mcf5445x/start.S +++ b/arch/m68k/cpu/mcf5445x/start.S @@ -664,8 +664,12 @@ _start: move.l #__got_start, %a5 /* put relocation table address to a5 */ - bsr cpu_init_f /* run low-level CPU init code (from flash) */ - bsr board_init_f /* run low-level board init code (from flash) */ + /* run low-level CPU init code (from flash) */ + move.l #cpu_init_f, %a1 + jsr (%a1) + /* run low-level board init code (from flash) */ + move.l #board_init_f, %a1 + jsr (%a1) /* board_init_f() does not return */ diff --git a/arch/mips/lib/bootm.c b/arch/mips/lib/bootm.c index eed159c..aa0475a 100644 --- a/arch/mips/lib/bootm.c +++ b/arch/mips/lib/bootm.c @@ -9,6 +9,7 @@ #include <image.h> #include <fdt_support.h> #include <asm/addrspace.h> +#include <asm/io.h> DECLARE_GLOBAL_DATA_PTR; @@ -252,10 +253,10 @@ static int boot_reloc_fdt(bootm_headers_t *images) #endif } -int arch_fixup_memory_node(void *blob) +int arch_fixup_fdt(void *blob) { #if CONFIG_IS_ENABLED(MIPS_BOOT_FDT) && CONFIG_IS_ENABLED(OF_LIBFDT) - u64 mem_start = 0; + u64 mem_start = virt_to_phys((void *)gd->bd->bi_memstart); u64 mem_size = gd->ram_size; return fdt_fixup_memory_banks(blob, &mem_start, &mem_size, 1); diff --git a/arch/sandbox/Kconfig b/arch/sandbox/Kconfig index 25e316c..a8a90cb 100644 --- a/arch/sandbox/Kconfig +++ b/arch/sandbox/Kconfig @@ -7,6 +7,9 @@ config SYS_ARCH config SYS_BOARD default "sandbox" +config SYS_CPU + default "sandbox" + config SYS_CONFIG_NAME default "sandbox" diff --git a/board/dave/common/flash.c b/board/dave/common/flash.c deleted file mode 100644 index f05adf9..0000000 --- a/board/dave/common/flash.c +++ /dev/null @@ -1,691 +0,0 @@ -/* - * (C) Copyright 2001 - * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <common.h> -#include <asm/processor.h> - -flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */ - -/*----------------------------------------------------------------------- - * Functions - */ -static int write_word (flash_info_t *info, ulong dest, ulong data); - -/*----------------------------------------------------------------------- - */ -static void flash_get_offsets (ulong base, flash_info_t *info) -{ - int i; - short n; - - /* set up sector start address table */ - if (((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) || - ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM640U)) { - for (i = 0; i < info->sector_count; i++) - info->start[i] = base + (i * 0x00010000); - } else if (((info->flash_id & FLASH_TYPEMASK) == FLASH_AMDL322B) || - ((info->flash_id & FLASH_TYPEMASK) == FLASH_AMDL323B) || - ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM320B) || - ((info->flash_id & FLASH_TYPEMASK) == FLASH_AMDL324B)) { - /* set sector offsets for bottom boot block type */ - for (i=0; i<8; ++i) { /* 8 x 8k boot sectors */ - info->start[i] = base; - base += 8 << 10; - } - while (i < info->sector_count) { /* 64k regular sectors */ - info->start[i] = base; - base += 64 << 10; - ++i; - } - } else if (((info->flash_id & FLASH_TYPEMASK) == FLASH_AMDL322T) || - ((info->flash_id & FLASH_TYPEMASK) == FLASH_AMDL323T) || - ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM320T) || - ((info->flash_id & FLASH_TYPEMASK) == FLASH_AMDL324T)) { - /* set sector offsets for top boot block type */ - base += info->size; - i = info->sector_count; - for (n=0; n<8; ++n) { /* 8 x 8k boot sectors */ - base -= 8 << 10; - --i; - info->start[i] = base; - } - while (i > 0) { /* 64k regular sectors */ - base -= 64 << 10; - --i; - info->start[i] = base; - } - } else { - if (info->flash_id & FLASH_BTYPE) { - /* set sector offsets for bottom boot block type */ - info->start[0] = base + 0x00000000; - info->start[1] = base + 0x00004000; - info->start[2] = base + 0x00006000; - info->start[3] = base + 0x00008000; - for (i = 4; i < info->sector_count; i++) { - info->start[i] = base + (i * 0x00010000) - 0x00030000; - } - } else { - /* set sector offsets for top boot block type */ - i = info->sector_count - 1; - info->start[i--] = base + info->size - 0x00004000; - info->start[i--] = base + info->size - 0x00006000; - info->start[i--] = base + info->size - 0x00008000; - for (; i >= 0; i--) { - info->start[i] = base + i * 0x00010000; - } - } - } -} - -/*----------------------------------------------------------------------- - */ -void flash_print_info (flash_info_t *info) -{ - int i; - int k; - int size; - int erased; - volatile unsigned long *flash; - - if (info->flash_id == FLASH_UNKNOWN) { - printf ("missing or unknown FLASH type\n"); - return; - } - - switch (info->flash_id & FLASH_VENDMASK) { - case FLASH_MAN_AMD: printf ("AMD "); break; - case FLASH_MAN_FUJ: printf ("FUJITSU "); break; - case FLASH_MAN_SST: printf ("SST "); break; - case FLASH_MAN_STM: printf ("ST "); break; - default: printf ("Unknown Vendor "); break; - } - - switch (info->flash_id & FLASH_TYPEMASK) { - case FLASH_AM400B: printf ("AM29LV400B (4 Mbit, bottom boot sect)\n"); - break; - case FLASH_AM400T: printf ("AM29LV400T (4 Mbit, top boot sector)\n"); - break; - case FLASH_AM800B: printf ("AM29LV800B (8 Mbit, bottom boot sect)\n"); - break; - case FLASH_AM800T: printf ("AM29LV800T (8 Mbit, top boot sector)\n"); - break; - case FLASH_AM160B: printf ("AM29LV160B (16 Mbit, bottom boot sect)\n"); - break; - case FLASH_AM160T: printf ("AM29LV160T (16 Mbit, top boot sector)\n"); - break; - case FLASH_AM320T: printf ("AM29LV320T (32 M, top sector)\n"); - break; - case FLASH_AM320B: printf ("AM29LV320B (32 M, bottom sector)\n"); - break; - case FLASH_AMDL322T: printf ("AM29DL322T (32 M, top sector)\n"); - break; - case FLASH_AMDL322B: printf ("AM29DL322B (32 M, bottom sector)\n"); - break; - case FLASH_AMDL323T: printf ("AM29DL323T (32 M, top sector)\n"); - break; - case FLASH_AMDL323B: printf ("AM29DL323B (32 M, bottom sector)\n"); - break; - case FLASH_AM640U: printf ("AM29LV640D (64 M, uniform sector)\n"); - break; - case FLASH_SST800A: printf ("SST39LF/VF800 (8 Mbit, uniform sector size)\n"); - break; - case FLASH_SST160A: printf ("SST39LF/VF160 (16 Mbit, uniform sector size)\n"); - break; - case FLASH_STMW320DT: printf ("M29W320DT (32 M, top sector)\n"); - break; - default: printf ("Unknown Chip Type\n"); - break; - } - - printf (" Size: %ld MB in %d Sectors\n", - info->size >> 20, info->sector_count); - - printf (" Sector Start Addresses:"); - for (i=0; i<info->sector_count; ++i) { -#ifdef CONFIG_SYS_FLASH_EMPTY_INFO - /* - * Check if whole sector is erased - */ - if (i != (info->sector_count-1)) - size = info->start[i+1] - info->start[i]; - else - size = info->start[0] + info->size - info->start[i]; - erased = 1; - flash = (volatile unsigned long *)info->start[i]; - size = size >> 2; /* divide by 4 for longword access */ - for (k=0; k<size; k++) - { - if (*flash++ != 0xffffffff) - { - erased = 0; - break; - } - } - - if ((i % 5) == 0) - printf ("\n "); - /* print empty and read-only info */ - printf (" %08lX%s%s", - info->start[i], - erased ? " E" : " ", - info->protect[i] ? "RO " : " "); -#else - if ((i % 5) == 0) - printf ("\n "); - printf (" %08lX%s", - info->start[i], - info->protect[i] ? " (RO)" : " "); -#endif - - } - printf ("\n"); - return; -} - -/*----------------------------------------------------------------------- - */ - - -/*----------------------------------------------------------------------- - */ - -/* - * The following code cannot be run from FLASH! - */ -static ulong flash_get_size (vu_long *addr, flash_info_t *info) -{ - short i; - short n; - CONFIG_SYS_FLASH_WORD_SIZE value; - ulong base = (ulong)addr; - volatile CONFIG_SYS_FLASH_WORD_SIZE *addr2 = (CONFIG_SYS_FLASH_WORD_SIZE *)addr; - - debug("[%s, %d] Entering ...\n", __FUNCTION__, __LINE__); - - /* Write auto select command: read Manufacturer ID */ - addr2[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE)0x00AA00AA; - addr2[CONFIG_SYS_FLASH_ADDR1] = (CONFIG_SYS_FLASH_WORD_SIZE)0x00550055; - addr2[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE)0x00900090; - - value = addr2[CONFIG_SYS_FLASH_READ0]; - - switch (value) { - case (CONFIG_SYS_FLASH_WORD_SIZE)AMD_MANUFACT: - info->flash_id = FLASH_MAN_AMD; - break; - case (CONFIG_SYS_FLASH_WORD_SIZE)FUJ_MANUFACT: - info->flash_id = FLASH_MAN_FUJ; - break; - case (CONFIG_SYS_FLASH_WORD_SIZE)SST_MANUFACT: - info->flash_id = FLASH_MAN_SST; - break; - case (CONFIG_SYS_FLASH_WORD_SIZE)STM_MANUFACT: - info->flash_id = FLASH_MAN_STM; - break; - default: - info->flash_id = FLASH_UNKNOWN; - info->sector_count = 0; - info->size = 0; - return (0); /* no or unknown flash */ - } - - value = addr2[CONFIG_SYS_FLASH_READ1]; /* device ID */ - - switch (value) { - case (CONFIG_SYS_FLASH_WORD_SIZE)AMD_ID_LV400T: - info->flash_id += FLASH_AM400T; - info->sector_count = 11; - info->size = 0x00080000; - break; /* => 0.5 MB */ - - case (CONFIG_SYS_FLASH_WORD_SIZE)AMD_ID_LV400B: - info->flash_id += FLASH_AM400B; - info->sector_count = 11; - info->size = 0x00080000; - break; /* => 0.5 MB */ - - case (CONFIG_SYS_FLASH_WORD_SIZE)AMD_ID_LV800T: - info->flash_id += FLASH_AM800T; - info->sector_count = 19; - info->size = 0x00100000; - break; /* => 1 MB */ - - case (CONFIG_SYS_FLASH_WORD_SIZE)AMD_ID_LV800B: - info->flash_id += FLASH_AM800B; - info->sector_count = 19; - info->size = 0x00100000; - break; /* => 1 MB */ - - case (CONFIG_SYS_FLASH_WORD_SIZE)AMD_ID_LV160T: - info->flash_id += FLASH_AM160T; - info->sector_count = 35; - info->size = 0x00200000; - break; /* => 2 MB */ - - case (CONFIG_SYS_FLASH_WORD_SIZE)AMD_ID_LV160B: - info->flash_id += FLASH_AM160B; - info->sector_count = 35; - info->size = 0x00200000; - break; /* => 2 MB */ - - case (CONFIG_SYS_FLASH_WORD_SIZE)STM_ID_29W320DT: - info->flash_id += FLASH_STMW320DT; - info->sector_count = 67; - info->size = 0x00400000; break; /* => 4 MB */ - - case (CONFIG_SYS_FLASH_WORD_SIZE)AMD_ID_LV320T: - info->flash_id += FLASH_AM320T; - info->sector_count = 71; - info->size = 0x00400000; break; /* => 4 MB */ - - case (CONFIG_SYS_FLASH_WORD_SIZE)AMD_ID_LV320B: - info->flash_id += FLASH_AM320B; - info->sector_count = 71; - info->size = 0x00400000; break; /* => 4 MB */ - - case (CONFIG_SYS_FLASH_WORD_SIZE)AMD_ID_DL322T: - info->flash_id += FLASH_AMDL322T; - info->sector_count = 71; - info->size = 0x00400000; break; /* => 4 MB */ - - case (CONFIG_SYS_FLASH_WORD_SIZE)AMD_ID_DL322B: - info->flash_id += FLASH_AMDL322B; - info->sector_count = 71; - info->size = 0x00400000; break; /* => 4 MB */ - - case (CONFIG_SYS_FLASH_WORD_SIZE)AMD_ID_DL323T: - info->flash_id += FLASH_AMDL323T; - info->sector_count = 71; - info->size = 0x00400000; break; /* => 4 MB */ - - case (CONFIG_SYS_FLASH_WORD_SIZE)AMD_ID_DL323B: - info->flash_id += FLASH_AMDL323B; - info->sector_count = 71; - info->size = 0x00400000; break; /* => 4 MB */ - - case (CONFIG_SYS_FLASH_WORD_SIZE)AMD_ID_LV640U: - info->flash_id += FLASH_AM640U; - info->sector_count = 128; - info->size = 0x00800000; break; /* => 8 MB */ - - case (CONFIG_SYS_FLASH_WORD_SIZE)SST_ID_xF800A: - info->flash_id += FLASH_SST800A; - info->sector_count = 16; - info->size = 0x00100000; - break; /* => 1 MB */ - - case (CONFIG_SYS_FLASH_WORD_SIZE)SST_ID_xF160A: - info->flash_id += FLASH_SST160A; - info->sector_count = 32; - info->size = 0x00200000; - break; /* => 2 MB */ - - default: - info->flash_id = FLASH_UNKNOWN; - return (0); /* => no or unknown flash */ - - } - - /* set up sector start address table */ - if (((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) || - ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM640U)) { - for (i = 0; i < info->sector_count; i++) - info->start[i] = base + (i * 0x00010000); - } else if (((info->flash_id & FLASH_TYPEMASK) == FLASH_AMDL322B) || - ((info->flash_id & FLASH_TYPEMASK) == FLASH_AMDL323B) || - ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM320B) || - ((info->flash_id & FLASH_TYPEMASK) == FLASH_AMDL324B)) { - /* set sector offsets for bottom boot block type */ - for (i=0; i<8; ++i) { /* 8 x 8k boot sectors */ - info->start[i] = base; - base += 8 << 10; - } - while (i < info->sector_count) { /* 64k regular sectors */ - info->start[i] = base; - base += 64 << 10; - ++i; - } - } else if (((info->flash_id & FLASH_TYPEMASK) == FLASH_AMDL322T) || - ((info->flash_id & FLASH_TYPEMASK) == FLASH_AMDL323T) || - ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM320T) || - ((info->flash_id & FLASH_TYPEMASK) == FLASH_AMDL324T)) { - /* set sector offsets for top boot block type */ - base += info->size; - i = info->sector_count; - for (n=0; n<8; ++n) { /* 8 x 8k boot sectors */ - base -= 8 << 10; - --i; - info->start[i] = base; - } - while (i > 0) { /* 64k regular sectors */ - base -= 64 << 10; - --i; - info->start[i] = base; - } - } else if ((info->flash_id & FLASH_TYPEMASK) == FLASH_STMW320DT) { - /* set sector offsets for top boot block type */ - base += info->size; - i = info->sector_count; - /* 1 x 16k boot sector */ - base -= 16 << 10; - --i; - info->start[i] = base; - /* 2 x 8k boot sectors */ - for (n=0; n<2; ++n) { - base -= 8 << 10; - --i; - info->start[i] = base; - } - /* 1 x 32k boot sector */ - base -= 32 << 10; - --i; - info->start[i] = base; - - while (i > 0) { /* 64k regular sectors */ - base -= 64 << 10; - --i; - info->start[i] = base; - } - } else { - if (info->flash_id & FLASH_BTYPE) { - /* set sector offsets for bottom boot block type */ - info->start[0] = base + 0x00000000; - info->start[1] = base + 0x00004000; - info->start[2] = base + 0x00006000; - info->start[3] = base + 0x00008000; - for (i = 4; i < info->sector_count; i++) { - info->start[i] = base + (i * 0x00010000) - 0x00030000; - } - } else { - /* set sector offsets for top boot block type */ - i = info->sector_count - 1; - info->start[i--] = base + info->size - 0x00004000; - info->start[i--] = base + info->size - 0x00006000; - info->start[i--] = base + info->size - 0x00008000; - for (; i >= 0; i--) { - info->start[i] = base + i * 0x00010000; - } - } - } - - /* check for protected sectors */ - for (i = 0; i < info->sector_count; i++) { - /* read sector protection at sector address, (A7 .. A0) = 0x02 */ - /* D0 = 1 if protected */ - addr2 = (volatile CONFIG_SYS_FLASH_WORD_SIZE *)(info->start[i]); - if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) - info->protect[i] = 0; - else - info->protect[i] = addr2[CONFIG_SYS_FLASH_READ2] & 1; - } - - /* - * Prevent writes to uninitialized FLASH. - */ - if (info->flash_id != FLASH_UNKNOWN) { - addr2 = (CONFIG_SYS_FLASH_WORD_SIZE *)info->start[0]; - *addr2 = (CONFIG_SYS_FLASH_WORD_SIZE)0x00F000F0; /* reset bank */ - } - - return (info->size); -} - - -/*----------------------------------------------------------------------- - */ - -int flash_erase (flash_info_t *info, int s_first, int s_last) -{ - volatile CONFIG_SYS_FLASH_WORD_SIZE *addr = (CONFIG_SYS_FLASH_WORD_SIZE *)(info->start[0]); - volatile CONFIG_SYS_FLASH_WORD_SIZE *addr2; - int flag, prot, sect, l_sect; - ulong start, now, last; - int i; - - if ((s_first < 0) || (s_first > s_last)) { - if (info->flash_id == FLASH_UNKNOWN) { - printf ("- missing\n"); - } else { - printf ("- no sectors to erase\n"); - } - return 1; - } - - if (info->flash_id == FLASH_UNKNOWN) { - printf ("Can't erase unknown flash type - aborted\n"); - return 1; - } - - prot = 0; - for (sect=s_first; sect<=s_last; ++sect) { - if (info->protect[sect]) { - prot++; - } - } - - if (prot) { - printf ("- Warning: %d protected sectors will not be erased!\n", - prot); - } else { - printf ("\n"); - } - - l_sect = -1; - - /* Disable interrupts which might cause a timeout here */ - flag = disable_interrupts(); - - /* Start erase on unprotected sectors */ - for (sect = s_first; sect<=s_last; sect++) { - if (info->protect[sect] == 0) { /* not protected */ - addr2 = (CONFIG_SYS_FLASH_WORD_SIZE *)(info->start[sect]); - if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) { - addr[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE)0x00AA00AA; - addr[CONFIG_SYS_FLASH_ADDR1] = (CONFIG_SYS_FLASH_WORD_SIZE)0x00550055; - addr[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE)0x00800080; - addr[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE)0x00AA00AA; - addr[CONFIG_SYS_FLASH_ADDR1] = (CONFIG_SYS_FLASH_WORD_SIZE)0x00550055; - addr2[0] = (CONFIG_SYS_FLASH_WORD_SIZE)0x00500050; /* block erase */ - for (i=0; i<50; i++) - udelay(1000); /* wait 1 ms */ - } else { - if (sect == s_first) { - addr[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE)0x00AA00AA; - addr[CONFIG_SYS_FLASH_ADDR1] = (CONFIG_SYS_FLASH_WORD_SIZE)0x00550055; - addr[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE)0x00800080; - addr[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE)0x00AA00AA; - addr[CONFIG_SYS_FLASH_ADDR1] = (CONFIG_SYS_FLASH_WORD_SIZE)0x00550055; - } - addr2[0] = (CONFIG_SYS_FLASH_WORD_SIZE)0x00300030; /* sector erase */ - } - l_sect = sect; - } - } - - /* re-enable interrupts if necessary */ - if (flag) - enable_interrupts(); - - /* wait at least 80us - let's wait 1 ms */ - udelay (1000); - - /* - * We wait for the last triggered sector - */ - if (l_sect < 0) - goto DONE; - - start = get_timer (0); - last = start; - addr = (CONFIG_SYS_FLASH_WORD_SIZE *)(info->start[l_sect]); - while ((addr[0] & (CONFIG_SYS_FLASH_WORD_SIZE)0x00800080) != (CONFIG_SYS_FLASH_WORD_SIZE)0x00800080) { - if ((now = get_timer(start)) > CONFIG_SYS_FLASH_ERASE_TOUT) { - printf ("Timeout\n"); - return 1; - } - /* show that we're waiting */ - if ((now - last) > 1000) { /* every second */ - putc ('.'); - last = now; - } - } - -DONE: - /* reset to read mode */ - addr = (CONFIG_SYS_FLASH_WORD_SIZE *)info->start[0]; - addr[0] = (CONFIG_SYS_FLASH_WORD_SIZE)0x00F000F0; /* reset bank */ - - printf (" done\n"); - return 0; -} - -/*----------------------------------------------------------------------- - * Copy memory to flash, returns: - * 0 - OK - * 1 - write timeout - * 2 - Flash not erased - */ - -int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) -{ - ulong cp, wp, data; - int i, l, rc; - - wp = (addr & ~3); /* get lower word aligned address */ - - /* - * handle unaligned start bytes - */ - if ((l = addr - wp) != 0) { - data = 0; - for (i=0, cp=wp; i<l; ++i, ++cp) { -#ifdef CONFIG_B2 - data = data | ((*(uchar *)cp)<<(8*i)); -#else - data = (data << 8) | (*(uchar *)cp); -#endif - } - for (; i<4 && cnt>0; ++i) { -#ifdef CONFIG_B2 - data = data | ((*src++)<<(8*i)); -#else - data = (data << 8) | *src++; -#endif - --cnt; - ++cp; - } - for (; cnt==0 && i<4; ++i, ++cp) { -#ifdef CONFIG_B2 - data = data | ((*(uchar *)cp)<<(8*i)); -#else - data = (data << 8) | (*(uchar *)cp); -#endif - } - - if ((rc = write_word(info, wp, data)) != 0) { - return (rc); - } - wp += 4; - } - - /* - * handle word aligned part - */ - while (cnt >= 4) { - data = 0; -#ifdef CONFIG_B2 - data = (*(ulong*)src); - src += 4; -#else - for (i=0; i<4; ++i) { - data = (data << 8) | *src++; - } -#endif - if ((rc = write_word(info, wp, data)) != 0) { - return (rc); - } - wp += 4; - cnt -= 4; - } - - if (cnt == 0) { - return (0); - } - - /* - * handle unaligned tail bytes - */ - data = 0; - for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) { -#ifdef CONFIG_B2 - data = data | ((*src++)<<(8*i)); -#else - data = (data << 8) | *src++; -#endif - --cnt; - } - for (; i<4; ++i, ++cp) { -#ifdef CONFIG_B2 - data = data | ((*(uchar *)cp)<<(8*i)); -#else - data = (data << 8) | (*(uchar *)cp); -#endif - } - - return (write_word(info, wp, data)); -} - -/*----------------------------------------------------------------------- - * Write a word to Flash, returns: - * 0 - OK - * 1 - write timeout - * 2 - Flash not erased - */ -static int write_word (flash_info_t *info, ulong dest, ulong data) -{ - ulong *data_ptr = &data; - volatile CONFIG_SYS_FLASH_WORD_SIZE *addr2 = (CONFIG_SYS_FLASH_WORD_SIZE *)(info->start[0]); - volatile CONFIG_SYS_FLASH_WORD_SIZE *dest2 = (CONFIG_SYS_FLASH_WORD_SIZE *)dest; - volatile CONFIG_SYS_FLASH_WORD_SIZE *data2 = (CONFIG_SYS_FLASH_WORD_SIZE *)data_ptr; - ulong start; - int flag; - int i; - - /* Check if Flash is (sufficiently) erased */ - if ((*((volatile ulong *)dest) & data) != data) { - return (2); - } - /* Disable interrupts which might cause a timeout here */ - flag = disable_interrupts(); - - for (i=0; i<4/sizeof(CONFIG_SYS_FLASH_WORD_SIZE); i++) - { - addr2[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE)0x00AA00AA; - addr2[CONFIG_SYS_FLASH_ADDR1] = (CONFIG_SYS_FLASH_WORD_SIZE)0x00550055; - addr2[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE)0x00A000A0; - - dest2[i] = data2[i]; - - /* re-enable interrupts if necessary */ - if (flag) - enable_interrupts(); - - /* data polling for D7 */ - start = get_timer (0); - while ((dest2[i] & (CONFIG_SYS_FLASH_WORD_SIZE)0x00800080) != - (data2[i] & (CONFIG_SYS_FLASH_WORD_SIZE)0x00800080)) { - if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) { - return (1); - } - } - } - - return (0); -} - -/*----------------------------------------------------------------------- - */ diff --git a/board/ti/am57xx/Kconfig b/board/ti/am57xx/Kconfig index 17745ff..87654f9 100644 --- a/board/ti/am57xx/Kconfig +++ b/board/ti/am57xx/Kconfig @@ -9,6 +9,15 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "am57xx_evm" +config CONS_INDEX + int "UART used for console" + range 1 6 + default 3 + help + The AM57x (and DRA7xx) SoC has a total of 6 UARTs available to it. + Depending on your specific board you may want something other than UART3 + here. + source "board/ti/common/Kconfig" endif diff --git a/board/ti/am57xx/board.c b/board/ti/am57xx/board.c index a5f02e6..1762089 100644 --- a/board/ti/am57xx/board.c +++ b/board/ti/am57xx/board.c @@ -35,6 +35,7 @@ #define board_is_x15() board_ti_is("BBRDX15_") #define board_is_am572x_evm() board_ti_is("AM572PM_") +#define board_is_am572x_idk() board_ti_is("AM572IDK") #ifdef CONFIG_DRIVER_TI_CPSW #include <cpsw.h> @@ -131,9 +132,9 @@ static const struct emif_regs beagle_x15_emif2_ddr3_532mhz_emif_regs = { .sdram_config2 = 0x08000000, .ref_ctrl = 0x000040F1, .ref_ctrl_final = 0x00001035, - .sdram_tim1 = 0xcccf36ab, + .sdram_tim1 = 0xcccf36b3, .sdram_tim2 = 0x308f7fda, - .sdram_tim3 = 0x409f88a8, + .sdram_tim3 = 0x407f88a8, .read_idle_ctrl = 0x00050000, .zq_config = 0x5007190b, .temp_alert_config = 0x00000000, @@ -278,6 +279,8 @@ void do_board_detect(void) bname = "BeagleBoard X15"; else if (board_is_am572x_evm()) bname = "AM572x EVM"; + else if (board_is_am572x_idk()) + bname = "AM572x IDK"; if (bname) snprintf(sysinfo.board_string, SYSINFO_BOARD_NAME_MAX_LEN, @@ -296,6 +299,8 @@ static void setup_board_eeprom_env(void) if (board_is_am572x_evm()) name = "am57xx_evm"; + else if (board_is_am572x_idk()) + name = "am572x_idk"; else printf("Unidentified board claims %s in eeprom header\n", board_ti_get_name()); @@ -343,9 +348,24 @@ void set_muxconf_regs(void) #ifdef CONFIG_IODELAY_RECALIBRATION void recalibrate_iodelay(void) { - __recalibrate_iodelay(core_padconf_array_essential, - ARRAY_SIZE(core_padconf_array_essential), - iodelay_cfg_array, ARRAY_SIZE(iodelay_cfg_array)); + const struct pad_conf_entry *pconf; + const struct iodelay_cfg_entry *iod; + int pconf_sz, iod_sz; + + if (board_is_am572x_idk()) { + pconf = core_padconf_array_essential_am572x_idk; + pconf_sz = ARRAY_SIZE(core_padconf_array_essential_am572x_idk); + iod = iodelay_cfg_array_am572x_idk; + iod_sz = ARRAY_SIZE(iodelay_cfg_array_am572x_idk); + } else { + /* Common for X15/GPEVM */ + pconf = core_padconf_array_essential_x15; + pconf_sz = ARRAY_SIZE(core_padconf_array_essential_x15); + iod = iodelay_cfg_array_x15; + iod_sz = ARRAY_SIZE(iodelay_cfg_array_x15); + } + + __recalibrate_iodelay(pconf, pconf_sz, iod, iod_sz); } #endif @@ -605,6 +625,12 @@ int board_eth_init(bd_t *bis) ctrl_val |= 0x22; writel(ctrl_val, (*ctrl)->control_core_control_io1); + /* The phy address for the AM572x IDK are different than x15 */ + if (board_is_am572x_idk()) { + cpsw_data.slave_data[0].phy_addr = 0; + cpsw_data.slave_data[1].phy_addr = 1; + } + ret = cpsw_register(&cpsw_data); if (ret < 0) printf("Error %d registering CPSW switch\n", ret); diff --git a/board/ti/am57xx/mux_data.h b/board/ti/am57xx/mux_data.h index 3c007b7..b5ea8ad 100644 --- a/board/ti/am57xx/mux_data.h +++ b/board/ti/am57xx/mux_data.h @@ -12,7 +12,7 @@ #include <asm/arch/mux_dra7xx.h> -const struct pad_conf_entry core_padconf_array_essential[] = { +const struct pad_conf_entry core_padconf_array_essential_x15[] = { {GPMC_AD0, (M2 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_ad0.vin3a_d0 */ {GPMC_AD1, (M2 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* gpmc_ad1.vin3a_d1 */ {GPMC_AD2, (M2 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_ad2.vin3a_d2 */ @@ -264,6 +264,222 @@ const struct pad_conf_entry core_padconf_array_essential[] = { {RTCK, (M0 | PIN_INPUT_PULLDOWN)}, /* rtck.rtck */ }; +const struct pad_conf_entry core_padconf_array_essential_am572x_idk[] = { + {GPMC_A0, (M6 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a0.vin4b_d0 */ + {GPMC_A1, (M6 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* gpmc_a1.vin4b_d1 */ + {GPMC_A2, (M6 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a2.vin4b_d2 */ + {GPMC_A3, (M6 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a3.vin4b_d3 */ + {GPMC_A4, (M6 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a4.vin4b_d4 */ + {GPMC_A5, (M6 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* gpmc_a5.vin4b_d5 */ + {GPMC_A6, (M6 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a6.vin4b_d6 */ + {GPMC_A7, (M6 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a7.vin4b_d7 */ + {GPMC_A8, (M6 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* gpmc_a8.vin4b_hsync1 */ + {GPMC_A9, (M6 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a9.vin4b_vsync1 */ + {GPMC_A10, (M6 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a10.vin4b_clk1 */ + {GPMC_A11, (M6 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a11.vin4b_de1 */ + {GPMC_A12, (M6 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a12.vin4b_fld1 */ + {GPMC_A13, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a13.qspi1_rtclk */ + {GPMC_A14, (M1 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* gpmc_a14.qspi1_d3 */ + {GPMC_A15, (M1 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* gpmc_a15.qspi1_d2 */ + {GPMC_A16, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a16.qspi1_d0 */ + {GPMC_A17, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a17.qspi1_d1 */ + {GPMC_A18, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a18.qspi1_sclk */ + {GPMC_A19, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a19.mmc2_dat4 */ + {GPMC_A20, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a20.mmc2_dat5 */ + {GPMC_A21, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a21.mmc2_dat6 */ + {GPMC_A22, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a22.mmc2_dat7 */ + {GPMC_A23, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a23.mmc2_clk */ + {GPMC_A24, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a24.mmc2_dat0 */ + {GPMC_A25, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a25.mmc2_dat1 */ + {GPMC_A26, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a26.mmc2_dat2 */ + {GPMC_A27, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a27.mmc2_dat3 */ + {GPMC_CS1, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_cs1.mmc2_cmd */ + {GPMC_CS2, (M1 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* gpmc_cs2.qspi1_cs0 */ + {VIN1A_D5, (M14 | PIN_INPUT_PULLDOWN)}, /* vin1a_d5.gpio3_9 */ + {VIN1A_D6, (M14 | PIN_INPUT_PULLDOWN)}, /* vin1a_d6.gpio3_10 */ + {VIN1A_D7, (M14 | PIN_INPUT_PULLDOWN)}, /* vin1a_d7.gpio3_11 */ + {VIN1A_D8, (M14 | PIN_INPUT_PULLDOWN)}, /* vin1a_d8.gpio3_12 */ + {VIN1A_D10, (M14 | PIN_INPUT_PULLDOWN)}, /* vin1a_d10.gpio3_14 */ + {VIN1A_D12, (M14 | PIN_INPUT_PULLDOWN)}, /* vin1a_d12.gpio3_16 */ + {VIN1A_D13, (M14 | PIN_INPUT_PULLDOWN)}, /* vin1a_d13.gpio3_17 */ + {VIN1A_D14, (M14 | PIN_INPUT_PULLDOWN)}, /* vin1a_d14.gpio3_18 */ + {VIN1A_D15, (M14 | PIN_INPUT_PULLDOWN)}, /* vin1a_d15.gpio3_19 */ + {VIN1A_D17, (M14 | PIN_INPUT_PULLDOWN)}, /* vin1a_d17.gpio3_21 */ + {VIN1A_D18, (M14 | PIN_INPUT_PULLDOWN)}, /* vin1a_d18.gpio3_22 */ + {VIN1A_D19, (M14 | PIN_INPUT_PULLDOWN)}, /* vin1a_d19.gpio3_23 */ + {VIN1A_D22, (M14 | PIN_INPUT_PULLDOWN)}, /* vin1a_d22.gpio3_26 */ + {VIN2A_CLK0, (M14 | PIN_INPUT_PULLUP)}, /* vin2a_clk0.gpio3_28 */ + {VIN2A_DE0, (M14 | PIN_INPUT_PULLUP)}, /* vin2a_de0.gpio3_29 */ + {VIN2A_FLD0, (M14 | PIN_INPUT_PULLUP)}, /* vin2a_fld0.gpio3_30 */ + {VIN2A_HSYNC0, (M14 | PIN_INPUT_PULLUP)}, /* vin2a_hsync0.gpio3_31 */ + {VIN2A_VSYNC0, (M14 | PIN_INPUT_PULLDOWN)}, /* vin2a_vsync0.gpio4_0 */ + {VIN2A_D0, (M11 | PIN_INPUT_PULLDOWN)}, /* vin2a_d0.pr1_uart0_rxd */ + {VIN2A_D1, (M11 | PIN_INPUT_PULLDOWN)}, /* vin2a_d1.pr1_uart0_txd */ + {VIN2A_D2, (M10 | PIN_INPUT_PULLDOWN)}, /* vin2a_d2.ecap1 */ + {VIN2A_D3, (M14 | PIN_INPUT_PULLDOWN)}, /* vin2a_d3.gpio4_4 */ + {VIN2A_D4, (M14 | PIN_INPUT_PULLDOWN)}, /* vin2a_d4.gpio4_5 */ + {VIN2A_D5, (M13 | PIN_INPUT_PULLDOWN)}, /* vin2a_d5.pr1_pru1_gpo2 */ + {VIN2A_D6, (M11 | PIN_INPUT_PULLDOWN)}, /* vin2a_d6.pr1_mii_mt1_clk */ + {VIN2A_D7, (M11 | PIN_INPUT_PULLDOWN)}, /* vin2a_d7.pr1_mii_mii1_txen */ + {VIN2A_D8, (M11 | PIN_INPUT_PULLDOWN)}, /* vin2a_d8.pr1_mii_mii1_txd3 */ + {VIN2A_D9, (M11 | PIN_INPUT_PULLDOWN)}, /* vin2a_d9.pr1_mii_mii1_txd2 */ + {VIN2A_D10, (M11 | PIN_INPUT_PULLDOWN)}, /* vin2a_d10.pr1_mdio_mdclk */ + {VIN2A_D11, (M11 | PIN_INPUT_PULLDOWN)}, /* vin2a_d11.pr1_mdio_data */ + {VIN2A_D12, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d12.rgmii1_txc */ + {VIN2A_D13, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d13.rgmii1_txctl */ + {VIN2A_D14, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d14.rgmii1_txd3 */ + {VIN2A_D15, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d15.rgmii1_txd2 */ + {VIN2A_D16, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d16.rgmii1_txd1 */ + {VIN2A_D17, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d17.rgmii1_txd0 */ + {VIN2A_D18, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d18.rgmii1_rxc */ + {VIN2A_D19, (M3 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* vin2a_d19.rgmii1_rxctl */ + {VIN2A_D20, (M3 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* vin2a_d20.rgmii1_rxd3 */ + {VIN2A_D21, (M3 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* vin2a_d21.rgmii1_rxd2 */ + {VIN2A_D22, (M3 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* vin2a_d22.rgmii1_rxd1 */ + {VIN2A_D23, (M3 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* vin2a_d23.rgmii1_rxd0 */ + {VOUT1_CLK, (M0 | PIN_OUTPUT)}, /* vout1_clk.vout1_clk */ + {VOUT1_DE, (M0 | PIN_OUTPUT)}, /* vout1_de.vout1_de */ + {VOUT1_FLD, (M14 | PIN_INPUT)}, /* vout1_fld.gpio4_21 */ + {VOUT1_HSYNC, (M0 | PIN_OUTPUT)}, /* vout1_hsync.vout1_hsync */ + {VOUT1_VSYNC, (M0 | PIN_OUTPUT)}, /* vout1_vsync.vout1_vsync */ + {VOUT1_D0, (M0 | PIN_OUTPUT)}, /* vout1_d0.vout1_d0 */ + {VOUT1_D1, (M0 | PIN_OUTPUT)}, /* vout1_d1.vout1_d1 */ + {VOUT1_D2, (M0 | PIN_OUTPUT)}, /* vout1_d2.vout1_d2 */ + {VOUT1_D3, (M0 | PIN_OUTPUT)}, /* vout1_d3.vout1_d3 */ + {VOUT1_D4, (M0 | PIN_OUTPUT)}, /* vout1_d4.vout1_d4 */ + {VOUT1_D5, (M0 | PIN_OUTPUT)}, /* vout1_d5.vout1_d5 */ + {VOUT1_D6, (M0 | PIN_OUTPUT)}, /* vout1_d6.vout1_d6 */ + {VOUT1_D7, (M0 | PIN_OUTPUT)}, /* vout1_d7.vout1_d7 */ + {VOUT1_D8, (M0 | PIN_OUTPUT)}, /* vout1_d8.vout1_d8 */ + {VOUT1_D9, (M0 | PIN_OUTPUT)}, /* vout1_d9.vout1_d9 */ + {VOUT1_D10, (M0 | PIN_OUTPUT)}, /* vout1_d10.vout1_d10 */ + {VOUT1_D11, (M0 | PIN_OUTPUT)}, /* vout1_d11.vout1_d11 */ + {VOUT1_D12, (M0 | PIN_OUTPUT)}, /* vout1_d12.vout1_d12 */ + {VOUT1_D13, (M0 | PIN_OUTPUT)}, /* vout1_d13.vout1_d13 */ + {VOUT1_D14, (M0 | PIN_OUTPUT)}, /* vout1_d14.vout1_d14 */ + {VOUT1_D15, (M0 | PIN_OUTPUT)}, /* vout1_d15.vout1_d15 */ + {VOUT1_D16, (M0 | PIN_OUTPUT)}, /* vout1_d16.vout1_d16 */ + {VOUT1_D17, (M0 | PIN_OUTPUT)}, /* vout1_d17.vout1_d17 */ + {VOUT1_D18, (M0 | PIN_OUTPUT)}, /* vout1_d18.vout1_d18 */ + {VOUT1_D19, (M0 | PIN_OUTPUT)}, /* vout1_d19.vout1_d19 */ + {VOUT1_D20, (M0 | PIN_OUTPUT)}, /* vout1_d20.vout1_d20 */ + {VOUT1_D21, (M0 | PIN_OUTPUT)}, /* vout1_d21.vout1_d21 */ + {VOUT1_D22, (M0 | PIN_OUTPUT)}, /* vout1_d22.vout1_d22 */ + {VOUT1_D23, (M0 | PIN_OUTPUT)}, /* vout1_d23.vout1_d23 */ + {MDIO_MCLK, (M0 | PIN_INPUT_PULLUP)}, /* mdio_mclk.mdio_mclk */ + {MDIO_D, (M0 | PIN_INPUT_PULLUP)}, /* mdio_d.mdio_d */ + {RMII_MHZ_50_CLK, (M13 | PIN_INPUT_PULLDOWN)}, /* RMII_MHZ_50_CLK.pr2_pru1_gpo2 */ + {UART3_RXD, (M11 | PIN_INPUT_PULLDOWN)}, /* uart3_rxd.pr1_mii0_rxdv */ + {UART3_TXD, (M11 | PIN_INPUT_PULLDOWN)}, /* uart3_txd.rp1_mii_mr0_clk */ + {RGMII0_TXC, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_txc.rgmii0_txc */ + {RGMII0_TXCTL, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_txctl.rgmii0_txctl */ + {RGMII0_TXD3, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_txd3.rgmii0_txd3 */ + {RGMII0_TXD2, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_txd2.rgmii0_txd2 */ + {RGMII0_TXD1, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_txd1.rgmii0_txd1 */ + {RGMII0_TXD0, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_txd0.rgmii0_txd0 */ + {RGMII0_RXC, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_rxc.rgmii0_rxc */ + {RGMII0_RXCTL, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_rxctl.rgmii0_rxctl */ + {RGMII0_RXD3, (M0 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* rgmii0_rxd3.rgmii0_rxd3 */ + {RGMII0_RXD2, (M0 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* rgmii0_rxd2.rgmii0_rxd2 */ + {RGMII0_RXD1, (M0 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* rgmii0_rxd1.rgmii0_rxd1 */ + {RGMII0_RXD0, (M0 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* rgmii0_rxd0.rgmii0_rxd0 */ + {USB1_DRVVBUS, (M0 | PIN_INPUT_SLEW)}, /* usb1_drvvbus.usb1_drvvbus */ + {USB2_DRVVBUS, (M0 | PIN_INPUT_SLEW)}, /* usb2_drvvbus.usb2_drvvbus */ + {GPIO6_14, (M14 | PIN_OUTPUT_PULLUP)}, /* gpio6_14.gpio6_14 */ + {GPIO6_15, (M0 | PIN_OUTPUT_PULLUP)}, /* gpio6_15.gpio6_15 */ + {GPIO6_16, (M0 | PIN_INPUT_PULLDOWN)}, /* gpio6_16.gpio6)_16 */ + {XREF_CLK0, (M11 | PIN_INPUT_PULLDOWN)}, /* xref_clk0.pr2_mii1_col */ + {XREF_CLK1, (M11 | PIN_INPUT_PULLDOWN)}, /* xref_clk1.pr2_mii1_crs */ + {XREF_CLK2, (M14 | PIN_INPUT_PULLDOWN)}, /* xref_clk2.i6_19 */ + {XREF_CLK3, (M9 | PIN_INPUT_PULLDOWN)}, /* xref_clk3.clkout3 */ + {MCASP1_ACLKX, (M11 | PIN_INPUT_PULLDOWN)}, /* mcasp1_aclkx.pr2_mdio_mdclk */ + {MCASP1_FSX, (M11 | PIN_INPUT_SLEW)}, /* mcasp1_fsx.pr2_mdio_data */ + {MCASP1_ACLKR, (M14 | PIN_INPUT_PULLUP)}, /* mcasp1_aclkr.gpio5_0 */ + {MCASP1_FSR, (M14 | PIN_INPUT_PULLUP)}, /* mcasp1_fsr.gpio5_1 */ + {MCASP1_AXR0, (M11 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* mcasp1_axr0.pr2_mii0_rxer */ + {MCASP1_AXR1, (M11 | PIN_INPUT_SLEW)}, /* mcasp1_axr1.pr2_mii_mt0_clk */ + {MCASP1_AXR2, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr2.gpio5_4 */ + {MCASP1_AXR3, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr3.gpio5_5 */ + {MCASP1_AXR4, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr4.gpio5_6 */ + {MCASP1_AXR5, (M14 | PIN_OUTPUT_PULLUP)}, /* mcasp1_axr5.gpio5_7 */ + {MCASP1_AXR6, (M14 | PIN_OUTPUT_PULLUP)}, /* mcasp1_axr6.gpio5_8 */ + {MCASP1_AXR7, (M14 | PIN_OUTPUT_PULLUP)}, /* mcasp1_axr7.gpio5_9 */ + {MCASP1_AXR8, (M11 | PIN_INPUT_SLEW)}, /* mcasp1_axr8.pr2_mii0_txen */ + {MCASP1_AXR9, (M11 | PIN_INPUT_SLEW)}, /* mcasp1_axr9.pr2_mii0_txd3 */ + {MCASP1_AXR10, (M11 | PIN_INPUT_SLEW)}, /* mcasp1_axr10.pr2_mii0_txd2 */ + {MCASP1_AXR11, (M11 | PIN_INPUT_SLEW)}, /* mcasp1_axr11.pr2_mii0_txd1 */ + {MCASP1_AXR12, (M11 | PIN_INPUT_SLEW)}, /* mcasp1_axr12.pr2_mii0_txd0 */ + {MCASP1_AXR13, (M11 | PIN_INPUT_SLEW)}, /* mcasp1_axr13.pr2_mii_mr0_clk */ + {MCASP1_AXR14, (M11 | PIN_INPUT_PULLDOWN | SLEWCONTROL)}, /* mcasp1_axr14.pr2_mii0_rxdv */ + {MCASP1_AXR15, (M11 | PIN_INPUT_SLEW)}, /* mcasp1_axr15.pr2_mii0_rxd3 */ + {MCASP2_ACLKX, (M11 | PIN_INPUT_SLEW)}, /* mcasp2_aclkx.pr2_mii0_rxd2 */ + {MCASP2_FSX, (M11 | PIN_INPUT_SLEW)}, /* mcasp2_fsx.pr2_mii0_rxd1 */ + {MCASP2_AXR2, (M11 | PIN_INPUT_SLEW)}, /* mcasp2_axr2.pr2_mii0_rxd0 */ + {MCASP2_AXR3, (M11 | PIN_INPUT_PULLDOWN | SLEWCONTROL)}, /* mcasp2_axr3.pr2_mii0_rxlink */ + {MCASP2_AXR4, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp2_axr4.gpio1_4 */ + {MCASP2_AXR5, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp2_axr5.gpio6_7 */ + {MCASP2_AXR6, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp2_axr6.gpio2_29 */ + {MCASP2_AXR7, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp2_axr7.gpio1_5 */ + {MCASP3_ACLKX, (M11 | PIN_INPUT_PULLDOWN)}, /* mcasp3_aclkx.pr2_mii0_crs */ + {MCASP3_FSX, (M11 | PIN_INPUT_SLEW)}, /* mcasp3_fsx.pr2_mii0_col */ + {MCASP3_AXR0, (M11 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* mcasp3_axr0.pr2_mii1_rxer */ + {MCASP3_AXR1, (M11 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* mcasp3_axr1.pr2_mii1_rxlink */ + {MCASP4_ACLKX, (M2 | PIN_INPUT_PULLDOWN)}, /* mcasp4_aclkx.spi3_sclk */ + {MCASP4_FSX, (M2 | PIN_INPUT_PULLDOWN)}, /* mcasp4_fsx.spi3_d1 */ + {MCASP4_AXR1, (M2 | PIN_INPUT_PULLUP)}, /* mcasp4_axr1.spi3_cs0 */ + {MCASP5_ACLKX, (M13 | PIN_INPUT_PULLDOWN)}, /* mcasp5_aclkx.pr2_pru1_gpo1 */ + {MCASP5_FSX, (M12 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE14)},/* mcasp5_fsx.pr2_pru1_gpi2 */ + {MCASP5_AXR0, (M13 | PIN_INPUT_PULLDOWN)}, /* mcasp5_axr0.pr2_pru1_gpo3 */ + {MCASP5_AXR1, (M13 | PIN_INPUT_PULLDOWN)}, /* mcasp5_axr1.pr2_pru1_gpo4 */ + {GPIO6_10, (M11 | PIN_INPUT_PULLUP)}, /* gpio6_10.pr2_mii_mt1_clk */ + {GPIO6_11, (M11 | PIN_INPUT_PULLUP)}, /* gpio6_11.pr2_mii1_txen */ + {MMC3_CLK, (M11 | PIN_INPUT_PULLUP)}, /* mmc3_clk.pr2_mii1_txd3 */ + {MMC3_CMD, (M11 | PIN_INPUT_PULLUP)}, /* mmc3_cmd.pr2_mii1_txd2 */ + {MMC3_DAT0, (M11 | PIN_INPUT_PULLUP)}, /* mmc3_dat0.pr2_mii1_txd1 */ + {MMC3_DAT1, (M11 | PIN_INPUT_PULLUP)}, /* mmc3_dat1.pr2_mii1_txd0 */ + {MMC3_DAT2, (M11 | PIN_INPUT_PULLUP)}, /* mmc3_dat2.pr2_mii_mr1_clk */ + {MMC3_DAT3, (M11 | PIN_INPUT_PULLDOWN)}, /* mmc3_dat3.pr2_mii1_rxdv */ + {MMC3_DAT4, (M11 | PIN_INPUT_PULLDOWN)}, /* mmc3_dat4.pr2_mii1_rxd3 */ + {MMC3_DAT5, (M11 | PIN_INPUT_PULLDOWN)}, /* mmc3_dat5.pr2_mii1_rxd2 */ + {MMC3_DAT6, (M11 | PIN_INPUT_PULLDOWN)}, /* mmc3_dat6.pr2_mii1_rxd1 */ + {MMC3_DAT7, (M11 | PIN_INPUT_PULLDOWN)}, /* mmc3_dat7.pr2_mii1_rxd0 */ + {SPI1_SCLK, (M14 | PIN_INPUT_PULLDOWN)}, /* spi1_sclk.gpio7_7 */ + {SPI1_D1, (M14 | PIN_INPUT_PULLDOWN)}, /* spi1_d1.gpio7_8 */ + {SPI1_D0, (M14 | PIN_INPUT_PULLDOWN)}, /* spi1_d0.gpio7_9 */ + {SPI1_CS0, (M14 | PIN_OUTPUT)}, /* spi1_cs0.gpio7_10 */ + {SPI1_CS1, (M14 | PIN_INPUT_PULLDOWN)}, /* spi1_cs1.gpio7_11 */ + {MMC1_CLK, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_clk.mmc1_clk */ + {MMC1_CMD, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_cmd.mmc1_cmd */ + {MMC1_DAT0, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_dat0.mmc1_dat0 */ + {MMC1_DAT1, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_dat1.mmc1_dat1 */ + {MMC1_DAT2, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_dat2.mmc1_dat2 */ + {MMC1_DAT3, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_dat3.mmc1_dat3 */ + {MMC1_SDCD, (M14 | PIN_INPUT_PULLUP)}, /* mmc1_sdcd.gpio6_27 */ + {MMC1_SDWP, (M14 | PIN_OUTPUT)}, /* mmc1_sdwp.gpio6_28 */ + {SPI1_CS2, (M14 | PIN_INPUT_PULLDOWN)}, /* spi1_cs2.gpio7_12 */ + {SPI1_CS3, (M6 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* spi1_cs3.hdmi1_cec */ + {DCAN1_TX, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* dcan1_tx.dcan1_tx */ + {DCAN1_RX, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* dcan1_rx.dcan1_rx */ + {UART2_CTSN, (M2 | PIN_INPUT_SLEW)}, /* uart2_ctsn.uart3_rxd */ + {UART2_RTSN, (M1 | PIN_INPUT_SLEW)}, /* uart2_rtsn.uart3_txd */ + {UART1_RXD, (M14 | PIN_INPUT_PULLDOWN)}, /* uart1_rxd.gpio7_22 */ + {UART1_TXD, (M14 | PIN_INPUT_PULLDOWN)}, /* uart3_txd.gpio7_23 */ + {I2C2_SDA, (M1 | PIN_INPUT)}, /* i2c2_sda.hdmi1_ddc_scl */ + {I2C2_SCL, (M1 | PIN_INPUT)}, /* i2c2_scl.hdmi1_ddc_sda */ + {ON_OFF, (M1 | PIN_OUTPUT_PULLUP)}, /* on_off.on_off */ + {RTC_PORZ, (M0 | PIN_OUTPUT_PULLDOWN)}, /* rtc_porz.rtc_porz */ + {TMS, (M0 | PIN_INPUT_PULLUP)}, /* tms.tms */ + {TDI, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* tdi.tdi */ + {TDO, (M0 | PIN_INPUT_PULLUP)}, /* tdo.tdo */ + {TCLK, (M0 | PIN_INPUT_PULLUP)}, /* tclk.tclk */ + {TRSTN, (M0 | PIN_INPUT_PULLDOWN)}, /* trstn.trstn */ + {RTCK, (M0 | PIN_INPUT)}, /* rtck.rtck */ + {EMU0, (M0 | PIN_INPUT_PULLUP)}, /* emu0.emu0 */ + {EMU1, (M0 | PIN_INPUT_PULLUP)}, /* emu1.emu1 */ + {RESETN, (M0 | PIN_OUTPUT_PULLUP)}, /* resetn.resetn */ + {RSTOUTN, (M0 | PIN_OUTPUT_PULLDOWN)}, /* rstoutn.rstoutn */ +}; + const struct pad_conf_entry early_padconf[] = { {UART2_CTSN, (M2 | PIN_INPUT_SLEW)}, /* uart2_ctsn.uart3_rxd */ {UART2_RTSN, (M1 | PIN_INPUT_SLEW)}, /* uart2_rtsn.uart3_txd */ @@ -272,7 +488,7 @@ const struct pad_conf_entry early_padconf[] = { }; #ifdef CONFIG_IODELAY_RECALIBRATION -const struct iodelay_cfg_entry iodelay_cfg_array[] = { +const struct iodelay_cfg_entry iodelay_cfg_array_x15[] = { {0x0114, 2980, 0}, /* CFG_GPMC_A0_IN */ {0x0120, 2648, 0}, /* CFG_GPMC_A10_IN */ {0x012C, 2918, 0}, /* CFG_GPMC_A11_IN */ @@ -326,5 +542,53 @@ const struct iodelay_cfg_entry iodelay_cfg_array[] = { {0x0AEC, 232, 1278}, /* CFG_VIN2A_D22_IN */ {0x0AF8, 0, 1397}, /* CFG_VIN2A_D23_IN */ }; + +const struct iodelay_cfg_entry iodelay_cfg_array_am572x_idk[] = { + {0x0114, 2980, 0}, /* CFG_GPMC_A0_IN */ + {0x0120, 2648, 0}, /* CFG_GPMC_A10_IN */ + {0x012C, 2918, 0}, /* CFG_GPMC_A11_IN */ + {0x0138, 2605, 45}, /* CFG_GPMC_A12_IN */ + {0x0144, 0, 0}, /* CFG_GPMC_A13_IN */ + {0x0150, 1976, 1389}, /* CFG_GPMC_A14_IN */ + {0x015C, 1872, 1408}, /* CFG_GPMC_A15_IN */ + {0x0168, 1914, 1506}, /* CFG_GPMC_A16_IN */ + {0x0170, 57, 0}, /* CFG_GPMC_A16_OUT */ + {0x0174, 1904, 1471}, /* CFG_GPMC_A17_IN */ + {0x0188, 1690, 0}, /* CFG_GPMC_A18_OUT */ + {0x0198, 2917, 0}, /* CFG_GPMC_A1_IN */ + {0x0204, 3156, 178}, /* CFG_GPMC_A2_IN */ + {0x0210, 3109, 246}, /* CFG_GPMC_A3_IN */ + {0x021C, 3142, 100}, /* CFG_GPMC_A4_IN */ + {0x0228, 3084, 33}, /* CFG_GPMC_A5_IN */ + {0x0234, 2778, 0}, /* CFG_GPMC_A6_IN */ + {0x0240, 3110, 0}, /* CFG_GPMC_A7_IN */ + {0x024C, 2874, 0}, /* CFG_GPMC_A8_IN */ + {0x0258, 3072, 0}, /* CFG_GPMC_A9_IN */ + {0x0374, 0, 0}, /* CFG_GPMC_CS2_OUT */ + {0x06F0, 480, 0}, /* CFG_RGMII0_RXC_IN */ + {0x06FC, 111, 1641}, /* CFG_RGMII0_RXCTL_IN */ + {0x0708, 272, 1116}, /* CFG_RGMII0_RXD0_IN */ + {0x0714, 243, 1260}, /* CFG_RGMII0_RXD1_IN */ + {0x0720, 0, 1614}, /* CFG_RGMII0_RXD2_IN */ + {0x072C, 105, 1673}, /* CFG_RGMII0_RXD3_IN */ + {0x0740, 531, 120}, /* CFG_RGMII0_TXC_OUT */ + {0x074C, 201, 60}, /* CFG_RGMII0_TXCTL_OUT */ + {0x0758, 229, 120}, /* CFG_RGMII0_TXD0_OUT */ + {0x0764, 141, 0}, /* CFG_RGMII0_TXD1_OUT */ + {0x0770, 495, 120}, /* CFG_RGMII0_TXD2_OUT */ + {0x077C, 660, 120}, /* CFG_RGMII0_TXD3_OUT */ + {0x0A70, 65, 70}, /* CFG_VIN2A_D12_OUT */ + {0x0A7C, 125, 70}, /* CFG_VIN2A_D13_OUT */ + {0x0A88, 0, 70}, /* CFG_VIN2A_D14_OUT */ + {0x0A94, 0, 70}, /* CFG_VIN2A_D15_OUT */ + {0x0AA0, 65, 70}, /* CFG_VIN2A_D16_OUT */ + {0x0AAC, 0, 0}, /* CFG_VIN2A_D17_OUT */ + {0x0AB0, 612, 0}, /* CFG_VIN2A_D18_IN */ + {0x0ABC, 4, 927}, /* CFG_VIN2A_D19_IN */ + {0x0AD4, 136, 1340}, /* CFG_VIN2A_D20_IN */ + {0x0AE0, 130, 1450}, /* CFG_VIN2A_D21_IN */ + {0x0AEC, 144, 1269}, /* CFG_VIN2A_D22_IN */ + {0x0AF8, 0, 1330}, /* CFG_VIN2A_D23_IN */ +}; #endif #endif /* _MUX_DATA_BEAGLE_X15_H_ */ diff --git a/board/ti/ks2_evm/board.c b/board/ti/ks2_evm/board.c index e16669d..9e8ad93 100644 --- a/board/ti/ks2_evm/board.c +++ b/board/ti/ks2_evm/board.c @@ -20,6 +20,7 @@ DECLARE_GLOBAL_DATA_PTR; +#if defined(CONFIG_TI_AEMIF) static struct aemif_config aemif_configs[] = { { /* CS0 */ .mode = AEMIF_MODE_NAND, @@ -33,6 +34,7 @@ static struct aemif_config aemif_configs[] = { .width = AEMIF_WIDTH_8, }, }; +#endif int dram_init(void) { @@ -42,7 +44,10 @@ int dram_init(void) gd->ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, CONFIG_MAX_RAM_BANK_SIZE); +#if defined(CONFIG_TI_AEMIF) aemif_init(ARRAY_SIZE(aemif_configs), aemif_configs); +#endif + if (ddr3_size) ddr3_init_ecc(KS2_DDR3A_EMIF_CTRL_BASE, ddr3_size); return 0; diff --git a/cmd/Kconfig b/cmd/Kconfig index fe8b4f0..8703cdb 100644 --- a/cmd/Kconfig +++ b/cmd/Kconfig @@ -173,6 +173,13 @@ config CMD_ELF help Boot an ELF/vxWorks image from the memory. +config CMD_FDT + bool "Flattened Device Tree utility commands" + default y + depends on OF_LIBFDT + help + Do FDT related setup before booting into the Operating System. + config CMD_GO bool "go" default y diff --git a/cmd/Makefile b/cmd/Makefile index ba04197..f95759e 100644 --- a/cmd/Makefile +++ b/cmd/Makefile @@ -54,7 +54,7 @@ obj-$(CONFIG_CMD_EXT4) += ext4.o obj-$(CONFIG_CMD_EXT2) += ext2.o obj-$(CONFIG_CMD_FAT) += fat.o obj-$(CONFIG_CMD_FDC) += fdc.o -obj-$(CONFIG_OF_LIBFDT) += fdt.o +obj-$(CONFIG_CMD_FDT) += fdt.o obj-$(CONFIG_CMD_FITUPD) += fitupd.o obj-$(CONFIG_CMD_FLASH) += flash.o ifdef CONFIG_FPGA diff --git a/cmd/bootefi.c b/cmd/bootefi.c index 3add632..7f552fc 100644 --- a/cmd/bootefi.c +++ b/cmd/bootefi.c @@ -12,6 +12,10 @@ #include <errno.h> #include <libfdt.h> #include <libfdt_env.h> +#include <memalign.h> +#include <asm/global_data.h> + +DECLARE_GLOBAL_DATA_PTR; /* * When booting using the "bootefi" command, we don't know which @@ -34,17 +38,30 @@ static struct efi_device_path_file_path bootefi_image_path[] = { } }; +static struct efi_device_path_file_path bootefi_device_path[] = { + { + .dp.type = DEVICE_PATH_TYPE_MEDIA_DEVICE, + .dp.sub_type = DEVICE_PATH_SUB_TYPE_FILE_PATH, + .dp.length = sizeof(bootefi_image_path[0]), + .str = { 'b','o','o','t','e','f','i' }, + }, { + .dp.type = DEVICE_PATH_TYPE_END, + .dp.sub_type = DEVICE_PATH_SUB_TYPE_END, + .dp.length = sizeof(bootefi_image_path[0]), + } +}; + static efi_status_t bootefi_open_dp(void *handle, efi_guid_t *protocol, void **protocol_interface, void *agent_handle, void *controller_handle, uint32_t attributes) { - *protocol_interface = bootefi_image_path; + *protocol_interface = bootefi_device_path; return EFI_SUCCESS; } /* The EFI loaded_image interface for the image executed via "bootefi" */ static struct efi_loaded_image loaded_image_info = { - .device_handle = bootefi_image_path, + .device_handle = bootefi_device_path, .file_path = bootefi_image_path, }; @@ -63,7 +80,7 @@ static struct efi_object loaded_image_info_obj = { { /* * When asking for the device path interface, return - * bootefi_image_path + * bootefi_device_path */ .guid = &efi_guid_device_path, .open = &bootefi_open_dp, @@ -73,22 +90,59 @@ static struct efi_object loaded_image_info_obj = { /* The EFI object struct for the device the "bootefi" image was loaded from */ static struct efi_object bootefi_device_obj = { - .handle = bootefi_image_path, + .handle = bootefi_device_path, .protocols = { { /* When asking for the device path interface, return - * bootefi_image_path */ + * bootefi_device_path */ .guid = &efi_guid_device_path, .open = &bootefi_open_dp, } }, }; +static void *copy_fdt(void *fdt) +{ + u64 fdt_size = fdt_totalsize(fdt); + unsigned long fdt_ram_start = -1L, fdt_pages; + u64 new_fdt_addr; + void *new_fdt; + int i; + + for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) { + u64 ram_start = gd->bd->bi_dram[i].start; + u64 ram_size = gd->bd->bi_dram[i].size; + + if (!ram_size) + continue; + + if (ram_start < fdt_ram_start) + fdt_ram_start = ram_start; + } + + /* Give us at least 4kb breathing room */ + fdt_size = ALIGN(fdt_size + 4096, 4096); + fdt_pages = fdt_size >> EFI_PAGE_SHIFT; + + /* Safe fdt location is at 128MB */ + new_fdt_addr = fdt_ram_start + (128 * 1024 * 1024) + fdt_size; + if (efi_allocate_pages(1, EFI_BOOT_SERVICES_DATA, fdt_pages, + &new_fdt_addr) != EFI_SUCCESS) { + /* If we can't put it there, put it somewhere */ + new_fdt_addr = (ulong)memalign(4096, fdt_size); + } + new_fdt = (void*)(ulong)new_fdt_addr; + memcpy(new_fdt, fdt, fdt_totalsize(fdt)); + fdt_set_totalsize(new_fdt, fdt_size); + + return new_fdt; +} + /* * Load an EFI payload into a newly allocated piece of memory, register all * EFI objects it would want to access and jump to it. */ -static unsigned long do_bootefi_exec(void *efi) +static unsigned long do_bootefi_exec(void *efi, void *fdt) { ulong (*entry)(void *image_handle, struct efi_system_table *st); ulong fdt_pages, fdt_size, fdt_start, fdt_end; @@ -100,32 +154,31 @@ static unsigned long do_bootefi_exec(void *efi) */ efi_save_gd(); - /* Update system table to point to our currently loaded FDT */ - - if (working_fdt) { + if (fdt && !fdt_check_header(fdt)) { /* Prepare fdt for payload */ - if (image_setup_libfdt(&img, working_fdt, 0, NULL)) { + fdt = copy_fdt(fdt); + + if (image_setup_libfdt(&img, fdt, 0, NULL)) { printf("ERROR: Failed to process device tree\n"); return -EINVAL; } /* Link to it in the efi tables */ systab.tables[0].guid = EFI_FDT_GUID; - systab.tables[0].table = working_fdt; + systab.tables[0].table = fdt; systab.nr_tables = 1; /* And reserve the space in the memory map */ - fdt_start = ((ulong)working_fdt) & ~EFI_PAGE_MASK; - fdt_end = ((ulong)working_fdt) + fdt_totalsize(working_fdt); + fdt_start = ((ulong)fdt) & ~EFI_PAGE_MASK; + fdt_end = ((ulong)fdt) + fdt_totalsize(fdt); fdt_size = (fdt_end - fdt_start) + EFI_PAGE_MASK; fdt_pages = fdt_size >> EFI_PAGE_SHIFT; /* Give a bootloader the chance to modify the device tree */ fdt_pages += 2; efi_add_memory_map(fdt_start, fdt_pages, EFI_BOOT_SERVICES_DATA, true); - } else { - printf("WARNING: No device tree loaded, expect boot to fail\n"); + printf("WARNING: Invalid device tree, expect boot to fail\n"); systab.nr_tables = 0; } @@ -156,8 +209,8 @@ static unsigned long do_bootefi_exec(void *efi) /* Interpreter command to boot an arbitrary EFI image from memory */ static int do_bootefi(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { - char *saddr; - unsigned long addr; + char *saddr, *sfdt; + unsigned long addr, fdt_addr = 0; int r = 0; if (argc < 2) @@ -166,8 +219,13 @@ static int do_bootefi(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) addr = simple_strtoul(saddr, NULL, 16); + if (argc > 2) { + sfdt = argv[2]; + fdt_addr = simple_strtoul(sfdt, NULL, 16); + } + printf("## Starting EFI application at 0x%08lx ...\n", addr); - r = do_bootefi_exec((void *)addr); + r = do_bootefi_exec((void *)addr, (void*)fdt_addr); printf("## Application terminated, r = %d\n", r); if (r != 0) @@ -178,32 +236,49 @@ static int do_bootefi(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) #ifdef CONFIG_SYS_LONGHELP static char bootefi_help_text[] = - "<image address>\n" - " - boot EFI payload stored at address <image address>\n" - "\n" - "Since most EFI payloads want to have a device tree provided, please\n" - "make sure you load a device tree using the fdt addr command before\n" - "executing bootefi.\n"; + "<image address> [fdt address]\n" + " - boot EFI payload stored at address <image address>.\n" + " If specified, the device tree located at <fdt address> gets\n" + " exposed as EFI configuration table.\n"; #endif U_BOOT_CMD( - bootefi, 2, 0, do_bootefi, + bootefi, 3, 0, do_bootefi, "Boots an EFI payload from memory\n", bootefi_help_text ); -void efi_set_bootdev(const char *dev, const char *devnr) +void efi_set_bootdev(const char *dev, const char *devnr, const char *path) { - char devname[16] = { 0 }; /* dp->str is u16[16] long */ + __maybe_unused struct blk_desc *desc; + char devname[32] = { 0 }; /* dp->str is u16[32] long */ char *colon; /* Assemble the condensed device name we use in efi_disk.c */ snprintf(devname, sizeof(devname), "%s%s", dev, devnr); colon = strchr(devname, ':'); + +#ifdef CONFIG_ISO_PARTITION + /* For ISOs we create partition block devices */ + desc = blk_get_dev(dev, simple_strtol(devnr, NULL, 10)); + if (desc && (desc->type != DEV_TYPE_UNKNOWN) && + (desc->part_type == PART_TYPE_ISO)) { + if (!colon) + snprintf(devname, sizeof(devname), "%s%s:1", dev, + devnr); + colon = NULL; + } +#endif + if (colon) *colon = '\0'; - /* Patch the bootefi_image_path to the target device */ + /* Patch bootefi_device_path to the target device */ + memset(bootefi_device_path[0].str, 0, sizeof(bootefi_device_path[0].str)); + ascii2unicode(bootefi_device_path[0].str, devname); + + /* Patch bootefi_image_path to the target file path */ memset(bootefi_image_path[0].str, 0, sizeof(bootefi_image_path[0].str)); + snprintf(devname, sizeof(devname), "%s", path); ascii2unicode(bootefi_image_path[0].str, devname); } @@ -27,7 +27,8 @@ U_BOOT_CMD( static int do_load_wrapper(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { - efi_set_bootdev(argv[1], (argc > 2) ? argv[2] : ""); + efi_set_bootdev(argv[1], (argc > 2) ? argv[2] : "", + (argc > 4) ? argv[4] : ""); return do_load(cmdtp, flag, argc, argv, FS_TYPE_ANY); } diff --git a/cmd/nvedit.c b/cmd/nvedit.c index 9cf884e..b67563b 100644 --- a/cmd/nvedit.c +++ b/cmd/nvedit.c @@ -49,12 +49,13 @@ DECLARE_GLOBAL_DATA_PTR; !defined(CONFIG_ENV_IS_IN_NAND) && \ !defined(CONFIG_ENV_IS_IN_NVRAM) && \ !defined(CONFIG_ENV_IS_IN_ONENAND) && \ + !defined(CONFIG_ENV_IS_IN_SATA) && \ !defined(CONFIG_ENV_IS_IN_SPI_FLASH) && \ !defined(CONFIG_ENV_IS_IN_REMOTE) && \ !defined(CONFIG_ENV_IS_IN_UBI) && \ !defined(CONFIG_ENV_IS_NOWHERE) # error Define one of CONFIG_ENV_IS_IN_{EEPROM|FLASH|DATAFLASH|ONENAND|\ -SPI_FLASH|NVRAM|MMC|FAT|EXT4|REMOTE|UBI} or CONFIG_ENV_IS_NOWHERE +SATA|SPI_FLASH|NVRAM|MMC|FAT|EXT4|REMOTE|UBI} or CONFIG_ENV_IS_NOWHERE #endif /* diff --git a/common/Makefile b/common/Makefile index 9a4b817..b23f312 100644 --- a/common/Makefile +++ b/common/Makefile @@ -50,6 +50,7 @@ obj-$(CONFIG_ENV_IS_IN_EXT4) += env_ext4.o obj-$(CONFIG_ENV_IS_IN_NAND) += env_nand.o obj-$(CONFIG_ENV_IS_IN_NVRAM) += env_nvram.o obj-$(CONFIG_ENV_IS_IN_ONENAND) += env_onenand.o +obj-$(CONFIG_ENV_IS_IN_SATA) += env_sata.o obj-$(CONFIG_ENV_IS_IN_SPI_FLASH) += env_sf.o obj-$(CONFIG_ENV_IS_IN_REMOTE) += env_remote.o obj-$(CONFIG_ENV_IS_IN_UBI) += env_ubi.o diff --git a/common/env_sata.c b/common/env_sata.c new file mode 100644 index 0000000..b0cee35 --- /dev/null +++ b/common/env_sata.c @@ -0,0 +1,127 @@ +/* + * (C) Copyright 2010-2016 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +/* #define DEBUG */ + +#include <common.h> + +#include <command.h> +#include <environment.h> +#include <linux/stddef.h> +#include <errno.h> +#include <memalign.h> +#include <sata.h> +#include <search.h> + +#if defined(CONFIG_ENV_SIZE_REDUND) || defined(CONFIG_ENV_OFFSET_REDUND) +#error ENV REDUND not supported +#endif + +#if !defined(CONFIG_ENV_OFFSET) || !defined(CONFIG_ENV_SIZE) +#error CONFIG_ENV_OFFSET or CONFIG_ENV_SIZE not defined +#endif + +char *env_name_spec = "SATA"; + +DECLARE_GLOBAL_DATA_PTR; + +__weak int sata_get_env_dev(void) +{ + return CONFIG_SYS_SATA_ENV_DEV; +} + +int env_init(void) +{ + /* use default */ + gd->env_addr = (ulong)&default_environment[0]; + gd->env_valid = 1; + + return 0; +} + +#ifdef CONFIG_CMD_SAVEENV +static inline int write_env(struct blk_desc *sata, unsigned long size, + unsigned long offset, void *buffer) +{ + uint blk_start, blk_cnt, n; + + blk_start = ALIGN(offset, sata->blksz) / sata->blksz; + blk_cnt = ALIGN(size, sata->blksz) / sata->blksz; + + n = blk_dwrite(sata, blk_start, blk_cnt, buffer); + + return (n == blk_cnt) ? 0 : -1; +} + +int saveenv(void) +{ + ALLOC_CACHE_ALIGN_BUFFER(env_t, env_new, 1); + struct blk_desc *sata = NULL; + int env_sata, ret; + + if (sata_initialize()) + return 1; + + env_sata = sata_get_env_dev(); + + sata = sata_get_dev(env_sata); + if (sata == NULL) { + printf("Unknown SATA(%d) device for environment!\n", + env_sata); + return 1; + } + + ret = env_export(env_new); + if (ret) + return 1; + + printf("Writing to SATA(%d)...", env_sata); + if (write_env(sata, CONFIG_ENV_SIZE, CONFIG_ENV_OFFSET, &env_new)) { + puts("failed\n"); + return 1; + } + + puts("done\n"); + return 0; +} +#endif /* CONFIG_CMD_SAVEENV */ + +static inline int read_env(struct blk_desc *sata, unsigned long size, + unsigned long offset, void *buffer) +{ + uint blk_start, blk_cnt, n; + + blk_start = ALIGN(offset, sata->blksz) / sata->blksz; + blk_cnt = ALIGN(size, sata->blksz) / sata->blksz; + + n = blk_dread(sata, blk_start, blk_cnt, buffer); + + return (n == blk_cnt) ? 0 : -1; +} + +void env_relocate_spec(void) +{ + ALLOC_CACHE_ALIGN_BUFFER(char, buf, CONFIG_ENV_SIZE); + struct blk_desc *sata = NULL; + int env_sata; + + if (sata_initialize()) + return; + + env_sata = sata_get_env_dev(); + + sata = sata_get_dev(env_sata); + if (sata == NULL) { + printf("Unknown SATA(%d) device for environment!\n", + env_sata); + return; + } + + if (read_env(sata, CONFIG_ENV_SIZE, CONFIG_ENV_OFFSET, buf)) + return set_default_env(NULL); + + env_import(buf, 1); +} diff --git a/configs/am57xx_evm_defconfig b/configs/am57xx_evm_defconfig index 1090287..e40c24a 100644 --- a/configs/am57xx_evm_defconfig +++ b/configs/am57xx_evm_defconfig @@ -7,7 +7,6 @@ CONFIG_SPL_STACK_R_ADDR=0x82000000 CONFIG_DEFAULT_DEVICE_TREE="am57xx-beagle-x15" CONFIG_SPL=y CONFIG_SPL_STACK_R=y -CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=3" # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y diff --git a/configs/am57xx_evm_nodt_defconfig b/configs/am57xx_evm_nodt_defconfig index 7641db5..cb91719 100644 --- a/configs/am57xx_evm_nodt_defconfig +++ b/configs/am57xx_evm_nodt_defconfig @@ -2,7 +2,6 @@ CONFIG_ARM=y CONFIG_OMAP54XX=y CONFIG_TARGET_BEAGLE_X15=y CONFIG_SPL=y -CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=3" # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y diff --git a/configs/bcm28155_ap_defconfig b/configs/bcm28155_ap_defconfig index 8076c4f..969c5bc 100644 --- a/configs/bcm28155_ap_defconfig +++ b/configs/bcm28155_ap_defconfig @@ -14,3 +14,4 @@ CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_G_DNL_MANUFACTURER="Broadcom Corporation" CONFIG_G_DNL_VENDOR_NUM=0x18d1 CONFIG_G_DNL_PRODUCT_NUM=0x0d02 +CONFIG_OF_LIBFDT=y diff --git a/configs/dra72_evm_defconfig b/configs/dra72_evm_defconfig index 0d63986..4aa76b1 100644 --- a/configs/dra72_evm_defconfig +++ b/configs/dra72_evm_defconfig @@ -16,6 +16,7 @@ CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set CONFIG_OF_CONTROL=y CONFIG_DM=y +CONFIG_DM_MMC=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_BAR=y CONFIG_SPI_FLASH_SPANSION=y diff --git a/configs/dra74_evm_defconfig b/configs/dra74_evm_defconfig index 8ce544e..64ab406 100644 --- a/configs/dra74_evm_defconfig +++ b/configs/dra74_evm_defconfig @@ -15,6 +15,7 @@ CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set CONFIG_OF_CONTROL=y CONFIG_DM=y +CONFIG_DM_MMC=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_BAR=y CONFIG_SPI_FLASH_SPANSION=y diff --git a/configs/ge_b450v3_defconfig b/configs/ge_b450v3_defconfig index 02873ce..24ef9e8 100644 --- a/configs/ge_b450v3_defconfig +++ b/configs/ge_b450v3_defconfig @@ -6,3 +6,4 @@ CONFIG_TARGET_GE_B450V3=y CONFIG_CMD_GPIO=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y +CONFIG_OF_LIBFDT=y diff --git a/configs/ge_b650v3_defconfig b/configs/ge_b650v3_defconfig index 3d10b35..75c49c0 100644 --- a/configs/ge_b650v3_defconfig +++ b/configs/ge_b650v3_defconfig @@ -6,3 +6,4 @@ CONFIG_TARGET_GE_B650V3=y CONFIG_CMD_GPIO=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y +CONFIG_OF_LIBFDT=y diff --git a/configs/ge_b850v3_defconfig b/configs/ge_b850v3_defconfig index e3f4a0a..85140cd 100644 --- a/configs/ge_b850v3_defconfig +++ b/configs/ge_b850v3_defconfig @@ -6,3 +6,4 @@ CONFIG_TARGET_GE_B850V3=y CONFIG_CMD_GPIO=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y +CONFIG_OF_LIBFDT=y diff --git a/configs/k2e_evm_defconfig b/configs/k2e_evm_defconfig index a3fa758..c843508 100644 --- a/configs/k2e_evm_defconfig +++ b/configs/k2e_evm_defconfig @@ -15,3 +15,5 @@ CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_DM_ETH=y CONFIG_SYS_NS16550=y +CONFIG_TI_AEMIF=y +CONFIG_CMD_NAND=y diff --git a/configs/k2hk_evm_defconfig b/configs/k2hk_evm_defconfig index 83efcbb..1627065 100644 --- a/configs/k2hk_evm_defconfig +++ b/configs/k2hk_evm_defconfig @@ -15,3 +15,5 @@ CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_DM_ETH=y CONFIG_SYS_NS16550=y +CONFIG_TI_AEMIF=y +CONFIG_CMD_NAND=y diff --git a/configs/k2l_evm_defconfig b/configs/k2l_evm_defconfig index d2ebb1d..255f6d1 100644 --- a/configs/k2l_evm_defconfig +++ b/configs/k2l_evm_defconfig @@ -15,3 +15,5 @@ CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_DM_ETH=y CONFIG_SYS_NS16550=y +CONFIG_TI_AEMIF=y +CONFIG_CMD_NAND=y diff --git a/configs/legoev3_defconfig b/configs/legoev3_defconfig index d838baa..22fd057 100644 --- a/configs/legoev3_defconfig +++ b/configs/legoev3_defconfig @@ -10,3 +10,5 @@ CONFIG_AUTOBOOT_STOP_STR="l" CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SYS_NS16550=y +CONFIG_OF_LIBFDT=y +# CONFIG_EFI_LOADER is not set diff --git a/configs/ma5d4evk_defconfig b/configs/ma5d4evk_defconfig index 1b2b722..f7973ed 100644 --- a/configs/ma5d4evk_defconfig +++ b/configs/ma5d4evk_defconfig @@ -13,3 +13,5 @@ CONFIG_SPI_FLASH=y CONFIG_USB=y CONFIG_USB_GADGET=y CONFIG_USB_GADGET_ATMEL_USBA=y +CONFIG_OF_LIBFDT=y +# CONFIG_EFI_LOADER is not set diff --git a/configs/stm32f746-disco_defconfig b/configs/stm32f746-disco_defconfig index 7cfed4a..07aa874 100644 --- a/configs/stm32f746-disco_defconfig +++ b/configs/stm32f746-disco_defconfig @@ -7,3 +7,5 @@ CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Hit SPACE in %d seconds to stop autoboot.\n" CONFIG_AUTOBOOT_STOP_STR=" " # CONFIG_CMD_SETEXPR is not set +CONFIG_OF_LIBFDT=y +# CONFIG_EFI_LOADER is not set diff --git a/configs/xpress_defconfig b/configs/xpress_defconfig index 033d32b..fb2e7b2 100644 --- a/configs/xpress_defconfig +++ b/configs/xpress_defconfig @@ -4,3 +4,4 @@ CONFIG_TARGET_XPRESS=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/ccv/xpress/imximage.cfg" CONFIG_CMD_DHCP=y CONFIG_CMD_PING=y +CONFIG_OF_LIBFDT=y diff --git a/configs/xpress_spl_defconfig b/configs/xpress_spl_defconfig index c2b1075..4ac7ef0 100644 --- a/configs/xpress_spl_defconfig +++ b/configs/xpress_spl_defconfig @@ -5,3 +5,4 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg" CONFIG_CMD_DHCP=y CONFIG_CMD_PING=y +CONFIG_OF_LIBFDT=y diff --git a/configs/zipitz2_defconfig b/configs/zipitz2_defconfig index 2977ccc..d2fa63d 100644 --- a/configs/zipitz2_defconfig +++ b/configs/zipitz2_defconfig @@ -1,7 +1,9 @@ CONFIG_ARM=y CONFIG_TARGET_ZIPITZ2=y +CONFIG_SYS_PROMPT="$ " # CONFIG_CMD_IMLS is not set # CONFIG_CMD_SETEXPR is not set # CONFIG_CMD_NET is not set # CONFIG_CMD_NFS is not set -CONFIG_SYS_PROMPT="$ " +CONFIG_OF_LIBFDT=y +# CONFIG_EFI_LOADER is not set diff --git a/disk/part_iso.c b/disk/part_iso.c index 2114faf..9f5c50c 100644 --- a/disk/part_iso.c +++ b/disk/part_iso.c @@ -26,6 +26,25 @@ static unsigned char tmpbuf[CD_SECTSIZE]; +unsigned long iso_dread(struct blk_desc *block_dev, lbaint_t start, + lbaint_t blkcnt, void *buffer) +{ + unsigned long ret; + + if (block_dev->blksz == 512) { + /* Convert from 2048 to 512 sector size */ + start *= 4; + blkcnt *= 4; + } + + ret = blk_dread(block_dev, start, blkcnt, buffer); + + if (block_dev->blksz == 512) + ret /= 4; + + return ret; +} + /* only boot records will be listed as valid partitions */ int part_get_info_iso_verb(struct blk_desc *dev_desc, int part_num, disk_partition_t *info, int verb) @@ -39,12 +58,12 @@ int part_get_info_iso_verb(struct blk_desc *dev_desc, int part_num, iso_val_entry_t *pve = (iso_val_entry_t *)tmpbuf; iso_init_def_entry_t *pide; - if (dev_desc->blksz != CD_SECTSIZE) + if ((dev_desc->blksz != CD_SECTSIZE) && (dev_desc->blksz != 512)) return -1; /* the first sector (sector 0x10) must be a primary volume desc */ blkaddr=PVD_OFFSET; - if (blk_dread(dev_desc, PVD_OFFSET, 1, (ulong *)tmpbuf) != 1) + if (iso_dread(dev_desc, PVD_OFFSET, 1, (ulong *)tmpbuf) != 1) return -1; if(ppr->desctype!=0x01) { if(verb) @@ -58,15 +77,13 @@ int part_get_info_iso_verb(struct blk_desc *dev_desc, int part_num, ppr->stand_ident, dev_desc->devnum, part_num); return (-1); } - lastsect= ((ppr->firstsek_LEpathtab1_LE & 0x000000ff)<<24) + - ((ppr->firstsek_LEpathtab1_LE & 0x0000ff00)<< 8) + - ((ppr->firstsek_LEpathtab1_LE & 0x00ff0000)>> 8) + - ((ppr->firstsek_LEpathtab1_LE & 0xff000000)>>24) ; - info->blksz=ppr->secsize_BE; /* assuming same block size for all entries */ + lastsect = le32_to_cpu(ppr->firstsek_LEpathtab1_LE); + /* assuming same block size for all entries */ + info->blksz = be16_to_cpu(ppr->secsize_BE); PRINTF(" Lastsect:%08lx\n",lastsect); for(i=blkaddr;i<lastsect;i++) { PRINTF("Reading block %d\n", i); - if (blk_dread(dev_desc, i, 1, (ulong *)tmpbuf) != 1) + if (iso_dread(dev_desc, i, 1, (ulong *)tmpbuf) != 1) return -1; if(ppr->desctype==0x00) break; /* boot entry found */ @@ -86,7 +103,7 @@ int part_get_info_iso_verb(struct blk_desc *dev_desc, int part_num, } bootaddr = get_unaligned_le32(pbr->pointer); PRINTF(" Boot Entry at: %08lX\n",bootaddr); - if (blk_dread(dev_desc, bootaddr, 1, (ulong *)tmpbuf) != 1) { + if (iso_dread(dev_desc, bootaddr, 1, (ulong *)tmpbuf) != 1) { if(verb) printf ("** Can't read Boot Entry at %lX on %d:%d **\n", bootaddr, dev_desc->devnum, part_num); @@ -95,7 +112,7 @@ int part_get_info_iso_verb(struct blk_desc *dev_desc, int part_num, chksum=0; chksumbuf = (unsigned short *)tmpbuf; for(i=0;i<0x10;i++) - chksum+=((chksumbuf[i] &0xff)<<8)+((chksumbuf[i] &0xff00)>>8); + chksum += le16_to_cpu(chksumbuf[i]); if(chksum!=0) { if(verb) printf("** Checksum Error in booting catalog validation entry on %d:%d **\n", @@ -117,7 +134,7 @@ int part_get_info_iso_verb(struct blk_desc *dev_desc, int part_num, } #endif /* the validation entry seems to be ok, now search the "partition" */ - entry_num=0; + entry_num=1; offset=0x20; strcpy((char *)info->type, "U-Boot"); switch(dev_desc->if_type) { @@ -194,7 +211,14 @@ found: } newblkaddr = get_unaligned_le32(pide->rel_block_addr); info->start=newblkaddr; - PRINTF(" part %d found @ %lx size %lx\n",part_num,newblkaddr,info->size); + + if (dev_desc->blksz == 512) { + info->size *= 4; + info->start *= 4; + info->blksz = 512; + } + + PRINTF(" part %d found @ %lx size %lx\n",part_num,info->start,info->size); return 0; } @@ -227,7 +251,7 @@ static int part_test_iso(struct blk_desc *dev_desc) { disk_partition_t info; - return part_get_info_iso_verb(dev_desc, 0, &info, 0); + return part_get_info_iso_verb(dev_desc, 1, &info, 1); } U_BOOT_PART_TYPE(iso) = { diff --git a/disk/part_iso.h b/disk/part_iso.h index dace0f8..045784f 100644 --- a/disk/part_iso.h +++ b/disk/part_iso.h @@ -29,8 +29,8 @@ typedef struct iso_pri_rec { char sysid[32]; /* system Identifier */ char volid[32]; /* volume Identifier */ unsigned char zeros1[8]; /* unused */ - unsigned long volsiz_LE; /* volume size Little Endian */ - unsigned long volsiz_BE; /* volume size Big Endian */ + unsigned int volsiz_LE; /* volume size Little Endian */ + unsigned int volsiz_BE; /* volume size Big Endian */ unsigned char zeros2[32]; /* unused */ unsigned short setsize_LE; /* volume set size LE */ unsigned short setsize_BE; /* volume set size BE */ @@ -38,12 +38,12 @@ typedef struct iso_pri_rec { unsigned short seqnum_BE; /* volume sequence number BE */ unsigned short secsize_LE; /* sector size LE */ unsigned short secsize_BE; /* sector size BE */ - unsigned long pathtablen_LE;/* Path Table size LE */ - unsigned long pathtablen_BE;/* Path Table size BE */ - unsigned long firstsek_LEpathtab1_LE; /* location of first occurrence of little endian type path table */ - unsigned long firstsek_LEpathtab2_LE; /* location of optional occurrence of little endian type path table */ - unsigned long firstsek_BEpathtab1_BE; /* location of first occurrence of big endian type path table */ - unsigned long firstsek_BEpathtab2_BE; /* location of optional occurrence of big endian type path table */ + unsigned int pathtablen_LE;/* Path Table size LE */ + unsigned int pathtablen_BE;/* Path Table size BE */ + unsigned int firstsek_LEpathtab1_LE; /* location of first occurrence of little endian type path table */ + unsigned int firstsek_LEpathtab2_LE; /* location of optional occurrence of little endian type path table */ + unsigned int firstsek_BEpathtab1_BE; /* location of first occurrence of big endian type path table */ + unsigned int firstsek_BEpathtab2_BE; /* location of optional occurrence of big endian type path table */ unsigned char rootdir[34]; /* directory record for root dir */ char volsetid[128];/* Volume set identifier */ char pubid[128]; /* Publisher identifier */ @@ -67,8 +67,8 @@ typedef struct iso_sup_rec { char sysid[32]; /* system Identifier */ char volid[32]; /* volume Identifier */ unsigned char zeros1[8]; /* unused */ - unsigned long volsiz_LE; /* volume size Little Endian */ - unsigned long volsiz_BE; /* volume size Big Endian */ + unsigned int volsiz_LE; /* volume size Little Endian */ + unsigned int volsiz_BE; /* volume size Big Endian */ unsigned char escapeseq[32];/* Escape sequences */ unsigned short setsize_LE; /* volume set size LE */ unsigned short setsize_BE; /* volume set size BE */ @@ -76,12 +76,12 @@ typedef struct iso_sup_rec { unsigned short seqnum_BE; /* volume sequence number BE */ unsigned short secsize_LE; /* sector size LE */ unsigned short secsize_BE; /* sector size BE */ - unsigned long pathtablen_LE;/* Path Table size LE */ - unsigned long pathtablen_BE;/* Path Table size BE */ - unsigned long firstsek_LEpathtab1_LE; /* location of first occurrence of little endian type path table */ - unsigned long firstsek_LEpathtab2_LE; /* location of optional occurrence of little endian type path table */ - unsigned long firstsek_BEpathtab1_BE; /* location of first occurrence of big endian type path table */ - unsigned long firstsek_BEpathtab2_BE; /* location of optional occurrence of big endian type path table */ + unsigned int pathtablen_LE;/* Path Table size LE */ + unsigned int pathtablen_BE;/* Path Table size BE */ + unsigned int firstsek_LEpathtab1_LE; /* location of first occurrence of little endian type path table */ + unsigned int firstsek_LEpathtab2_LE; /* location of optional occurrence of little endian type path table */ + unsigned int firstsek_BEpathtab1_BE; /* location of first occurrence of big endian type path table */ + unsigned int firstsek_BEpathtab2_BE; /* location of optional occurrence of big endian type path table */ unsigned char rootdir[34]; /* directory record for root dir */ char volsetid[128];/* Volume set identifier */ char pubid[128]; /* Publisher identifier */ @@ -104,10 +104,10 @@ typedef struct iso_part_rec { unsigned char unused; char sysid[32]; /* system Identifier */ char volid[32]; /* volume partition Identifier */ - unsigned long partloc_LE; /* volume partition location LE */ - unsigned long partloc_BE; /* volume partition location BE */ - unsigned long partsiz_LE; /* volume partition size LE */ - unsigned long partsiz_BE; /* volume partition size BE */ + unsigned int partloc_LE; /* volume partition location LE */ + unsigned int partloc_BE; /* volume partition location BE */ + unsigned int partsiz_LE; /* volume partition size LE */ + unsigned int partsiz_BE; /* volume partition size BE */ }iso_part_rec_t; diff --git a/doc/README.ext4 b/doc/README.ext4 index 9a2de50..2b0eab5 100644 --- a/doc/README.ext4 +++ b/doc/README.ext4 @@ -1,53 +1,77 @@ -This patch series adds support for ext4 ls,load and write features in uboot -Journaling is supported for write feature. +U-Boot supports access of both ext2 and ext4 filesystems, either in read-only +mode or in read-write mode. -To enable support for the ext4 (and ext2) filesystem implementation, -#define CONFIG_FS_EXT4 +First, to enable support for both ext4 (and, automatically, ext2 as well), +but without selecting the corresponding commands, use one of: -If you want write support, -#define CONFIG_EXT4_WRITE + #define CONFIG_FS_EXT4 (for read-only) + #define CONFIG_EXT4_WRITE (for read-write) -To Enable ext2 ls and load commands, modify the board specific config file with -#define CONFIG_CMD_EXT2 -This automatically defines CONFIG_FS_EXT4 for you. +Next, to select the ext2-related commands: -To Enable ext4 ls and load commands, modify the board specific config file with -#define CONFIG_CMD_EXT4 -This automatically defines CONFIG_FS_EXT4 for you. + * ext2ls + * ext2load -To enable ext4 write command, modify the board specific config file with -#define CONFIG_CMD_EXT4 -#define CONFIG_CMD_EXT4_WRITE -These automatically define CONFIG_FS_EXT4 and CONFIG_EXT4_WRITE for you. +or ext4-related commands: -Also relevant are the generic filesystem commands, -#define CONFIG_CMD_FS_GENERIC -This does not automatically enable EXT4 support for you. + * ext4size + * ext4ls + * ext4load -Steps to test: +use one or both of: -1. After applying the patch, ext4 specific commands can be seen - in the boot loader prompt using - UBOOT #help + #define CONFIG_CMD_EXT2 + #define CONFIG_CMD_EXT4 + +Selecting either of the above automatically defines CONFIG_FS_EXT4 if it +wasn't defined already. + +In addition, to get the write access command "ext4write", use: + + #define CONFIG_CMD_EXT4_WRITE + +which automatically defines CONFIG_EXT4_WRITE if it wasn't defined +already. + +Also relevant are the generic filesystem commands, selected by: + + #define CONFIG_CMD_FS_GENERIC + +This does not automatically enable EXT4 support for you, you still need +to do that yourself. + +Some sample commands to test ext4 support: +1. Check that the commands can be seen in the output of U-Boot help: + + UBOOT #help + ... ext4load- load binary file from a Ext4 file system ext4ls - list files in a directory (default /) + ext4size - determine a file's size ext4write- create a file in ext4 formatted partition + ... + +2. To list the files in an ext4-formatted partition, run: -2. To list the files in ext4 formatted partition, execute ext4ls <interface> <dev[:part]> [directory] + For example: UBOOT #ext4ls mmc 0:5 /usr/lib -3. To read and load a file from an ext4 formatted partition to RAM, execute +3. To read and load a file from an ext4-formatted partition to RAM, run: + ext4load <interface> <dev[:part]> [addr] [filename] [bytes] + For example: UBOOT #ext4load mmc 2:2 0x30007fc0 uImage -4. To write a file to a ext4 formatted partition. +4. To write a file to an ext4-formatted partition. + a) First load a file to RAM at a particular address for example 0x30007fc0. - Now execute ext4write command + Now execute ext4write command: ext4write <interface> <dev[:part]> [filename] [Address] [sizebytes] + For example: UBOOT #ext4write mmc 2:2 /boot/uImage 0x30007fc0 6183120 (here 6183120 is the size of the file to be written) diff --git a/drivers/Kconfig b/drivers/Kconfig index c82a94b..118b66e 100644 --- a/drivers/Kconfig +++ b/drivers/Kconfig @@ -30,6 +30,8 @@ source "drivers/input/Kconfig" source "drivers/led/Kconfig" +source "drivers/memory/Kconfig" + source "drivers/misc/Kconfig" source "drivers/mmc/Kconfig" diff --git a/drivers/block/ahci.c b/drivers/block/ahci.c index d29642b..e3e783a 100644 --- a/drivers/block/ahci.c +++ b/drivers/block/ahci.c @@ -1061,6 +1061,7 @@ static int ata_io_flush(u8 port) memcpy((unsigned char *)pp->cmd_tbl, fis, 20); ahci_fill_cmd_slot(pp, cmd_fis_len); + ahci_dcache_flush_sata_cmd(pp); writel_with_flush(1, port_mmio + PORT_CMD_ISSUE); if (waiting_for_cmd_completed(port_mmio + PORT_CMD_ISSUE, diff --git a/drivers/ddr/altera/sdram.c b/drivers/ddr/altera/sdram.c index 2996942..7e4606d 100644 --- a/drivers/ddr/altera/sdram.c +++ b/drivers/ddr/altera/sdram.c @@ -118,7 +118,7 @@ static void sdram_set_rule(struct sdram_prot_rule *prule) /* Obtain the address bits */ lo_addr_bits = prule->sdram_start >> 20ULL; - hi_addr_bits = prule->sdram_end >> 20ULL; + hi_addr_bits = (prule->sdram_end - 1) >> 20ULL; debug("sdram set rule start %x, %d\n", lo_addr_bits, prule->sdram_start); diff --git a/drivers/ddr/altera/sequencer.c b/drivers/ddr/altera/sequencer.c index 79c265f..6c6bd90 100644 --- a/drivers/ddr/altera/sequencer.c +++ b/drivers/ddr/altera/sequencer.c @@ -57,7 +57,7 @@ const struct socfpga_sdram_misc_config *misccfg; STATIC_SKIP_DELAY_LOOPS) /* calibration steps requested by the rtl */ -u16 dyn_calib_steps; +static u16 dyn_calib_steps; /* * To make CALIB_SKIP_DELAY_LOOPS a dynamic conditional option @@ -68,13 +68,13 @@ u16 dyn_calib_steps; * zero when skipping */ -u16 skip_delay_mask; /* mask off bits when skipping/not-skipping */ +static u16 skip_delay_mask; /* mask off bits when skipping/not-skipping */ #define SKIP_DELAY_LOOP_VALUE_OR_ZERO(non_skip_value) \ ((non_skip_value) & skip_delay_mask) -struct gbl_type *gbl; -struct param_type *param; +static struct gbl_type *gbl; +static struct param_type *param; static void set_failing_group_stage(u32 group, u32 stage, u32 substage) @@ -277,9 +277,9 @@ static void scc_mgr_initialize(void) int i; for (i = 0; i < 16; i++) { - debug_cond(DLEVEL == 1, "%s:%d: Clearing SCC RFILE index %u\n", + debug_cond(DLEVEL >= 1, "%s:%d: Clearing SCC RFILE index %u\n", __func__, __LINE__, i); - scc_mgr_set(SCC_MGR_HHP_RFILE_OFFSET, 0, i); + scc_mgr_set(SCC_MGR_HHP_RFILE_OFFSET, i, 0); } } @@ -303,15 +303,22 @@ static void scc_mgr_set_dqs_en_delay(u32 read_group, u32 delay) scc_mgr_set(SCC_MGR_DQS_EN_DELAY_OFFSET, read_group, delay); } +static void scc_mgr_set_dq_in_delay(u32 dq_in_group, u32 delay) +{ + scc_mgr_set(SCC_MGR_IO_IN_DELAY_OFFSET, dq_in_group, delay); +} + static void scc_mgr_set_dqs_io_in_delay(u32 delay) { scc_mgr_set(SCC_MGR_IO_IN_DELAY_OFFSET, rwcfg->mem_dq_per_write_dqs, delay); } -static void scc_mgr_set_dq_in_delay(u32 dq_in_group, u32 delay) +static void scc_mgr_set_dm_in_delay(u32 dm, u32 delay) { - scc_mgr_set(SCC_MGR_IO_IN_DELAY_OFFSET, dq_in_group, delay); + scc_mgr_set(SCC_MGR_IO_IN_DELAY_OFFSET, + rwcfg->mem_dq_per_write_dqs + 1 + dm, + delay); } static void scc_mgr_set_dq_out1_delay(u32 dq_in_group, u32 delay) @@ -424,7 +431,6 @@ static void scc_mgr_set_dqs_en_delay_all_ranks(u32 read_group, */ scc_mgr_set_all_ranks(SCC_MGR_DQS_EN_DELAY_OFFSET, read_group, delay, 1); - writel(0, &sdr_scc_mgr->update); } /** @@ -473,10 +479,10 @@ static void scc_mgr_set_hhp_extras(void) SCC_MGR_HHP_GLOBALS_OFFSET | SCC_MGR_HHP_EXTRAS_OFFSET; - debug_cond(DLEVEL == 1, "%s:%d Setting HHP Extras\n", + debug_cond(DLEVEL >= 1, "%s:%d Setting HHP Extras\n", __func__, __LINE__); writel(value, addr); - debug_cond(DLEVEL == 1, "%s:%d Done Setting HHP Extras\n", + debug_cond(DLEVEL >= 1, "%s:%d Done Setting HHP Extras\n", __func__, __LINE__); } @@ -585,8 +591,11 @@ static void scc_mgr_zero_group(const u32 write_group, const int out_only) writel(0xff, &sdr_scc_mgr->dq_ena); /* Zero all DM config settings. */ - for (i = 0; i < RW_MGR_NUM_DM_PER_WRITE_GROUP; i++) + for (i = 0; i < RW_MGR_NUM_DM_PER_WRITE_GROUP; i++) { + if (!out_only) + scc_mgr_set_dm_in_delay(i, 0); scc_mgr_set_dm_out1_delay(i, 0); + } /* Multicast to all DM enables. */ writel(0xff, &sdr_scc_mgr->dm_ena); @@ -684,7 +693,7 @@ static void scc_mgr_apply_group_all_out_delay_add(const u32 write_group, /* DQS shift */ new_delay = READ_SCC_DQS_IO_OUT2_DELAY + delay; if (new_delay > iocfg->io_out2_delay_max) { - debug_cond(DLEVEL == 1, + debug_cond(DLEVEL >= 1, "%s:%d (%u, %u) DQS: %u > %d; adding %u to OUT1\n", __func__, __LINE__, write_group, delay, new_delay, iocfg->io_out2_delay_max, @@ -698,7 +707,7 @@ static void scc_mgr_apply_group_all_out_delay_add(const u32 write_group, /* OCT shift */ new_delay = READ_SCC_OCT_OUT2_DELAY + delay; if (new_delay > iocfg->io_out2_delay_max) { - debug_cond(DLEVEL == 1, + debug_cond(DLEVEL >= 1, "%s:%d (%u, %u) DQS: %u > %d; adding %u to OUT1\n", __func__, __LINE__, write_group, delay, new_delay, iocfg->io_out2_delay_max, @@ -1201,15 +1210,14 @@ rw_mgr_mem_calibrate_write_test(const u32 rank_bgn, const u32 write_group, set_rank_and_odt_mask(0, RW_MGR_ODT_MODE_OFF); if (all_correct) { - debug_cond(DLEVEL == 2, + debug_cond(DLEVEL >= 2, "write_test(%u,%u,ALL) : %u == %u => %i\n", write_group, use_dm, *bit_chk, param->write_correct_mask, *bit_chk == param->write_correct_mask); return *bit_chk == param->write_correct_mask; } else { - set_rank_and_odt_mask(0, RW_MGR_ODT_MODE_OFF); - debug_cond(DLEVEL == 2, + debug_cond(DLEVEL >= 2, "write_test(%u,%u,ONE) : %u != %i => %i\n", write_group, use_dm, *bit_chk, 0, *bit_chk != 0); return *bit_chk != 0x00; @@ -1284,7 +1292,7 @@ rw_mgr_mem_calibrate_read_test_patterns(const u32 rank_bgn, const u32 group, if (bit_chk != param->read_correct_mask) ret = -EIO; - debug_cond(DLEVEL == 1, + debug_cond(DLEVEL >= 1, "%s:%d test_load_patterns(%u,ALL) => (%u == %u) => %i\n", __func__, __LINE__, group, bit_chk, param->read_correct_mask, ret); @@ -1445,13 +1453,13 @@ rw_mgr_mem_calibrate_read_test(const u32 rank_bgn, const u32 group, if (all_correct) { ret = (*bit_chk == param->read_correct_mask); - debug_cond(DLEVEL == 2, + debug_cond(DLEVEL >= 2, "%s:%d read_test(%u,ALL,%u) => (%u == %u) => %i\n", __func__, __LINE__, group, all_groups, *bit_chk, param->read_correct_mask, ret); } else { ret = (*bit_chk != 0x00); - debug_cond(DLEVEL == 2, + debug_cond(DLEVEL >= 2, "%s:%d read_test(%u,ONE,%u) => (%u != %u) => %i\n", __func__, __LINE__, group, all_groups, *bit_chk, 0, ret); @@ -1515,7 +1523,7 @@ static int find_vfifo_failing_read(const u32 grp) u32 v, ret, fail_cnt = 0; for (v = 0; v < misccfg->read_valid_fifo_size; v++) { - debug_cond(DLEVEL == 2, "%s:%d: vfifo %u\n", + debug_cond(DLEVEL >= 2, "%s:%d: vfifo %u\n", __func__, __LINE__, v); ret = rw_mgr_mem_calibrate_read_test_all_ranks(grp, 1, PASS_ONE_BIT, 0); @@ -1531,7 +1539,7 @@ static int find_vfifo_failing_read(const u32 grp) } /* No failing read found! Something must have gone wrong. */ - debug_cond(DLEVEL == 2, "%s:%d: vfifo failed\n", __func__, __LINE__); + debug_cond(DLEVEL >= 2, "%s:%d: vfifo failed\n", __func__, __LINE__); return 0; } @@ -1638,7 +1646,7 @@ static int sdr_working_phase(const u32 grp, u32 *work_bgn, u32 *d, } /* Cannot find working solution */ - debug_cond(DLEVEL == 2, "%s:%d find_dqs_en_phase: no vfifo/ptap/dtap\n", + debug_cond(DLEVEL >= 2, "%s:%d find_dqs_en_phase: no vfifo/ptap/dtap\n", __func__, __LINE__); return -EINVAL; } @@ -1714,7 +1722,7 @@ static int sdr_nonworking_phase(const u32 grp, u32 *work_end, u32 *p, u32 *i) ret = sdr_find_phase(0, grp, work_end, i, p); if (ret) { /* Cannot see edge of failing read. */ - debug_cond(DLEVEL == 2, "%s:%d: end: failed\n", + debug_cond(DLEVEL >= 2, "%s:%d: end: failed\n", __func__, __LINE__); } @@ -1738,21 +1746,21 @@ static int sdr_find_window_center(const u32 grp, const u32 work_bgn, work_mid = (work_bgn + work_end) / 2; - debug_cond(DLEVEL == 2, "work_bgn=%d work_end=%d work_mid=%d\n", + debug_cond(DLEVEL >= 2, "work_bgn=%d work_end=%d work_mid=%d\n", work_bgn, work_end, work_mid); /* Get the middle delay to be less than a VFIFO delay */ tmp_delay = (iocfg->dqs_en_phase_max + 1) * iocfg->delay_per_opa_tap; - debug_cond(DLEVEL == 2, "vfifo ptap delay %d\n", tmp_delay); + debug_cond(DLEVEL >= 2, "vfifo ptap delay %d\n", tmp_delay); work_mid %= tmp_delay; - debug_cond(DLEVEL == 2, "new work_mid %d\n", work_mid); + debug_cond(DLEVEL >= 2, "new work_mid %d\n", work_mid); tmp_delay = rounddown(work_mid, iocfg->delay_per_opa_tap); if (tmp_delay > iocfg->dqs_en_phase_max * iocfg->delay_per_opa_tap) tmp_delay = iocfg->dqs_en_phase_max * iocfg->delay_per_opa_tap; p = tmp_delay / iocfg->delay_per_opa_tap; - debug_cond(DLEVEL == 2, "new p %d, tmp_delay=%d\n", p, tmp_delay); + debug_cond(DLEVEL >= 2, "new p %d, tmp_delay=%d\n", p, tmp_delay); d = DIV_ROUND_UP(work_mid - tmp_delay, iocfg->delay_per_dqs_en_dchain_tap); @@ -1760,7 +1768,7 @@ static int sdr_find_window_center(const u32 grp, const u32 work_bgn, d = iocfg->dqs_en_delay_max; tmp_delay += d * iocfg->delay_per_dqs_en_dchain_tap; - debug_cond(DLEVEL == 2, "new d %d, tmp_delay=%d\n", d, tmp_delay); + debug_cond(DLEVEL >= 2, "new d %d, tmp_delay=%d\n", d, tmp_delay); scc_mgr_set_dqs_en_phase_all_ranks(grp, p); scc_mgr_set_dqs_en_delay_all_ranks(grp, d); @@ -1770,11 +1778,11 @@ static int sdr_find_window_center(const u32 grp, const u32 work_bgn, * because the largest possible margin in 1 VFIFO cycle. */ for (i = 0; i < misccfg->read_valid_fifo_size; i++) { - debug_cond(DLEVEL == 2, "find_dqs_en_phase: center\n"); + debug_cond(DLEVEL >= 2, "find_dqs_en_phase: center\n"); if (rw_mgr_mem_calibrate_read_test_all_ranks(grp, 1, PASS_ONE_BIT, 0)) { - debug_cond(DLEVEL == 2, + debug_cond(DLEVEL >= 2, "%s:%d center: found: ptap=%u dtap=%u\n", __func__, __LINE__, p, d); return 0; @@ -1784,7 +1792,7 @@ static int sdr_find_window_center(const u32 grp, const u32 work_bgn, rw_mgr_incr_vfifo(grp); } - debug_cond(DLEVEL == 2, "%s:%d center: failed.\n", + debug_cond(DLEVEL >= 2, "%s:%d center: failed.\n", __func__, __LINE__); return -EINVAL; } @@ -1860,7 +1868,7 @@ static int rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase(const u32 grp) d = 0; - debug_cond(DLEVEL == 2, "%s:%d p: ptap=%u\n", + debug_cond(DLEVEL >= 2, "%s:%d p: ptap=%u\n", __func__, __LINE__, p); } @@ -1872,18 +1880,18 @@ static int rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase(const u32 grp) if (d != 0) work_end -= iocfg->delay_per_dqs_en_dchain_tap; - debug_cond(DLEVEL == 2, + debug_cond(DLEVEL >= 2, "%s:%d p/d: ptap=%u dtap=%u end=%u\n", __func__, __LINE__, p, d - 1, work_end); if (work_end < work_bgn) { /* nil range */ - debug_cond(DLEVEL == 2, "%s:%d end-2: failed\n", + debug_cond(DLEVEL >= 2, "%s:%d end-2: failed\n", __func__, __LINE__); return -EINVAL; } - debug_cond(DLEVEL == 2, "%s:%d found range [%u,%u]\n", + debug_cond(DLEVEL >= 2, "%s:%d found range [%u,%u]\n", __func__, __LINE__, work_bgn, work_end); /* @@ -1891,18 +1899,18 @@ static int rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase(const u32 grp) * To do that we'll back up a ptap and re-find the edge of the * window using dtaps */ - debug_cond(DLEVEL == 2, "%s:%d calculate dtaps_per_ptap for tracking\n", + debug_cond(DLEVEL >= 2, "%s:%d calculate dtaps_per_ptap for tracking\n", __func__, __LINE__); /* Special case code for backing up a phase */ if (p == 0) { p = iocfg->dqs_en_phase_max; rw_mgr_decr_vfifo(grp); - debug_cond(DLEVEL == 2, "%s:%d backedup cycle/phase: p=%u\n", + debug_cond(DLEVEL >= 2, "%s:%d backedup cycle/phase: p=%u\n", __func__, __LINE__, p); } else { p = p - 1; - debug_cond(DLEVEL == 2, "%s:%d backedup phase only: p=%u", + debug_cond(DLEVEL >= 2, "%s:%d backedup phase only: p=%u", __func__, __LINE__, p); } @@ -1915,7 +1923,7 @@ static int rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase(const u32 grp) */ /* Find a passing read. */ - debug_cond(DLEVEL == 2, "%s:%d find passing read\n", + debug_cond(DLEVEL >= 2, "%s:%d find passing read\n", __func__, __LINE__); initial_failing_dtap = d; @@ -1923,13 +1931,13 @@ static int rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase(const u32 grp) found_passing_read = !sdr_find_phase_delay(1, 1, grp, NULL, 0, &d); if (found_passing_read) { /* Find a failing read. */ - debug_cond(DLEVEL == 2, "%s:%d find failing read\n", + debug_cond(DLEVEL >= 2, "%s:%d find failing read\n", __func__, __LINE__); d++; found_failing_read = !sdr_find_phase_delay(0, 1, grp, NULL, 0, &d); } else { - debug_cond(DLEVEL == 1, + debug_cond(DLEVEL >= 1, "%s:%d failed to calculate dtaps per ptap. Fall back on static value\n", __func__, __LINE__); } @@ -1944,7 +1952,7 @@ static int rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase(const u32 grp) dtaps_per_ptap = d - initial_failing_dtap; writel(dtaps_per_ptap, &sdr_reg_file->dtaps_per_ptap); - debug_cond(DLEVEL == 2, "%s:%d dtaps_per_ptap=%u - %u = %u", + debug_cond(DLEVEL >= 2, "%s:%d dtaps_per_ptap=%u - %u = %u", __func__, __LINE__, d, initial_failing_dtap, dtaps_per_ptap); /* Step 6: Find the centre of the window. */ @@ -2000,7 +2008,7 @@ static u32 search_stop_check(const int write, const int d, const int rank_bgn, } *sticky_bit_chk = *sticky_bit_chk | *bit_chk; ret = ret && (*sticky_bit_chk == correct_mask); - debug_cond(DLEVEL == 2, + debug_cond(DLEVEL >= 2, "%s:%d center(left): dtap=%u => %u == %u && %u", __func__, __LINE__, d, *sticky_bit_chk, correct_mask, ret); @@ -2079,7 +2087,7 @@ static void search_left_edge(const int write, const int rank_bgn, *sticky_bit_chk = 0; for (i = per_dqs - 1; i >= 0; i--) { - debug_cond(DLEVEL == 2, + debug_cond(DLEVEL >= 2, "%s:%d vfifo_center: left_edge[%u]: %d right_edge[%u]: %d\n", __func__, __LINE__, i, left_edge[i], i, right_edge[i]); @@ -2092,7 +2100,7 @@ static void search_left_edge(const int write, const int rank_bgn, if ((left_edge[i] == delay_max + 1) && (right_edge[i] != delay_max + 1)) { right_edge[i] = delay_max + 1; - debug_cond(DLEVEL == 2, + debug_cond(DLEVEL >= 2, "%s:%d vfifo_center: reset right_edge[%u]: %d\n", __func__, __LINE__, i, right_edge[i]); } @@ -2222,12 +2230,12 @@ static int search_right_edge(const int write, const int rank_bgn, } } - debug_cond(DLEVEL == 2, "%s:%d center[r,d=%u]: ", + debug_cond(DLEVEL >= 2, "%s:%d center[r,d=%u]: ", __func__, __LINE__, d); - debug_cond(DLEVEL == 2, + debug_cond(DLEVEL >= 2, "bit_chk_test=%i left_edge[%u]: %d ", bit_chk & 1, i, left_edge[i]); - debug_cond(DLEVEL == 2, "right_edge[%u]: %d\n", i, + debug_cond(DLEVEL >= 2, "right_edge[%u]: %d\n", i, right_edge[i]); bit_chk >>= 1; } @@ -2235,7 +2243,7 @@ static int search_right_edge(const int write, const int rank_bgn, /* Check that all bits have a window */ for (i = 0; i < per_dqs; i++) { - debug_cond(DLEVEL == 2, + debug_cond(DLEVEL >= 2, "%s:%d write_center: left_edge[%u]: %d right_edge[%u]: %d", __func__, __LINE__, i, left_edge[i], i, right_edge[i]); @@ -2284,7 +2292,7 @@ static int get_window_mid_index(const int write, int *left_edge, (*mid_min)++; *mid_min = *mid_min / 2; - debug_cond(DLEVEL == 1, "%s:%d vfifo_center: *mid_min=%d (index=%u)\n", + debug_cond(DLEVEL >= 1, "%s:%d vfifo_center: *mid_min=%d (index=%u)\n", __func__, __LINE__, *mid_min, min_index); return min_index; } @@ -2308,15 +2316,15 @@ static void center_dq_windows(const int write, int *left_edge, int *right_edge, const int min_index, const int test_bgn, int *dq_margin, int *dqs_margin) { - const u32 delay_max = write ? iocfg->io_out1_delay_max : + const s32 delay_max = write ? iocfg->io_out1_delay_max : iocfg->io_in_delay_max; - const u32 per_dqs = write ? rwcfg->mem_dq_per_write_dqs : + const s32 per_dqs = write ? rwcfg->mem_dq_per_write_dqs : rwcfg->mem_dq_per_read_dqs; - const u32 delay_off = write ? SCC_MGR_IO_OUT1_DELAY_OFFSET : + const s32 delay_off = write ? SCC_MGR_IO_OUT1_DELAY_OFFSET : SCC_MGR_IO_IN_DELAY_OFFSET; - const u32 addr = SDR_PHYGRP_SCCGRP_ADDRESS | delay_off; + const s32 addr = SDR_PHYGRP_SCCGRP_ADDRESS | delay_off; - u32 temp_dq_io_delay1, temp_dq_io_delay2; + s32 temp_dq_io_delay1; int shift_dq, i, p; /* Initialize data for export structures */ @@ -2330,19 +2338,18 @@ static void center_dq_windows(const int write, int *left_edge, int *right_edge, (left_edge[min_index] - right_edge[min_index]))/2 + (orig_mid_min - mid_min); - debug_cond(DLEVEL == 2, + debug_cond(DLEVEL >= 2, "vfifo_center: before: shift_dq[%u]=%d\n", i, shift_dq); - temp_dq_io_delay1 = readl(addr + (p << 2)); - temp_dq_io_delay2 = readl(addr + (i << 2)); + temp_dq_io_delay1 = readl(addr + (i << 2)); if (shift_dq + temp_dq_io_delay1 > delay_max) - shift_dq = delay_max - temp_dq_io_delay2; + shift_dq = delay_max - temp_dq_io_delay1; else if (shift_dq + temp_dq_io_delay1 < 0) shift_dq = -temp_dq_io_delay1; - debug_cond(DLEVEL == 2, + debug_cond(DLEVEL >= 2, "vfifo_center: after: shift_dq[%u]=%d\n", i, shift_dq); @@ -2355,7 +2362,7 @@ static void center_dq_windows(const int write, int *left_edge, int *right_edge, scc_mgr_load_dq(p); - debug_cond(DLEVEL == 2, + debug_cond(DLEVEL >= 2, "vfifo_center: margin[%u]=[%d,%d]\n", i, left_edge[i] - shift_dq + (-mid_min), right_edge[i] + shift_dq - (-mid_min)); @@ -2437,7 +2444,7 @@ static int rw_mgr_mem_calibrate_vfifo_center(const u32 rank_bgn, scc_mgr_load_dqs(rw_group); writel(0, &sdr_scc_mgr->update); - debug_cond(DLEVEL == 1, + debug_cond(DLEVEL >= 1, "%s:%d vfifo_center: failed to find edge [%u]: %d %d", __func__, __LINE__, i, left_edge[i], right_edge[i]); if (use_read_test) { @@ -2465,7 +2472,7 @@ static int rw_mgr_mem_calibrate_vfifo_center(const u32 rank_bgn, new_dqs = 0; mid_min = start_dqs - new_dqs; - debug_cond(DLEVEL == 1, "vfifo_center: new mid_min=%d new_dqs=%d\n", + debug_cond(DLEVEL >= 1, "vfifo_center: new mid_min=%d new_dqs=%d\n", mid_min, new_dqs); if (iocfg->shift_dqs_en_when_shift_dqs) { @@ -2477,7 +2484,7 @@ static int rw_mgr_mem_calibrate_vfifo_center(const u32 rank_bgn, } new_dqs = start_dqs - mid_min; - debug_cond(DLEVEL == 1, + debug_cond(DLEVEL >= 1, "vfifo_center: start_dqs=%d start_dqs_en=%d new_dqs=%d mid_min=%d\n", start_dqs, iocfg->shift_dqs_en_when_shift_dqs ? start_dqs_en : -1, @@ -2497,7 +2504,7 @@ static int rw_mgr_mem_calibrate_vfifo_center(const u32 rank_bgn, /* Move DQS */ scc_mgr_set_dqs_bus_in_delay(rw_group, new_dqs); scc_mgr_load_dqs(rw_group); - debug_cond(DLEVEL == 2, + debug_cond(DLEVEL >= 2, "%s:%d vfifo_center: dq_margin=%d dqs_margin=%d", __func__, __LINE__, dq_margin, dqs_margin); @@ -2530,7 +2537,7 @@ static int rw_mgr_mem_calibrate_guaranteed_write(const u32 rw_group, /* Set a particular DQ/DQS phase. */ scc_mgr_set_dqdqs_output_phase_all_ranks(rw_group, phase); - debug_cond(DLEVEL == 1, "%s:%d guaranteed write: g=%u p=%u\n", + debug_cond(DLEVEL >= 1, "%s:%d guaranteed write: g=%u p=%u\n", __func__, __LINE__, rw_group, phase); /* @@ -2549,7 +2556,7 @@ static int rw_mgr_mem_calibrate_guaranteed_write(const u32 rw_group, */ ret = rw_mgr_mem_calibrate_read_test_patterns(0, rw_group, 1); if (ret) - debug_cond(DLEVEL == 1, + debug_cond(DLEVEL >= 1, "%s:%d Guaranteed read test failed: g=%u p=%u\n", __func__, __LINE__, rw_group, phase); return ret; @@ -2585,7 +2592,7 @@ static int rw_mgr_mem_calibrate_dqs_enable_calibration(const u32 rw_group, for (i = 0, p = test_bgn, d = 0; i < rwcfg->mem_dq_per_read_dqs; i++, p++, d += delay_step) { - debug_cond(DLEVEL == 1, + debug_cond(DLEVEL >= 1, "%s:%d: g=%u r=%u i=%u p=%u d=%u\n", __func__, __LINE__, rw_group, r, i, p, d); @@ -2602,7 +2609,7 @@ static int rw_mgr_mem_calibrate_dqs_enable_calibration(const u32 rw_group, */ ret = rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase(rw_group); - debug_cond(DLEVEL == 1, + debug_cond(DLEVEL >= 1, "%s:%d: g=%u found=%u; Reseting delay chain to zero\n", __func__, __LINE__, rw_group, !ret); @@ -2808,7 +2815,7 @@ static u32 rw_mgr_mem_calibrate_lfifo(void) do { writel(gbl->curr_read_lat, &phy_mgr_cfg->phy_rlat); - debug_cond(DLEVEL == 2, "%s:%d lfifo: read_lat=%u", + debug_cond(DLEVEL >= 2, "%s:%d lfifo: read_lat=%u", __func__, __LINE__, gbl->curr_read_lat); if (!rw_mgr_mem_calibrate_read_test_all_ranks(0, NUM_READ_TESTS, @@ -2830,14 +2837,14 @@ static u32 rw_mgr_mem_calibrate_lfifo(void) /* Add a fudge factor to the read latency that was determined */ gbl->curr_read_lat += 2; writel(gbl->curr_read_lat, &phy_mgr_cfg->phy_rlat); - debug_cond(DLEVEL == 2, + debug_cond(DLEVEL >= 2, "%s:%d lfifo: success: using read_lat=%u\n", __func__, __LINE__, gbl->curr_read_lat); } else { set_failing_group_stage(0xff, CAL_STAGE_LFIFO, CAL_SUBSTAGE_READ_LATENCY); - debug_cond(DLEVEL == 2, + debug_cond(DLEVEL >= 2, "%s:%d lfifo: failed at initial read_lat=%u\n", __func__, __LINE__, gbl->curr_read_lat); } @@ -3000,7 +3007,7 @@ rw_mgr_mem_calibrate_writes_center(const u32 rank_bgn, const u32 write_group, orig_mid_min = mid_min; new_dqs = start_dqs; mid_min = 0; - debug_cond(DLEVEL == 1, + debug_cond(DLEVEL >= 1, "%s:%d write_center: start_dqs=%d new_dqs=%d mid_min=%d\n", __func__, __LINE__, start_dqs, new_dqs, mid_min); @@ -3013,7 +3020,7 @@ rw_mgr_mem_calibrate_writes_center(const u32 rank_bgn, const u32 write_group, writel(0, &sdr_scc_mgr->update); /* Centre DM */ - debug_cond(DLEVEL == 2, "%s:%d write_center: DM\n", __func__, __LINE__); + debug_cond(DLEVEL >= 2, "%s:%d write_center: DM\n", __func__, __LINE__); /* * Set the left and right edge of each bit to an illegal value. @@ -3047,7 +3054,7 @@ rw_mgr_mem_calibrate_writes_center(const u32 rank_bgn, const u32 write_group, left_edge[0] = -1 * bgn_best; right_edge[0] = end_best; - debug_cond(DLEVEL == 2, "%s:%d dm_calib: left=%d right=%d\n", + debug_cond(DLEVEL >= 2, "%s:%d dm_calib: left=%d right=%d\n", __func__, __LINE__, left_edge[0], right_edge[0]); /* Move DQS (back to orig). */ @@ -3071,14 +3078,14 @@ rw_mgr_mem_calibrate_writes_center(const u32 rank_bgn, const u32 write_group, scc_mgr_apply_group_dm_out1_delay(mid); writel(0, &sdr_scc_mgr->update); - debug_cond(DLEVEL == 2, + debug_cond(DLEVEL >= 2, "%s:%d dm_calib: left=%d right=%d mid=%d dm_margin=%d\n", __func__, __LINE__, left_edge[0], right_edge[0], mid, dm_margin); /* Export values. */ gbl->fom_out += dq_margin + dqs_margin; - debug_cond(DLEVEL == 2, + debug_cond(DLEVEL >= 2, "%s:%d write_center: dq_margin=%d dqs_margin=%d dm_margin=%d\n", __func__, __LINE__, dq_margin, dqs_margin, dm_margin); @@ -3479,6 +3486,7 @@ grp_failed: /* A group failed, increment the counter. */ static int run_mem_calibrate(void) { int pass; + u32 ctrl_cfg; debug("%s:%d\n", __func__, __LINE__); @@ -3486,7 +3494,9 @@ static int run_mem_calibrate(void) writel(PHY_MGR_CAL_RESET, &phy_mgr_cfg->cal_status); /* Stop tracking manager. */ - clrbits_le32(&sdr_ctrl->ctrl_cfg, 1 << 22); + ctrl_cfg = readl(&sdr_ctrl->ctrl_cfg); + writel(ctrl_cfg & ~SDR_CTRLGRP_CTRLCFG_DQSTRKEN_MASK, + &sdr_ctrl->ctrl_cfg); phy_mgr_initialize(); rw_mgr_mem_initialize(); @@ -3507,7 +3517,7 @@ static int run_mem_calibrate(void) writel(0x2, &phy_mgr_cfg->mux_sel); /* Start tracking manager. */ - setbits_le32(&sdr_ctrl->ctrl_cfg, 1 << 22); + writel(ctrl_cfg, &sdr_ctrl->ctrl_cfg); return pass; } @@ -3734,27 +3744,27 @@ int sdram_calibration_full(void) printf("%s: Preparing to start memory calibration\n", __FILE__); debug("%s:%d\n", __func__, __LINE__); - debug_cond(DLEVEL == 1, + debug_cond(DLEVEL >= 1, "DDR3 FULL_RATE ranks=%u cs/dimm=%u dq/dqs=%u,%u vg/dqs=%u,%u ", rwcfg->mem_number_of_ranks, rwcfg->mem_number_of_cs_per_dimm, rwcfg->mem_dq_per_read_dqs, rwcfg->mem_dq_per_write_dqs, rwcfg->mem_virtual_groups_per_read_dqs, rwcfg->mem_virtual_groups_per_write_dqs); - debug_cond(DLEVEL == 1, + debug_cond(DLEVEL >= 1, "dqs=%u,%u dq=%u dm=%u ptap_delay=%u dtap_delay=%u ", rwcfg->mem_if_read_dqs_width, rwcfg->mem_if_write_dqs_width, rwcfg->mem_data_width, rwcfg->mem_data_mask_width, iocfg->delay_per_opa_tap, iocfg->delay_per_dchain_tap); - debug_cond(DLEVEL == 1, "dtap_dqsen_delay=%u, dll=%u", + debug_cond(DLEVEL >= 1, "dtap_dqsen_delay=%u, dll=%u", iocfg->delay_per_dqs_en_dchain_tap, iocfg->dll_chain_length); - debug_cond(DLEVEL == 1, + debug_cond(DLEVEL >= 1, "max values: en_p=%u dqdqs_p=%u en_d=%u dqs_in_d=%u ", iocfg->dqs_en_phase_max, iocfg->dqdqs_out_phase_max, iocfg->dqs_en_delay_max, iocfg->dqs_in_delay_max); - debug_cond(DLEVEL == 1, "io_in_d=%u io_out1_d=%u io_out2_d=%u ", + debug_cond(DLEVEL >= 1, "io_in_d=%u io_out1_d=%u io_out2_d=%u ", iocfg->io_in_delay_max, iocfg->io_out1_delay_max, iocfg->io_out2_delay_max); - debug_cond(DLEVEL == 1, "dqs_in_reserve=%u dqs_out_reserve=%u\n", + debug_cond(DLEVEL >= 1, "dqs_in_reserve=%u dqs_out_reserve=%u\n", iocfg->dqs_in_reserve, iocfg->dqs_out_reserve); hc_initialize_rom_data(); diff --git a/drivers/gpio/pm8916_gpio.c b/drivers/gpio/pm8916_gpio.c index 1abab7f..0b61975 100644 --- a/drivers/gpio/pm8916_gpio.c +++ b/drivers/gpio/pm8916_gpio.c @@ -50,7 +50,7 @@ DECLARE_GLOBAL_DATA_PTR; #define REG_EN_CTL_ENABLE (1 << 7) struct pm8916_gpio_bank { - uint16_t pid; /* Peripheral ID on SPMI bus */ + uint32_t pid; /* Peripheral ID on SPMI bus */ }; static int pm8916_gpio_set_direction(struct udevice *dev, unsigned offset, diff --git a/drivers/memory/Kconfig b/drivers/memory/Kconfig new file mode 100644 index 0000000..4fbb5aa --- /dev/null +++ b/drivers/memory/Kconfig @@ -0,0 +1,18 @@ +# +# Memory devices +# + +menu "Memory Controller drivers" + +config TI_AEMIF + tristate "Texas Instruments AEMIF driver" + depends on ARCH_KEYSTONE + help + This driver is for the AEMIF module available in Texas Instruments + SoCs. AEMIF stands for Asynchronous External Memory Interface and + is intended to provide a glue-less interface to a variety of + asynchronuous memory devices like ASRAM, NOR and NAND memory. A total + of 256M bytes of any of these memories can be accessed at a given + time via four chip selects with 64M byte access per chip select. + +endmenu diff --git a/drivers/mmc/omap_hsmmc.c b/drivers/mmc/omap_hsmmc.c index afe0b06..85a832b 100644 --- a/drivers/mmc/omap_hsmmc.c +++ b/drivers/mmc/omap_hsmmc.c @@ -773,7 +773,8 @@ static int omap_hsmmc_ofdata_to_platdata(struct udevice *dev) struct mmc_config *cfg; int val; - priv->base_addr = (struct hsmmc *)dev_get_addr(dev); + priv->base_addr = map_physmem(dev_get_addr(dev), sizeof(struct hsmmc *), + MAP_NOCACHE); cfg = &priv->cfg; cfg->host_caps = MMC_MODE_HS_52MHz | MMC_MODE_HS; @@ -819,6 +820,11 @@ static int omap_hsmmc_probe(struct udevice *dev) if (mmc == NULL) return -1; +#ifdef OMAP_HSMMC_USE_GPIO + gpio_request_by_name(dev, "cd-gpios", 0, &priv->cd_gpio, GPIOD_IS_IN); + gpio_request_by_name(dev, "wp-gpios", 0, &priv->wp_gpio, GPIOD_IS_IN); +#endif + upriv->mmc = mmc; return 0; diff --git a/drivers/power/pmic/pm8916.c b/drivers/power/pmic/pm8916.c index 9acf5f5..d4c7d4a 100644 --- a/drivers/power/pmic/pm8916.c +++ b/drivers/power/pmic/pm8916.c @@ -18,7 +18,7 @@ DECLARE_GLOBAL_DATA_PTR; #define REG_MASK 0xFF struct pm8916_priv { - uint16_t usid; /* Slave ID on SPMI bus */ + uint32_t usid; /* Slave ID on SPMI bus */ }; static int pm8916_reg_count(struct udevice *dev) diff --git a/drivers/serial/serial_bcm283x_mu.c b/drivers/serial/serial_bcm283x_mu.c index fc36bc0..7357bbf 100644 --- a/drivers/serial/serial_bcm283x_mu.c +++ b/drivers/serial/serial_bcm283x_mu.c @@ -116,9 +116,9 @@ static int bcm283x_mu_serial_pending(struct udevice *dev, bool input) if (input) { WATCHDOG_RESET(); - return lsr & BCM283X_MU_LSR_RX_READY; + return (lsr & BCM283X_MU_LSR_RX_READY) ? 1 : 0; } else { - return !(lsr & BCM283X_MU_LSR_TX_IDLE); + return (lsr & BCM283X_MU_LSR_TX_IDLE) ? 0 : 1; } } diff --git a/include/config_distro_bootcmd.h b/include/config_distro_bootcmd.h index ad9045e..7f67344 100644 --- a/include/config_distro_bootcmd.h +++ b/include/config_distro_bootcmd.h @@ -99,23 +99,43 @@ #endif #ifdef BOOTEFI_NAME +#if defined(CONFIG_ARM) && !defined(CONFIG_ARM64) +/* + * On 32bit ARM systems there is a reasonable number of systems that follow + * the $soc-$board$boardver.dtb name scheme for their device trees. Use that + * scheme if we don't have an explicit fdtfile variable. + */ +#define BOOTENV_EFI_SET_FDTFILE_FALLBACK \ + "if test -z \"${fdtfile}\" -a -n \"${soc}\"; then " \ + "setenv efi_fdtfile ${soc}-${board}${boardver}.dtb; " \ + "fi; " +#else +#define BOOTENV_EFI_SET_FDTFILE_FALLBACK +#endif + + #define BOOTENV_SHARED_EFI \ "boot_efi_binary=" \ "load ${devtype} ${devnum}:${distro_bootpart} " \ "${kernel_addr_r} efi/boot/"BOOTEFI_NAME"; " \ - "bootefi ${kernel_addr_r}\0" \ + "if fdt addr ${fdt_addr_r}; then " \ + "bootefi ${kernel_addr_r} ${fdt_addr_r};" \ + "else" \ + "bootefi ${kernel_addr_r} ${fdtcontroladdr};" \ + "fi\0" \ \ "load_efi_dtb=" \ "load ${devtype} ${devnum}:${distro_bootpart} " \ - "${fdt_addr_r} ${prefix}${fdtfile}; " \ - "fdt addr ${fdt_addr_r}\0" \ + "${fdt_addr_r} ${prefix}${efi_fdtfile}\0" \ \ "efi_dtb_prefixes=/ /dtb/ /dtb/current/\0" \ "scan_dev_for_efi=" \ + "setenv efi_fdtfile ${fdtfile}; " \ + BOOTENV_EFI_SET_FDTFILE_FALLBACK \ "for prefix in ${efi_dtb_prefixes}; do " \ "if test -e ${devtype} " \ "${devnum}:${distro_bootpart} " \ - "${prefix}${fdtfile}; then " \ + "${prefix}${efi_fdtfile}; then " \ "run load_efi_dtb; " \ "fi;" \ "done;" \ @@ -125,7 +145,8 @@ "efi/boot/"BOOTEFI_NAME"; " \ "run boot_efi_binary; " \ "echo EFI LOAD FAILED: continuing...; " \ - "fi; \0" + "fi; " \ + "setenv efi_fdtfile\0" #define SCAN_DEV_FOR_EFI "run scan_dev_for_efi;" #else #define BOOTENV_SHARED_EFI diff --git a/include/config_distro_defaults.h b/include/config_distro_defaults.h index 2ba7cf4..5cc2af8 100644 --- a/include/config_distro_defaults.h +++ b/include/config_distro_defaults.h @@ -62,7 +62,9 @@ #define CONFIG_MENU #define CONFIG_DOS_PARTITION #define CONFIG_EFI_PARTITION +#define CONFIG_ISO_PARTITION #define CONFIG_SUPPORT_RAW_INITRD #define CONFIG_SYS_HUSH_PARSER +#define CONFIG_ENV_VARS_UBOOT_CONFIG #endif /* _CONFIG_CMD_DISTRO_DEFAULTS_H */ diff --git a/include/configs/bcm28155_ap.h b/include/configs/bcm28155_ap.h index bd83aab..be8cb80 100644 --- a/include/configs/bcm28155_ap.h +++ b/include/configs/bcm28155_ap.h @@ -88,8 +88,11 @@ #define CONFIG_BAUDRATE 115200 -#define CONFIG_ENV_SIZE 0x10000 -#define CONFIG_ENV_IS_NOWHERE +/* must fit into GPT:u-boot-env partition */ +#define CONFIG_ENV_IS_IN_MMC +#define CONFIG_SYS_MMC_ENV_DEV 0 +#define CONFIG_ENV_OFFSET (0x00011a00 * 512) +#define CONFIG_ENV_SIZE (8 * 512) #define CONFIG_SYS_NO_FLASH /* Not using NAND/NOR unmanaged flash */ diff --git a/include/configs/colibri_vf.h b/include/configs/colibri_vf.h index 227519f..f79c58a 100644 --- a/include/configs/colibri_vf.h +++ b/include/configs/colibri_vf.h @@ -72,7 +72,6 @@ #define CONFIG_CMD_MMC #define CONFIG_GENERIC_MMC #define CONFIG_CMD_FAT -#define CONFIG_CMD_EXT3 #define CONFIG_CMD_EXT4 #define CONFIG_DOS_PARTITION diff --git a/include/configs/dragonboard410c.h b/include/configs/dragonboard410c.h index a63440f..edf8cfb 100644 --- a/include/configs/dragonboard410c.h +++ b/include/configs/dragonboard410c.h @@ -27,6 +27,8 @@ #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x80000) #define CONFIG_SYS_BOOTM_LEN 0x1000000 /* 16MB max kernel size */ +#define CONFIG_SYS_CACHELINE_SIZE 64 + /* UART */ #define CONFIG_BAUDRATE 115200 @@ -126,10 +128,10 @@ REFLASH(dragonboard/u-boot.img, 8)\ "fdt_high=0xffffffffffffffff\0" \ "initrd_high=0xffffffffffffffff\0" \ "linux_image=Image\0" \ - "linux_addr=0x81000000\0"\ - "fdt_image=apq8016-sbc.dtb\0" \ - "fdt_addr=0x83000000\0"\ - "ramdisk_addr=0x84000000\0"\ + "kernel_addr_r=0x81000000\0"\ + "fdtfile=apq8016-sbc.dtb\0" \ + "fdt_addr_r=0x83000000\0"\ + "ramdisk_addr_r=0x84000000\0"\ BOOTENV #define CONFIG_ENV_IS_NOWHERE diff --git a/include/configs/flea3.h b/include/configs/flea3.h index 3e4aaf6..15905b9 100644 --- a/include/configs/flea3.h +++ b/include/configs/flea3.h @@ -250,7 +250,4 @@ "else echo U-Boot not downloaded..exiting;fi\0" \ "bootcmd=run net_nfs\0" -/* Enable FIT images support */ -#define CONFIG_CMD_FDT - #endif /* __CONFIG_H */ diff --git a/include/configs/ge_bx50v3.h b/include/configs/ge_bx50v3.h index 6fa4a9a..3a9739e 100644 --- a/include/configs/ge_bx50v3.h +++ b/include/configs/ge_bx50v3.h @@ -302,8 +302,6 @@ #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED -#define CONFIG_OF_LIBFDT - #ifndef CONFIG_SYS_DCACHE_OFF #define CONFIG_CMD_CACHE #endif diff --git a/include/configs/ids8313.h b/include/configs/ids8313.h index 5855d81..de51d10 100644 --- a/include/configs/ids8313.h +++ b/include/configs/ids8313.h @@ -559,7 +559,6 @@ #define CONFIG_VERSION_VARIABLE #define CONFIG_IMAGE_FORMAT_LEGACY -#define CONFIG_CMD_FDT #define CONFIG_CMD_HASH #define CONFIG_SHA1 #define CONFIG_SHA256 diff --git a/include/configs/legoev3.h b/include/configs/legoev3.h index 79fa3c4..b6d4a79 100644 --- a/include/configs/legoev3.h +++ b/include/configs/legoev3.h @@ -160,7 +160,6 @@ #define CONFIG_SYS_LONGHELP #define CONFIG_CRC32_VERIFY #define CONFIG_MX_CYCLIC -#define CONFIG_OF_LIBFDT /* * Linux Information @@ -241,7 +240,6 @@ */ #ifdef CONFIG_MMC #define CONFIG_DOS_PARTITION -#define CONFIG_CMD_EXT3 #define CONFIG_CMD_EXT4 #define CONFIG_CMD_FAT #define CONFIG_CMD_MMC diff --git a/include/configs/ma5d4evk.h b/include/configs/ma5d4evk.h index 324f1ce..df141c9 100644 --- a/include/configs/ma5d4evk.h +++ b/include/configs/ma5d4evk.h @@ -148,7 +148,6 @@ #define CONFIG_LOADADDR 0x20800000 #define CONFIG_BOOTCOMMAND "run mmc_mmc" #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR -#define CONFIG_OF_LIBFDT /* * Extra Environments diff --git a/include/configs/pic32mzdask.h b/include/configs/pic32mzdask.h index 78faaec..fccfb48 100644 --- a/include/configs/pic32mzdask.h +++ b/include/configs/pic32mzdask.h @@ -92,11 +92,6 @@ #define CONFIG_BOOTP_GATEWAY #define CONFIG_BOOTP_HOSTNAME -/* - * Handover flattened device tree (dtb file) to Linux kernel - */ -#define CONFIG_OF_LIBFDT 1 - /*----------------------------------------------------------------------- * SDHC Configuration */ diff --git a/include/configs/sandbox.h b/include/configs/sandbox.h index cc22467..2dd7fc0 100644 --- a/include/configs/sandbox.h +++ b/include/configs/sandbox.h @@ -29,7 +29,6 @@ #define CONFIG_SANDBOX_BITS_PER_LONG 64 #define CONFIG_LMB -#define CONFIG_CMD_FDT #define CONFIG_ANDROID_BOOT_IMAGE #define CONFIG_CMD_PCI diff --git a/include/configs/siemens-am33x-common.h b/include/configs/siemens-am33x-common.h index 5b94fad..16f697d 100644 --- a/include/configs/siemens-am33x-common.h +++ b/include/configs/siemens-am33x-common.h @@ -616,7 +616,4 @@ #define CONFIG_BOOTCOUNT_LIMIT #define CONFIG_BOOTCOUNT_ENV -/* Enable Device-Tree (FDT) support */ -#define CONFIG_CMD_FDT - #endif /* ! __CONFIG_SIEMENS_AM33X_COMMON_H */ diff --git a/include/configs/smartweb.h b/include/configs/smartweb.h index 0352379..42ed098 100644 --- a/include/configs/smartweb.h +++ b/include/configs/smartweb.h @@ -233,8 +233,6 @@ # undef CONFIG_CMD_NFS #endif /* CONFIG_MACB */ -#define CONFIG_CMD_FDT - #ifdef CONFIG_SPL_BUILD #define CONFIG_SYS_INIT_SP_ADDR 0x301000 #define CONFIG_SPL_STACK_R diff --git a/include/configs/stm32f746-disco.h b/include/configs/stm32f746-disco.h index 807ab65..e94812b 100644 --- a/include/configs/stm32f746-disco.h +++ b/include/configs/stm32f746-disco.h @@ -11,7 +11,6 @@ #define CONFIG_SYS_THUMB_BUILD /*#define CONFIG_SYS_NO_FLASH*/ -#define CONFIG_OF_LIBFDT #define CONFIG_BOARD_EARLY_INIT_F #define CONFIG_SYS_FLASH_BASE 0x08000000 diff --git a/include/configs/ti_armv7_keystone2.h b/include/configs/ti_armv7_keystone2.h index 41185a1..be3c299 100644 --- a/include/configs/ti_armv7_keystone2.h +++ b/include/configs/ti_armv7_keystone2.h @@ -145,8 +145,6 @@ /* SerDes */ #define CONFIG_TI_KEYSTONE_SERDES -/* AEMIF */ -#define CONFIG_TI_AEMIF #define CONFIG_AEMIF_CNTRL_BASE KS2_AEMIF_CNTRL_BASE /* I2C Configuration */ @@ -210,7 +208,6 @@ #define CONFIG_CMD_DHCP #define CONFIG_CMD_PING #define CONFIG_CMD_SAVES -#define CONFIG_CMD_NAND #define CONFIG_CMD_UBI #define CONFIG_CMD_UBIFS #define CONFIG_CMD_SF diff --git a/include/configs/xilinx-ppc.h b/include/configs/xilinx-ppc.h index d01d88b..831b940 100644 --- a/include/configs/xilinx-ppc.h +++ b/include/configs/xilinx-ppc.h @@ -101,7 +101,6 @@ #define CONFIG_SYS_NO_FLASH #endif -#define CONFIG_OF_LIBFDT 1 #define CONFIG_BAUDRATE 115200 /* The following table includes the supported baudrates */ # define CONFIG_SYS_BAUDRATE_TABLE \ diff --git a/include/configs/xpress.h b/include/configs/xpress.h index 9bc536b..dc7a75b 100644 --- a/include/configs/xpress.h +++ b/include/configs/xpress.h @@ -77,7 +77,6 @@ #define CONFIG_SYS_MMC_ENV_PART 1 /* boot parition */ #define CONFIG_MMCROOT "/dev/mmcblk0p2" /* USDHC2 */ -#define CONFIG_OF_LIBFDT #define CONFIG_CMD_BOOTZ #define CONFIG_CMD_BMODE #define CONFIG_CMD_CACHE diff --git a/include/configs/zipitz2.h b/include/configs/zipitz2.h index 5200e02..46836d5 100644 --- a/include/configs/zipitz2.h +++ b/include/configs/zipitz2.h @@ -45,7 +45,6 @@ #define CONFIG_SETUP_MEMORY_TAGS #define CONFIG_SYS_TEXT_BASE 0x0 #define CONFIG_LZMA /* LZMA compression support */ -#define CONFIG_OF_LIBFDT /* * Serial Console Configuration diff --git a/include/efi_api.h b/include/efi_api.h index 6960448..51d7586 100644 --- a/include/efi_api.h +++ b/include/efi_api.h @@ -259,7 +259,7 @@ struct efi_device_path { struct efi_device_path_file_path { struct efi_device_path dp; - u16 str[16]; + u16 str[32]; }; #define BLOCK_IO_GUID \ diff --git a/include/efi_loader.h b/include/efi_loader.h index 9f61fc4..88b8149 100644 --- a/include/efi_loader.h +++ b/include/efi_loader.h @@ -112,7 +112,7 @@ efi_status_t efi_exit_func(efi_status_t ret); /* Call this to relocate the runtime section to an address space */ void efi_runtime_relocate(ulong offset, struct efi_mem_desc *map); /* Call this to set the current device name */ -void efi_set_bootdev(const char *dev, const char *devnr); +void efi_set_bootdev(const char *dev, const char *devnr, const char *path); /* Generic EFI memory allocator, call this to get memory */ void *efi_alloc(uint64_t len, int memory_type); @@ -155,6 +155,7 @@ static inline void ascii2unicode(u16 *unicode, char *ascii) /* No loader configured, stub out EFI_ENTRY */ static inline void efi_restore_gd(void) { } -static inline void efi_set_bootdev(const char *dev, const char *devnr) { } +static inline void efi_set_bootdev(const char *dev, const char *devnr, + const char *path) { } #endif diff --git a/lib/efi_loader/efi_disk.c b/lib/efi_loader/efi_disk.c index aaff947..28e5b7f 100644 --- a/lib/efi_loader/efi_disk.c +++ b/lib/efi_loader/efi_disk.c @@ -27,6 +27,8 @@ struct efi_disk_obj { struct efi_block_io_media media; /* EFI device path to this block device */ struct efi_device_path_file_path *dp; + /* Offset into disk for simple partitions */ + lbaint_t offset; }; static efi_status_t efi_disk_open_block(void *handle, efi_guid_t *protocol, @@ -81,6 +83,7 @@ static efi_status_t EFIAPI efi_disk_rw_blocks(struct efi_block_io *this, return EFI_EXIT(EFI_DEVICE_ERROR); blksz = desc->blksz; blocks = buffer_size / blksz; + lba += diskobj->offset; #ifdef DEBUG_EFI printf("EFI: %s:%d blocks=%x lba=%"PRIx64" blksz=%x dir=%d\n", __func__, @@ -138,6 +141,78 @@ static const struct efi_block_io block_io_disk_template = { .flush_blocks = &efi_disk_flush_blocks, }; +static void efi_disk_add_dev(char *name, + const struct block_drvr *cur_drvr, + const struct blk_desc *desc, + int dev_index, + lbaint_t offset) +{ + struct efi_disk_obj *diskobj; + struct efi_device_path_file_path *dp; + int objlen = sizeof(*diskobj) + (sizeof(*dp) * 2); + + diskobj = calloc(1, objlen); + + /* Fill in object data */ + diskobj->parent.protocols[0].guid = &efi_block_io_guid; + diskobj->parent.protocols[0].open = efi_disk_open_block; + diskobj->parent.protocols[1].guid = &efi_guid_device_path; + diskobj->parent.protocols[1].open = efi_disk_open_dp; + diskobj->parent.handle = diskobj; + diskobj->ops = block_io_disk_template; + diskobj->ifname = cur_drvr->name; + diskobj->dev_index = dev_index; + diskobj->offset = offset; + + /* Fill in EFI IO Media info (for read/write callbacks) */ + diskobj->media.removable_media = desc->removable; + diskobj->media.media_present = 1; + diskobj->media.block_size = desc->blksz; + diskobj->media.io_align = desc->blksz; + diskobj->media.last_block = desc->lba; + diskobj->ops.media = &diskobj->media; + + /* Fill in device path */ + dp = (void*)&diskobj[1]; + diskobj->dp = dp; + dp[0].dp.type = DEVICE_PATH_TYPE_MEDIA_DEVICE; + dp[0].dp.sub_type = DEVICE_PATH_SUB_TYPE_FILE_PATH; + dp[0].dp.length = sizeof(*dp); + ascii2unicode(dp[0].str, name); + + dp[1].dp.type = DEVICE_PATH_TYPE_END; + dp[1].dp.sub_type = DEVICE_PATH_SUB_TYPE_END; + dp[1].dp.length = sizeof(*dp); + + /* Hook up to the device list */ + list_add_tail(&diskobj->parent.link, &efi_obj_list); +} + +static int efi_disk_create_eltorito(struct blk_desc *desc, + const struct block_drvr *cur_drvr, + int diskid) +{ + int disks = 0; +#ifdef CONFIG_ISO_PARTITION + char devname[32] = { 0 }; /* dp->str is u16[32] long */ + disk_partition_t info; + int part = 1; + + if (desc->part_type != PART_TYPE_ISO) + return 0; + + while (!part_get_info(desc, part, &info)) { + snprintf(devname, sizeof(devname), "%s%d:%d", cur_drvr->name, + diskid, part); + efi_disk_add_dev(devname, cur_drvr, desc, diskid, info.start); + part++; + disks++; + } +#endif + + return disks; +} + /* * U-Boot doesn't have a list of all online disk devices. So when running our * EFI payload, we scan through all of the potentially available ones and @@ -156,10 +231,7 @@ int efi_disk_register(void) printf("Scanning disks on %s...\n", cur_drvr->name); for (i = 0; i < 4; i++) { struct blk_desc *desc; - struct efi_disk_obj *diskobj; - struct efi_device_path_file_path *dp; - int objlen = sizeof(*diskobj) + (sizeof(*dp) * 2); - char devname[16] = { 0 }; /* dp->str is u16[16] long */ + char devname[32] = { 0 }; /* dp->str is u16[32] long */ desc = blk_get_dev(cur_drvr->name, i); if (!desc) @@ -167,43 +239,16 @@ int efi_disk_register(void) if (desc->type == DEV_TYPE_UNKNOWN) continue; - diskobj = calloc(1, objlen); - - /* Fill in object data */ - diskobj->parent.protocols[0].guid = &efi_block_io_guid; - diskobj->parent.protocols[0].open = efi_disk_open_block; - diskobj->parent.protocols[1].guid = &efi_guid_device_path; - diskobj->parent.protocols[1].open = efi_disk_open_dp; - diskobj->parent.handle = diskobj; - diskobj->ops = block_io_disk_template; - diskobj->ifname = cur_drvr->name; - diskobj->dev_index = i; - - /* Fill in EFI IO Media info (for read/write callbacks) */ - diskobj->media.removable_media = desc->removable; - diskobj->media.media_present = 1; - diskobj->media.block_size = desc->blksz; - diskobj->media.io_align = desc->blksz; - diskobj->media.last_block = desc->lba; - diskobj->ops.media = &diskobj->media; - - /* Fill in device path */ - dp = (void*)&diskobj[1]; - diskobj->dp = dp; - dp[0].dp.type = DEVICE_PATH_TYPE_MEDIA_DEVICE; - dp[0].dp.sub_type = DEVICE_PATH_SUB_TYPE_FILE_PATH; - dp[0].dp.length = sizeof(*dp); snprintf(devname, sizeof(devname), "%s%d", cur_drvr->name, i); - ascii2unicode(dp[0].str, devname); - - dp[1].dp.type = DEVICE_PATH_TYPE_END; - dp[1].dp.sub_type = DEVICE_PATH_SUB_TYPE_END; - dp[1].dp.length = sizeof(*dp); - - /* Hook up to the device list */ - list_add_tail(&diskobj->parent.link, &efi_obj_list); + efi_disk_add_dev(devname, cur_drvr, desc, i, 0); disks++; + + /* + * El Torito images show up as block devices + * in an EFI world, so let's create them here + */ + disks += efi_disk_create_eltorito(desc, cur_drvr, i); } } printf("Found %d disks\n", disks); diff --git a/lib/efi_loader/efi_memory.c b/lib/efi_loader/efi_memory.c index 8a1e249..71a3d19 100644 --- a/lib/efi_loader/efi_memory.c +++ b/lib/efi_loader/efi_memory.c @@ -220,7 +220,7 @@ efi_status_t efi_allocate_pages(int type, int memory_type, switch (type) { case 0: /* Any page */ - addr = efi_find_free_memory(len, gd->ram_top); + addr = efi_find_free_memory(len, gd->start_addr_sp); if (!addr) { r = EFI_NOT_FOUND; break; @@ -286,10 +286,13 @@ efi_status_t efi_get_memory_map(unsigned long *memory_map_size, uint32_t *descriptor_version) { ulong map_size = 0; + int map_entries = 0; struct list_head *lhandle; list_for_each(lhandle, &efi_mem) - map_size += sizeof(struct efi_mem_desc); + map_entries++; + + map_size = map_entries * sizeof(struct efi_mem_desc); *memory_map_size = map_size; @@ -301,12 +304,14 @@ efi_status_t efi_get_memory_map(unsigned long *memory_map_size, /* Copy list into array */ if (memory_map) { + /* Return the list in ascending order */ + memory_map = &memory_map[map_entries - 1]; list_for_each(lhandle, &efi_mem) { struct efi_mem_list *lmem; lmem = list_entry(lhandle, struct efi_mem_list, link); *memory_map = lmem->desc; - memory_map++; + memory_map--; } } @@ -315,9 +320,9 @@ efi_status_t efi_get_memory_map(unsigned long *memory_map_size, int efi_memory_init(void) { - uint64_t runtime_start, runtime_end, runtime_pages; - uint64_t uboot_start, uboot_pages; - uint64_t uboot_stack_size = 16 * 1024 * 1024; + unsigned long runtime_start, runtime_end, runtime_pages; + unsigned long uboot_start, uboot_pages; + unsigned long uboot_stack_size = 16 * 1024 * 1024; int i; /* Add RAM */ diff --git a/lib/efi_loader/efi_runtime.c b/lib/efi_loader/efi_runtime.c index 22bcd08..3ee27ca 100644 --- a/lib/efi_loader/efi_runtime.c +++ b/lib/efi_loader/efi_runtime.c @@ -20,6 +20,13 @@ static efi_status_t EFI_RUNTIME_TEXT EFIAPI efi_unimplemented(void); static efi_status_t EFI_RUNTIME_TEXT EFIAPI efi_device_error(void); static efi_status_t EFI_RUNTIME_TEXT EFIAPI efi_invalid_parameter(void); +#ifdef CONFIG_SYS_CACHELINE_SIZE +#define EFI_CACHELINE_SIZE CONFIG_SYS_CACHELINE_SIZE +#else +/* Just use the greatest cache flush alignment requirement I'm aware of */ +#define EFI_CACHELINE_SIZE 128 +#endif + #if defined(CONFIG_ARM64) #define R_RELATIVE 1027 #define R_MASK 0xffffffffULL @@ -194,7 +201,8 @@ void efi_runtime_relocate(ulong offset, struct efi_mem_desc *map) #endif *p = newaddr; - flush_dcache_range((ulong)p, (ulong)&p[1]); + flush_dcache_range((ulong)p & ~(EFI_CACHELINE_SIZE - 1), + ALIGN((ulong)&p[1], EFI_CACHELINE_SIZE)); } #ifndef IS_RELA diff --git a/lib/gunzip.c b/lib/gunzip.c index 6d65ccc..bc746d6 100644 --- a/lib/gunzip.c +++ b/lib/gunzip.c @@ -232,9 +232,8 @@ int gzwrite(unsigned char *src, int len, gzwrite_progress(iteration++, totalfilled, szexpected); - blocks_written = dev->block_write(dev, outblock, - writeblocks, - writebuf); + blocks_written = blk_dwrite(dev, outblock, + writeblocks, writebuf); outblock += blocks_written; if (ctrlc()) { puts("abort\n"); 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