diff options
| -rw-r--r-- | arch/arm/dts/Makefile | 2 | ||||
| -rw-r--r-- | arch/arm/dts/imx7d-sdb-gpmi-weim.dts | 9 | ||||
| -rw-r--r-- | arch/arm/dts/imx7d-sdb-gpmi-weim.dtsi | 23 | ||||
| -rw-r--r-- | arch/arm/dts/imx7d-sdb-qspi.dts | 9 | ||||
| -rw-r--r-- | arch/arm/dts/imx7d-sdb-qspi.dtsi | 44 | ||||
| -rw-r--r-- | arch/arm/dts/imx7d.dtsi | 9 | ||||
| -rw-r--r-- | board/freescale/mx7dsabresd/mx7dsabresd.c | 4 | ||||
| -rw-r--r-- | configs/mx7dsabresd_nand_defconfig | 73 | ||||
| -rw-r--r-- | configs/mx7dsabresd_qspi1_defconfig | 76 | ||||
| -rw-r--r-- | include/configs/mx7dsabresd.h | 60 |
10 files changed, 282 insertions, 27 deletions
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 3c3dbd7..5b3ae83 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -364,6 +364,8 @@ dtb-$(CONFIG_MX6) += imx6ul-14x14-ddr3-arm2.dtb \ dtb-$(CONFIG_MX7) += imx7-colibri.dtb \ imx7d-sdb.dtb \ imx7d-sdb-epdc.dtb \ + imx7d-sdb-gpmi-weim.dtb \ + imx7d-sdb-qspi.dtb \ imx7d-sdb-reva.dtb dtb-$(CONFIG_SOC_KEYSTONE) += keystone-k2hk-evm.dtb \ diff --git a/arch/arm/dts/imx7d-sdb-gpmi-weim.dts b/arch/arm/dts/imx7d-sdb-gpmi-weim.dts new file mode 100644 index 0000000..346e38c --- /dev/null +++ b/arch/arm/dts/imx7d-sdb-gpmi-weim.dts @@ -0,0 +1,9 @@ +/* + * Copyright (C) 2015 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#include "imx7d-sdb.dts" +#include "imx7d-sdb-gpmi-weim.dtsi" diff --git a/arch/arm/dts/imx7d-sdb-gpmi-weim.dtsi b/arch/arm/dts/imx7d-sdb-gpmi-weim.dtsi new file mode 100644 index 0000000..3a1208f --- /dev/null +++ b/arch/arm/dts/imx7d-sdb-gpmi-weim.dtsi @@ -0,0 +1,23 @@ +/* + * Copyright (C) 2015 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +&gpmi{ + status = "okay"; +}; + +&sai1{ + status = "disabled"; +}; + +&usdhc3{ + status = "disabled"; +}; + +&uart5{ + status = "disabled"; +}; diff --git a/arch/arm/dts/imx7d-sdb-qspi.dts b/arch/arm/dts/imx7d-sdb-qspi.dts new file mode 100644 index 0000000..a469905 --- /dev/null +++ b/arch/arm/dts/imx7d-sdb-qspi.dts @@ -0,0 +1,9 @@ +/* + * Copyright (C) 2015 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#include "imx7d-sdb.dts" +#include "imx7d-sdb-qspi.dtsi" diff --git a/arch/arm/dts/imx7d-sdb-qspi.dtsi b/arch/arm/dts/imx7d-sdb-qspi.dtsi new file mode 100644 index 0000000..c684b56 --- /dev/null +++ b/arch/arm/dts/imx7d-sdb-qspi.dtsi @@ -0,0 +1,44 @@ +/* + * Copyright (C) 2015 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +/* disable epdc, conflict with qspi */ +&epdc { + status = "disabled"; +}; + +&iomuxc { + qspi1 { + pinctrl_qspi1_1: qspi1grp_1 { + fsl,pins = < + MX7D_PAD_EPDC_DATA00__QSPI_A_DATA0 0x51 + MX7D_PAD_EPDC_DATA01__QSPI_A_DATA1 0x51 + MX7D_PAD_EPDC_DATA02__QSPI_A_DATA2 0x51 + MX7D_PAD_EPDC_DATA03__QSPI_A_DATA3 0x51 + MX7D_PAD_EPDC_DATA05__QSPI_A_SCLK 0x51 + MX7D_PAD_EPDC_DATA06__QSPI_A_SS0_B 0x51 + >; + }; + }; +}; + +&qspi1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_qspi1_1>; + status = "okay"; + ddrsmp=<0>; + + flash0: mx25l51245g@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "spi-flash"; + spi-max-frequency = <29000000>; + /* take off one dummy cycle */ + spi-nor,ddr-quad-read-dummy = <5>; + reg = <0>; + }; +}; diff --git a/arch/arm/dts/imx7d.dtsi b/arch/arm/dts/imx7d.dtsi index 9a83607..ead741f 100644 --- a/arch/arm/dts/imx7d.dtsi +++ b/arch/arm/dts/imx7d.dtsi @@ -37,10 +37,11 @@ serial4 = &uart5; serial5 = &uart6; serial6 = &uart7; - spi0 = &ecspi1; - spi1 = &ecspi2; - spi2 = &ecspi3; - spi3 = &ecspi4; + spi1 = &qspi1; + spi2 = &ecspi1; + spi3 = &ecspi2; + spi4 = &ecspi3; + spi5 = &ecspi4; }; cpus { diff --git a/board/freescale/mx7dsabresd/mx7dsabresd.c b/board/freescale/mx7dsabresd/mx7dsabresd.c index 2300e43..0a5fb7e 100644 --- a/board/freescale/mx7dsabresd/mx7dsabresd.c +++ b/board/freescale/mx7dsabresd/mx7dsabresd.c @@ -290,6 +290,7 @@ int board_phy_config(struct phy_device *phydev) #endif #ifdef CONFIG_FSL_QSPI +#ifndef CONFIG_DM_SPI static iomux_v3_cfg_t const quadspi_pads[] = { MX7D_PAD_EPDC_DATA00__QSPI_A_DATA0 | MUX_PAD_CTRL(QSPI_PAD_CTRL), MX7D_PAD_EPDC_DATA01__QSPI_A_DATA1 | MUX_PAD_CTRL(QSPI_PAD_CTRL), @@ -298,12 +299,15 @@ static iomux_v3_cfg_t const quadspi_pads[] = { MX7D_PAD_EPDC_DATA05__QSPI_A_SCLK | MUX_PAD_CTRL(QSPI_PAD_CTRL), MX7D_PAD_EPDC_DATA06__QSPI_A_SS0_B | MUX_PAD_CTRL(QSPI_PAD_CTRL), }; +#endif int board_qspi_init(void) { +#ifndef CONFIG_DM_SPI /* Set the iomux */ imx_iomux_v3_setup_multiple_pads(quadspi_pads, ARRAY_SIZE(quadspi_pads)); +#endif /* Set the clock */ set_clk_qspi(); diff --git a/configs/mx7dsabresd_nand_defconfig b/configs/mx7dsabresd_nand_defconfig new file mode 100644 index 0000000..7021814 --- /dev/null +++ b/configs/mx7dsabresd_nand_defconfig @@ -0,0 +1,73 @@ +CONFIG_ARM=y +CONFIG_ARCH_MX7=y +CONFIG_TARGET_MX7DSABRESD=y +CONFIG_ARMV7_BOOT_SEC_DEFAULT=y +CONFIG_IMX_RDC=y +CONFIG_IMX_BOOTAUX=y +CONFIG_VIDEO=y +CONFIG_DEFAULT_DEVICE_TREE="imx7d-sdb-gpmi-weim" +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx7dsabresd/imximage.cfg" +CONFIG_NAND_BOOT=y +CONFIG_BOOTDELAY=3 +# CONFIG_CONSOLE_MUX is not set +CONFIG_SYS_CONSOLE_IS_IN_ENV=y +CONFIG_HUSH_PARSER=y +# CONFIG_CMD_BOOTD is not set +CONFIG_CMD_BOOTZ=y +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_EXPORTENV is not set +# CONFIG_CMD_IMPORTENV is not set +CONFIG_CMD_MEMTEST=y +CONFIG_CMD_MMC=y +CONFIG_CMD_SF=y +CONFIG_CMD_I2C=y +CONFIG_CMD_USB=y +CONFIG_CMD_DFU=y +CONFIG_CMD_USB_MASS_STORAGE=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_DHCP=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_PMIC=y +CONFIG_CMD_REGULATOR=y +CONFIG_CMD_EXT2=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_CMD_FAT=y +CONFIG_OF_CONTROL=y +# CONFIG_BLK is not set +CONFIG_DFU_MMC=y +CONFIG_DFU_RAM=y +CONFIG_DM_GPIO=y +CONFIG_DM_74X164=y +CONFIG_DM_I2C=y +CONFIG_DM_MMC=y +# CONFIG_DM_MMC_OPS is not set +CONFIG_SPI_FLASH=y +CONFIG_SPI_FLASH_EON=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_IMX7=y +CONFIG_DM_PMIC=y +CONFIG_DM_PMIC_PFUZE100=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_PFUZE100=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_REGULATOR_GPIO=y +CONFIG_DM_SPI=y +CONFIG_SOFT_SPI=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USB_EHCI_HCD=y +CONFIG_MXC_USB_OTG_HACTIVE=y +CONFIG_USB_STORAGE=y +CONFIG_USB_GADGET=y +CONFIG_CI_UDC=y +CONFIG_USB_GADGET_DOWNLOAD=y +CONFIG_G_DNL_MANUFACTURER="FSL" +CONFIG_G_DNL_VENDOR_NUM=0x0525 +CONFIG_G_DNL_PRODUCT_NUM=0xa4a5 +CONFIG_ERRNO_STR=y +CONFIG_DM_ETH=y diff --git a/configs/mx7dsabresd_qspi1_defconfig b/configs/mx7dsabresd_qspi1_defconfig new file mode 100644 index 0000000..83a35ce --- /dev/null +++ b/configs/mx7dsabresd_qspi1_defconfig @@ -0,0 +1,76 @@ +CONFIG_ARM=y +CONFIG_ARCH_MX7=y +CONFIG_TARGET_MX7DSABRESD=y +CONFIG_ARMV7_BOOT_SEC_DEFAULT=y +CONFIG_IMX_RDC=y +CONFIG_IMX_BOOTAUX=y +CONFIG_VIDEO=y +CONFIG_DEFAULT_DEVICE_TREE="imx7d-sdb-qspi" +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx7dsabresd/imximage.cfg" +CONFIG_QSPI_BOOT=y +CONFIG_BOOTDELAY=3 +# CONFIG_CONSOLE_MUX is not set +CONFIG_SYS_CONSOLE_IS_IN_ENV=y +CONFIG_HUSH_PARSER=y +# CONFIG_CMD_BOOTD is not set +CONFIG_CMD_BOOTZ=y +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_EXPORTENV is not set +# CONFIG_CMD_IMPORTENV is not set +CONFIG_CMD_MEMTEST=y +CONFIG_CMD_MMC=y +CONFIG_CMD_SF=y +CONFIG_CMD_I2C=y +CONFIG_CMD_USB=y +CONFIG_CMD_DFU=y +CONFIG_CMD_USB_MASS_STORAGE=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_DHCP=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_PMIC=y +CONFIG_CMD_REGULATOR=y +CONFIG_CMD_EXT2=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_CMD_FAT=y +CONFIG_OF_CONTROL=y +# CONFIG_BLK is not set +CONFIG_DFU_MMC=y +CONFIG_DFU_RAM=y +CONFIG_DM_GPIO=y +CONFIG_DM_74X164=y +CONFIG_DM_I2C=y +CONFIG_DM_MMC=y +# CONFIG_DM_MMC_OPS is not set +CONFIG_SPI_FLASH=y +CONFIG_SPI_FLASH_EON=y +CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_FLASH_BAR=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_IMX7=y +CONFIG_DM_PMIC=y +CONFIG_DM_PMIC_PFUZE100=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_PFUZE100=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_REGULATOR_GPIO=y +CONFIG_DM_SPI=y +CONFIG_DM_SPI_FLASH=y +CONFIG_SOFT_SPI=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USB_EHCI_HCD=y +CONFIG_MXC_USB_OTG_HACTIVE=y +CONFIG_USB_STORAGE=y +CONFIG_USB_GADGET=y +CONFIG_CI_UDC=y +CONFIG_USB_GADGET_DOWNLOAD=y +CONFIG_G_DNL_MANUFACTURER="FSL" +CONFIG_G_DNL_VENDOR_NUM=0x0525 +CONFIG_G_DNL_PRODUCT_NUM=0xa4a5 +CONFIG_ERRNO_STR=y +CONFIG_DM_ETH=y diff --git a/include/configs/mx7dsabresd.h b/include/configs/mx7dsabresd.h index 54e490e..7f68def 100644 --- a/include/configs/mx7dsabresd.h +++ b/include/configs/mx7dsabresd.h @@ -53,28 +53,26 @@ #define CONFIG_SYS_I2C_MXC #define CONFIG_SYS_I2C_SPEED 100000 -#ifdef CONFIG_SYS_BOOT_QSPI -#define CONFIG_SYS_USE_QSPI +#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */ +#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 + +#ifdef CONFIG_QSPI_BOOT +#define CONFIG_FSL_QSPI #define CONFIG_ENV_IS_IN_SPI_FLASH -#elif defined CONFIG_SYS_BOOT_NAND -#define CONFIG_SYS_USE_NAND +#elif defined CONFIG_NAND_BOOT +#define CONFIG_NAND_MXS #define CONFIG_ENV_IS_IN_NAND #else #define CONFIG_ENV_IS_IN_MMC #endif -#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */ -#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 - #ifdef CONFIG_IMX_BOOTAUX -/* Set to QSPI1 A flash at default */ -#define CONFIG_SYS_AUXCORE_BOOTDATA 0x60000000 #define UPDATE_M4_ENV \ "m4image=m4_qspi.bin\0" \ "loadm4image=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${m4image}\0" \ "update_m4_from_sd=" \ - "if sf probe 0:0; then " \ + "if sf probe 1:0; then " \ "if run loadm4image; then " \ "setexpr fw_sz ${filesize} + 0xffff; " \ "setexpr fw_sz ${fw_sz} / 0x10000; " \ @@ -83,12 +81,12 @@ "sf write ${loadaddr} 0x0 ${filesize}; " \ "fi; " \ "fi\0" \ - "m4boot=sf probe 0:0; bootaux "__stringify(CONFIG_SYS_AUXCORE_BOOTDATA)"\0" + "m4boot=sf probe 1:0; bootaux "__stringify(CONFIG_SYS_AUXCORE_BOOTDATA)"\0" #else #define UPDATE_M4_ENV "" #endif -#ifdef CONFIG_SYS_BOOT_NAND +#ifdef CONFIG_NAND_BOOT #define MFG_NAND_PARTITION "mtdparts=gpmi-nand:64m(boot),16m(kernel),16m(dtb),1m(misc),-(rootfs) " #else #define MFG_NAND_PARTITION "" @@ -121,9 +119,9 @@ "fdt_addr=0x83000000\0" \ "fdt_high=0xffffffff\0" \ "console=ttymxc0\0" \ - "bootargs=console=ttymxc0,115200 ubi.mtd=3 " \ + "bootargs=console=ttymxc0,115200 ubi.mtd=4 " \ "root=ubi0:rootfs rootfstype=ubifs " \ - "mtdparts=gpmi-nand:64m(boot),16m(kernel),16m(dtb),-(rootfs)\0"\ + "mtdparts=gpmi-nand:64m(boot),16m(kernel),16m(dtb),1m(misc),-(rootfs)\0"\ "bootcmd=nand read ${loadaddr} 0x4000000 0x800000;"\ "nand read ${fdt_addr} 0x5000000 0x100000;"\ "bootz ${loadaddr} - ${fdt_addr}\0" @@ -232,18 +230,37 @@ /* environment organization */ #define CONFIG_ENV_SIZE SZ_8K -#define CONFIG_ENV_IS_IN_MMC +#if defined(CONFIG_ENV_IS_IN_MMC) +#define CONFIG_ENV_OFFSET (13 * SZ_64K) +#elif defined(CONFIG_ENV_IS_IN_SPI_FLASH) +#define CONFIG_ENV_OFFSET (832 * 1024) +#define CONFIG_ENV_SECT_SIZE (64 * 1024) +#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS +#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS +#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE +#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED +#elif defined(CONFIG_ENV_IS_IN_NAND) +#undef CONFIG_ENV_SIZE +#define CONFIG_ENV_OFFSET (60 << 20) +#define CONFIG_ENV_SECT_SIZE (128 << 10) +#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE +#endif + +#ifdef CONFIG_FSL_QSPI +#define CONFIG_SYS_AUXCORE_BOOTDATA 0x60100000 /* Set to QSPI1 A flash, offset 1M */ +#else +#define CONFIG_SYS_AUXCORE_BOOTDATA 0x7F8000 /* Set to TCML address */ +#endif /* * If want to use nand, define CONFIG_NAND_MXS and rework board * to support nand, since emmc has pin conflicts with nand */ -#ifdef CONFIG_SYS_USE_NAND +#ifdef CONFIG_NAND_MXS #define CONFIG_CMD_NAND #define CONFIG_CMD_NAND_TRIMFFS /* NAND stuff */ -#define CONFIG_NAND_MXS #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE 0x40000000 #define CONFIG_SYS_NAND_5_ADDR_CYCLE @@ -255,7 +272,6 @@ #define CONFIG_APBH_DMA_BURST8 #endif -#define CONFIG_ENV_OFFSET (8 * SZ_64K) #ifdef CONFIG_NAND_MXS #define CONFIG_SYS_FSL_USDHC_NUM 1 #else @@ -312,15 +328,13 @@ #define CONFIG_WAVEFORM_BUF_SIZE 0x400000 #endif -#if defined(CONFIG_MXC_EPDC) && defined(CONFIG_SYS_USE_QSPI) +#if defined(CONFIG_MXC_EPDC) && defined(CONFIG_FSL_QSPI) #error "EPDC Pins conflicts QSPI, Either EPDC or QSPI can be enabled!" #endif #ifdef CONFIG_FSL_QSPI -#define CONFIG_SPI_FLASH -#define CONFIG_SPI_FLASH_MACRONIX -#define CONFIG_SPI_FLASH_BAR -#define CONFIG_SF_DEFAULT_BUS 0 +#define CONFIG_SYS_FSL_QSPI_AHB +#define CONFIG_SF_DEFAULT_BUS 1 /* SOFT SPI occupies the BUS 0, so change the QSPI1 to BUS 1*/ #define CONFIG_SF_DEFAULT_CS 0 #define CONFIG_SF_DEFAULT_SPEED 40000000 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 |