diff options
| -rw-r--r-- | arch/arm/cpu/armv7/am33xx/ddr.c | 4 | ||||
| -rw-r--r-- | arch/arm/cpu/armv7/am33xx/emif4.c | 101 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-am33xx/ddr_defs.h | 4 |
3 files changed, 48 insertions, 61 deletions
diff --git a/arch/arm/cpu/armv7/am33xx/ddr.c b/arch/arm/cpu/armv7/am33xx/ddr.c index c37f91b..b4b3c01 100644 --- a/arch/arm/cpu/armv7/am33xx/ddr.c +++ b/arch/arm/cpu/armv7/am33xx/ddr.c @@ -85,7 +85,7 @@ int config_ddr_phy(struct ddr_phy_control *p) /** * Configure DDR CMD control registers */ -int config_cmd_ctrl(struct cmd_control *cmd) +int config_cmd_ctrl(const struct cmd_control *cmd) { writel(cmd->cmd0csratio, &ddr_reg[0]->cm0csratio); writel(cmd->cmd0csforce, &ddr_reg[0]->cm0csforce); @@ -111,7 +111,7 @@ int config_cmd_ctrl(struct cmd_control *cmd) /** * Configure DDR DATA registers */ -int config_ddr_data(int macrono, struct ddr_data *data) +int config_ddr_data(int macrono, const struct ddr_data *data) { writel(data->datardsratio0, &ddr_reg[macrono]->dt0rdsratio0); writel(data->datardsratio1, &ddr_reg[macrono]->dt0rdsratio1); diff --git a/arch/arm/cpu/armv7/am33xx/emif4.c b/arch/arm/cpu/armv7/am33xx/emif4.c index 8f7aadc..26c6a66 100644 --- a/arch/arm/cpu/armv7/am33xx/emif4.c +++ b/arch/arm/cpu/armv7/am33xx/emif4.c @@ -47,58 +47,47 @@ void dram_init_banksize(void) #ifdef CONFIG_SPL_BUILD -static void data_macro_config(int dataMacroNum) -{ - struct ddr_data data; - - data.datardsratio0 = ((DDR2_RD_DQS<<30)|(DDR2_RD_DQS<<20) - |(DDR2_RD_DQS<<10)|(DDR2_RD_DQS<<0)); - data.datardsratio1 = DDR2_RD_DQS>>2; - data.datawdsratio0 = ((DDR2_WR_DQS<<30)|(DDR2_WR_DQS<<20) - |(DDR2_WR_DQS<<10)|(DDR2_WR_DQS<<0)); - data.datawdsratio1 = DDR2_WR_DQS>>2; - data.datawiratio0 = ((DDR2_PHY_WRLVL<<30)|(DDR2_PHY_WRLVL<<20) - |(DDR2_PHY_WRLVL<<10)|(DDR2_PHY_WRLVL<<0)); - data.datawiratio1 = DDR2_PHY_WRLVL>>2; - data.datagiratio0 = ((DDR2_PHY_GATELVL<<30)|(DDR2_PHY_GATELVL<<20) - |(DDR2_PHY_GATELVL<<10)|(DDR2_PHY_GATELVL<<0)); - data.datagiratio1 = DDR2_PHY_GATELVL>>2; - data.datafwsratio0 = ((DDR2_PHY_FIFO_WE<<30)|(DDR2_PHY_FIFO_WE<<20) - |(DDR2_PHY_FIFO_WE<<10)|(DDR2_PHY_FIFO_WE<<0)); - data.datafwsratio1 = DDR2_PHY_FIFO_WE>>2; - data.datawrsratio0 = ((DDR2_PHY_WR_DATA<<30)|(DDR2_PHY_WR_DATA<<20) - |(DDR2_PHY_WR_DATA<<10)|(DDR2_PHY_WR_DATA<<0)); - data.datawrsratio1 = DDR2_PHY_WR_DATA>>2; - data.datadldiff0 = PHY_DLL_LOCK_DIFF; - - config_ddr_data(dataMacroNum, &data); -} - -static void cmd_macro_config(void) -{ - struct cmd_control cmd; - - cmd.cmd0csratio = DDR2_RATIO; - cmd.cmd0csforce = CMD_FORCE; - cmd.cmd0csdelay = CMD_DELAY; - cmd.cmd0dldiff = DDR2_DLL_LOCK_DIFF; - cmd.cmd0iclkout = DDR2_INVERT_CLKOUT; - - cmd.cmd1csratio = DDR2_RATIO; - cmd.cmd1csforce = CMD_FORCE; - cmd.cmd1csdelay = CMD_DELAY; - cmd.cmd1dldiff = DDR2_DLL_LOCK_DIFF; - cmd.cmd1iclkout = DDR2_INVERT_CLKOUT; - - cmd.cmd2csratio = DDR2_RATIO; - cmd.cmd2csforce = CMD_FORCE; - cmd.cmd2csdelay = CMD_DELAY; - cmd.cmd2dldiff = DDR2_DLL_LOCK_DIFF; - cmd.cmd2iclkout = DDR2_INVERT_CLKOUT; - - config_cmd_ctrl(&cmd); - -} +static const struct ddr_data ddr2_data = { + .datardsratio0 = ((DDR2_RD_DQS<<30)|(DDR2_RD_DQS<<20) + |(DDR2_RD_DQS<<10)|(DDR2_RD_DQS<<0)), + .datardsratio1 = DDR2_RD_DQS>>2, + .datawdsratio0 = ((DDR2_WR_DQS<<30)|(DDR2_WR_DQS<<20) + |(DDR2_WR_DQS<<10)|(DDR2_WR_DQS<<0)), + .datawdsratio1 = DDR2_WR_DQS>>2, + .datawiratio0 = ((DDR2_PHY_WRLVL<<30)|(DDR2_PHY_WRLVL<<20) + |(DDR2_PHY_WRLVL<<10)|(DDR2_PHY_WRLVL<<0)), + .datawiratio1 = DDR2_PHY_WRLVL>>2, + .datagiratio0 = ((DDR2_PHY_GATELVL<<30)|(DDR2_PHY_GATELVL<<20) + |(DDR2_PHY_GATELVL<<10)|(DDR2_PHY_GATELVL<<0)), + .datagiratio1 = DDR2_PHY_GATELVL>>2, + .datafwsratio0 = ((DDR2_PHY_FIFO_WE<<30)|(DDR2_PHY_FIFO_WE<<20) + |(DDR2_PHY_FIFO_WE<<10)|(DDR2_PHY_FIFO_WE<<0)), + .datafwsratio1 = DDR2_PHY_FIFO_WE>>2, + .datawrsratio0 = ((DDR2_PHY_WR_DATA<<30)|(DDR2_PHY_WR_DATA<<20) + |(DDR2_PHY_WR_DATA<<10)|(DDR2_PHY_WR_DATA<<0)), + .datawrsratio1 = DDR2_PHY_WR_DATA>>2, + .datadldiff0 = PHY_DLL_LOCK_DIFF, +}; + +static const struct cmd_control ddr2_cmd_ctrl_data = { + .cmd0csratio = DDR2_RATIO, + .cmd0csforce = CMD_FORCE, + .cmd0csdelay = CMD_DELAY, + .cmd0dldiff = DDR2_DLL_LOCK_DIFF, + .cmd0iclkout = DDR2_INVERT_CLKOUT, + + .cmd1csratio = DDR2_RATIO, + .cmd1csforce = CMD_FORCE, + .cmd1csdelay = CMD_DELAY, + .cmd1dldiff = DDR2_DLL_LOCK_DIFF, + .cmd1iclkout = DDR2_INVERT_CLKOUT, + + .cmd2csratio = DDR2_RATIO, + .cmd2csforce = CMD_FORCE, + .cmd2csdelay = CMD_DELAY, + .cmd2dldiff = DDR2_DLL_LOCK_DIFF, + .cmd2iclkout = DDR2_INVERT_CLKOUT, +}; static void config_vtp(void) { @@ -156,18 +145,16 @@ static void config_emif_ddr2(void) void config_ddr(void) { - int data_macro_0 = 0; - int data_macro_1 = 1; struct ddr_ioctrl ioctrl; enable_emif_clocks(); config_vtp(); - cmd_macro_config(); + config_cmd_ctrl(&ddr2_cmd_ctrl_data); - data_macro_config(data_macro_0); - data_macro_config(data_macro_1); + config_ddr_data(0, &ddr2_data); + config_ddr_data(1, &ddr2_data); writel(PHY_RANK0_DELAY, &ddrregs->dt0rdelays0); writel(PHY_RANK0_DELAY, &ddrregs->dt1rdelays0); diff --git a/arch/arm/include/asm/arch-am33xx/ddr_defs.h b/arch/arm/include/asm/arch-am33xx/ddr_defs.h index c62f826..087082f 100644 --- a/arch/arm/include/asm/arch-am33xx/ddr_defs.h +++ b/arch/arm/include/asm/arch-am33xx/ddr_defs.h @@ -190,12 +190,12 @@ struct ddr_data { /** * Configure DDR CMD control registers */ -int config_cmd_ctrl(struct cmd_control *cmd); +int config_cmd_ctrl(const struct cmd_control *cmd); /** * Configure DDR DATA registers */ -int config_ddr_data(int data_macrono, struct ddr_data *data); +int config_ddr_data(int data_macrono, const struct ddr_data *data); /** * This structure represents the DDR io control on AM33XX devices. |