diff options
| -rw-r--r-- | arch/arm/cpu/armv7/mx6/clock.c | 12 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-mx6/clock.h | 1 |
2 files changed, 13 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/mx6/clock.c b/arch/arm/cpu/armv7/mx6/clock.c index 4614a1f..51e5211 100644 --- a/arch/arm/cpu/armv7/mx6/clock.c +++ b/arch/arm/cpu/armv7/mx6/clock.c @@ -961,6 +961,18 @@ void enable_qspi_clk(int qspi_num) } #endif +#if defined(CONFIG_VIDEO_GIS) +void mxs_set_vadcclk() +{ + u32 reg = 0; + + reg = readl(&imx_ccm->cscmr2); + reg &= ~MXC_CCM_CSCMR2_VID_CLK_SEL_MASK; + reg |= 0x19 << MXC_CCM_CSCMR2_VID_CLK_SEL_OFFSET; + writel(reg, &imx_ccm->cscmr2); +} +#endif + #ifdef CONFIG_FEC_MXC int enable_fec_anatop_clock(int fec_id, enum enet_freq freq) { diff --git a/arch/arm/include/asm/arch-mx6/clock.h b/arch/arm/include/asm/arch-mx6/clock.h index d27d49b..b32b858 100644 --- a/arch/arm/include/asm/arch-mx6/clock.h +++ b/arch/arm/include/asm/arch-mx6/clock.h @@ -83,4 +83,5 @@ void enable_thermal_clk(void); void mxs_set_lcdclk(u32 base_addr, u32 freq); void select_ldb_di_clock_source(enum ldb_di_clock clk); void enable_eim_clk(unsigned char enable); +void mxs_set_vadcclk(void); #endif /* __ASM_ARCH_CLOCK_H */ |