diff options
| -rw-r--r-- | board/boundary/nitrogen6x/nitrogen6x.c | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/board/boundary/nitrogen6x/nitrogen6x.c b/board/boundary/nitrogen6x/nitrogen6x.c index daa3fc8..53cb8df 100644 --- a/board/boundary/nitrogen6x/nitrogen6x.c +++ b/board/boundary/nitrogen6x/nitrogen6x.c @@ -30,6 +30,7 @@ #include <i2c.h> DECLARE_GLOBAL_DATA_PTR; +#define GP_USB_OTG_PWR IMX_GPIO_NR(3, 22) #define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \ @@ -179,6 +180,14 @@ iomux_v3_cfg_t const enet_pads2[] = { MX6_PAD_RGMII_RX_CTL__RGMII_RX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL), }; +static iomux_v3_cfg_t const misc_pads[] = { + MX6_PAD_GPIO_1__USB_OTG_ID | MUX_PAD_CTRL(WEAK_PULLUP), + MX6_PAD_KEY_COL4__USBOH3_USBOTG_OC | MUX_PAD_CTRL(WEAK_PULLUP), + MX6_PAD_EIM_D30__USBOH3_USBH1_OC | MUX_PAD_CTRL(WEAK_PULLUP), + /* OTG Power enable */ + MX6_PAD_EIM_D22__GPIO_3_22 | MUX_PAD_CTRL(OUTPUT_40OHM), +}; + /* wl1271 pads on nitrogen6x */ iomux_v3_cfg_t const wl12xx_pads[] = { (MX6_PAD_NANDF_CS1__GPIO_6_14 & ~MUX_PAD_CTRL_MASK) @@ -250,6 +259,15 @@ int board_ehci_hcd_init(int port) return 0; } + +int board_ehci_power(int port, int on) +{ + if (port) + return 0; + gpio_set_value(GP_USB_OTG_PWR, on); + return 0; +} + #endif #ifdef CONFIG_FSL_ESDHC @@ -369,6 +387,11 @@ int board_eth_init(bd_t *bis) free(bus); } #endif + +#ifdef CONFIG_MV_UDC + /* For otg ethernet*/ + usb_eth_initialize(bis); +#endif return 0; } @@ -685,6 +708,7 @@ int board_early_init_f(void) gpio_direction_input(WL12XX_WL_IRQ_GP); gpio_direction_output(WL12XX_WL_ENABLE_GP, 0); gpio_direction_output(WL12XX_BT_ENABLE_GP, 0); + gpio_direction_output(GP_USB_OTG_PWR, 0); /* OTG power off */ imx_iomux_v3_setup_multiple_pads(wl12xx_pads, ARRAY_SIZE(wl12xx_pads)); setup_buttons(); @@ -713,6 +737,8 @@ int board_init(void) IOMUXC_GPR1_OTG_ID_MASK, IOMUXC_GPR1_OTG_ID_GPIO1); + imx_iomux_v3_setup_multiple_pads(misc_pads, ARRAY_SIZE(misc_pads)); + /* address of boot parameters */ gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; |