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-rw-r--r--arch/arm/cpu/armv7/omap-common/boot-common.c17
-rw-r--r--arch/arm/cpu/armv7/omap-common/emif-common.c9
-rw-r--r--arch/arm/cpu/armv7/omap5/Kconfig4
-rw-r--r--arch/arm/cpu/armv7/omap5/hw_data.c12
-rw-r--r--arch/arm/cpu/armv7/omap5/prcm-regs.c3
-rw-r--r--arch/arm/cpu/armv7/omap5/sdram.c2
-rw-r--r--arch/arm/include/asm/arch-am33xx/spl.h1
-rw-r--r--arch/arm/include/asm/arch-omap5/clock.h12
-rw-r--r--arch/arm/include/asm/arch-omap5/omap.h4
-rw-r--r--arch/arm/include/asm/omap_common.h3
-rw-r--r--board/comelit/dig297/dig297.c5
-rw-r--r--board/compulab/cm_t35/cm_t35.c7
-rw-r--r--board/corscience/tricorder/tricorder.c7
-rw-r--r--board/isee/igep00x0/igep00x0.c7
-rw-r--r--board/logicpd/omap3som/omap3logic.c7
-rw-r--r--board/logicpd/zoom1/zoom1.c5
-rw-r--r--board/matrix_vision/mvblx/mvblx.c6
-rw-r--r--board/nokia/rx51/rx51.c6
-rw-r--r--board/overo/overo.c7
-rw-r--r--board/pandora/pandora.c5
-rw-r--r--board/siemens/common/board.c9
-rw-r--r--board/siemens/common/factoryset.c52
-rw-r--r--board/siemens/common/factoryset.h2
-rw-r--r--board/siemens/draco/board.c9
-rw-r--r--board/siemens/pxm2/board.c34
-rw-r--r--board/siemens/rut/board.c23
-rw-r--r--board/technexion/tao3530/tao3530.c7
-rw-r--r--board/ti/beagle/beagle.c7
-rw-r--r--board/ti/beagle_x15/Kconfig12
-rw-r--r--board/ti/beagle_x15/Makefile8
-rw-r--r--board/ti/beagle_x15/board.c395
-rw-r--r--board/ti/beagle_x15/mux_data.h55
-rw-r--r--board/ti/dra7xx/evm.c12
-rw-r--r--board/ti/dra7xx/mux_data.h4
-rw-r--r--board/ti/evm/evm.c8
-rw-r--r--board/ti/sdp3430/sdp.c5
-rw-r--r--board/timll/devkit8000/devkit8000.c7
-rw-r--r--configs/beagle_x15_defconfig5
-rw-r--r--drivers/mmc/mmc.c7
-rw-r--r--drivers/mmc/omap_hsmmc.c12
-rw-r--r--drivers/mtd/nand/omap_gpmc.c9
-rw-r--r--drivers/power/palmas.c2
-rw-r--r--drivers/power/twl4030.c28
-rw-r--r--drivers/serial/ns16550.c9
-rw-r--r--drivers/spi/ti_qspi.c8
-rw-r--r--drivers/usb/phy/omap_usb_phy.c2
-rw-r--r--include/configs/beagle_x15.h88
-rw-r--r--include/configs/cm_t54.h1
-rw-r--r--include/configs/dra7xx_evm.h1
-rw-r--r--include/configs/omap5_uevm.h1
-rw-r--r--include/configs/pxm2.h4
-rw-r--r--include/configs/rut.h4
-rw-r--r--include/configs/ti_omap5_common.h5
-rw-r--r--include/linux/usb/xhci-omap.h4
-rw-r--r--include/mmc.h1
-rw-r--r--include/twl4030.h2
56 files changed, 870 insertions, 101 deletions
diff --git a/arch/arm/cpu/armv7/omap-common/boot-common.c b/arch/arm/cpu/armv7/omap-common/boot-common.c
index fb535eb..cb18908 100644
--- a/arch/arm/cpu/armv7/omap-common/boot-common.c
+++ b/arch/arm/cpu/armv7/omap-common/boot-common.c
@@ -33,8 +33,19 @@ void save_omap_boot_params(void)
* used. But it not correct to assume that romcode structure
* encoding would be same as u-boot. So use the defined offsets.
*/
- gd->arch.omap_boot_params.omap_bootdevice = boot_device =
- *((u8 *)(rom_params + BOOT_DEVICE_OFFSET));
+ boot_device = *((u8 *)(rom_params + BOOT_DEVICE_OFFSET));
+
+#if defined(BOOT_DEVICE_NAND_I2C)
+ /*
+ * Re-map NAND&I2C boot-device to the "normal" NAND boot-device.
+ * Otherwise the SPL boot IF can't handle this device correctly.
+ * Somehow booting with Hynix 4GBit NAND H27U4G8 on Siemens
+ * Draco leads to this boot-device passed to SPL from the BootROM.
+ */
+ if (boot_device == BOOT_DEVICE_NAND_I2C)
+ boot_device = BOOT_DEVICE_NAND;
+#endif
+ gd->arch.omap_boot_params.omap_bootdevice = boot_device;
gd->arch.omap_boot_params.ch_flags =
*((u8 *)(rom_params + CH_FLAGS_OFFSET));
@@ -57,7 +68,7 @@ void save_omap_boot_params(void)
}
}
-#ifdef CONFIG_DRA7XX
+#if defined(CONFIG_DRA7XX) || defined(CONFIG_AM57XX)
/*
* We get different values for QSPI_1 and QSPI_4 being used, but
* don't actually care about this difference. Rather than
diff --git a/arch/arm/cpu/armv7/omap-common/emif-common.c b/arch/arm/cpu/armv7/omap-common/emif-common.c
index c8e9bc8..e601ba1 100644
--- a/arch/arm/cpu/armv7/omap-common/emif-common.c
+++ b/arch/arm/cpu/armv7/omap-common/emif-common.c
@@ -1226,13 +1226,14 @@ void dmm_init(u32 base)
emif1_enabled = 1;
emif2_enabled = 1;
break;
- } else if (valid == 1) {
+ }
+
+ if (valid == 1)
emif1_enabled = 1;
- } else if (valid == 2) {
+
+ if (valid == 2)
emif2_enabled = 1;
- }
}
-
}
static void do_bug0039_workaround(u32 base)
diff --git a/arch/arm/cpu/armv7/omap5/Kconfig b/arch/arm/cpu/armv7/omap5/Kconfig
index 129982c..aca862d 100644
--- a/arch/arm/cpu/armv7/omap5/Kconfig
+++ b/arch/arm/cpu/armv7/omap5/Kconfig
@@ -12,6 +12,9 @@ config TARGET_OMAP5_UEVM
config TARGET_DRA7XX_EVM
bool "TI DRA7XX"
+config TARGET_BEAGLE_X15
+ bool "BeagleBoard X15"
+
endchoice
config SYS_SOC
@@ -20,5 +23,6 @@ config SYS_SOC
source "board/compulab/cm_t54/Kconfig"
source "board/ti/omap5_uevm/Kconfig"
source "board/ti/dra7xx/Kconfig"
+source "board/ti/beagle_x15/Kconfig"
endif
diff --git a/arch/arm/cpu/armv7/omap5/hw_data.c b/arch/arm/cpu/armv7/omap5/hw_data.c
index 0257383..95f1686 100644
--- a/arch/arm/cpu/armv7/omap5/hw_data.c
+++ b/arch/arm/cpu/armv7/omap5/hw_data.c
@@ -365,31 +365,31 @@ struct vcores_data dra752_volts = {
.mpu.value = VDD_MPU_DRA752,
.mpu.efuse.reg = STD_FUSE_OPP_VMIN_MPU_NOM,
.mpu.efuse.reg_bits = DRA752_EFUSE_REGBITS,
- .mpu.addr = TPS659038_REG_ADDR_SMPS12_MPU,
+ .mpu.addr = TPS659038_REG_ADDR_SMPS12,
.mpu.pmic = &tps659038,
.eve.value = VDD_EVE_DRA752,
.eve.efuse.reg = STD_FUSE_OPP_VMIN_DSPEVE_NOM,
.eve.efuse.reg_bits = DRA752_EFUSE_REGBITS,
- .eve.addr = TPS659038_REG_ADDR_SMPS45_EVE,
+ .eve.addr = TPS659038_REG_ADDR_SMPS45,
.eve.pmic = &tps659038,
.gpu.value = VDD_GPU_DRA752,
.gpu.efuse.reg = STD_FUSE_OPP_VMIN_GPU_NOM,
.gpu.efuse.reg_bits = DRA752_EFUSE_REGBITS,
- .gpu.addr = TPS659038_REG_ADDR_SMPS6_GPU,
+ .gpu.addr = TPS659038_REG_ADDR_SMPS6,
.gpu.pmic = &tps659038,
.core.value = VDD_CORE_DRA752,
.core.efuse.reg = STD_FUSE_OPP_VMIN_CORE_NOM,
.core.efuse.reg_bits = DRA752_EFUSE_REGBITS,
- .core.addr = TPS659038_REG_ADDR_SMPS7_CORE,
+ .core.addr = TPS659038_REG_ADDR_SMPS7,
.core.pmic = &tps659038,
.iva.value = VDD_IVA_DRA752,
.iva.efuse.reg = STD_FUSE_OPP_VMIN_IVA_NOM,
.iva.efuse.reg_bits = DRA752_EFUSE_REGBITS,
- .iva.addr = TPS659038_REG_ADDR_SMPS8_IVA,
+ .iva.addr = TPS659038_REG_ADDR_SMPS8,
.iva.pmic = &tps659038,
};
@@ -593,7 +593,7 @@ const struct ctrl_ioregs ioregs_dra72x_es1 = {
.ctrl_ddr_ctrl_ext_0 = 0xA2000000,
};
-void hw_data_init(void)
+void __weak hw_data_init(void)
{
u32 omap_rev = omap_revision();
diff --git a/arch/arm/cpu/armv7/omap5/prcm-regs.c b/arch/arm/cpu/armv7/omap5/prcm-regs.c
index ff08ef4..0745d42 100644
--- a/arch/arm/cpu/armv7/omap5/prcm-regs.c
+++ b/arch/arm/cpu/armv7/omap5/prcm-regs.c
@@ -376,6 +376,7 @@ struct omap_sys_ctrl_regs const omap5_ctrl = {
struct omap_sys_ctrl_regs const dra7xx_ctrl = {
.control_status = 0x4A002134,
+ .control_phy_power_usb = 0x4A002370,
.control_phy_power_sata = 0x4A002374,
.control_core_mac_id_0_lo = 0x4A002514,
.control_core_mac_id_0_hi = 0x4A002518,
@@ -800,6 +801,7 @@ struct prcm_regs const dra7xx_prcm = {
.cm_clkmode_dpll_dsp = 0x4a005234,
.cm_shadow_freq_config1 = 0x4a005260,
.cm_clkmode_dpll_gmac = 0x4a0052a8,
+ .cm_coreaon_usb_phy_core_clkctrl = 0x4a008640,
.cm_coreaon_usb_phy2_core_clkctrl = 0x4a008688,
/* cm1.mpu */
@@ -906,6 +908,7 @@ struct prcm_regs const dra7xx_prcm = {
.cm_gmac_gmac_clkctrl = 0x4a0093d0,
.cm_l3init_ocp2scp1_clkctrl = 0x4a0093e0,
.cm_l3init_ocp2scp3_clkctrl = 0x4a0093e8,
+ .cm_l3init_usb_otg_ss_clkctrl = 0x4a0093f0,
/* cm2.l4per */
.cm_l4per_clkstctrl = 0x4a009700,
diff --git a/arch/arm/cpu/armv7/omap5/sdram.c b/arch/arm/cpu/armv7/omap5/sdram.c
index 065199b..7d8cec0 100644
--- a/arch/arm/cpu/armv7/omap5/sdram.c
+++ b/arch/arm/cpu/armv7/omap5/sdram.c
@@ -513,7 +513,7 @@ const struct lpddr2_mr_regs mr_regs = {
.mr16 = MR16_REF_FULL_ARRAY
};
-static void emif_get_ext_phy_ctrl_const_regs(u32 emif_nr,
+void __weak emif_get_ext_phy_ctrl_const_regs(u32 emif_nr,
const u32 **regs,
u32 *size)
{
diff --git a/arch/arm/include/asm/arch-am33xx/spl.h b/arch/arm/include/asm/arch-am33xx/spl.h
index 8543f43..e756418 100644
--- a/arch/arm/include/asm/arch-am33xx/spl.h
+++ b/arch/arm/include/asm/arch-am33xx/spl.h
@@ -25,6 +25,7 @@
#else
#define BOOT_DEVICE_XIP 2
#define BOOT_DEVICE_NAND 5
+#define BOOT_DEVICE_NAND_I2C 6
#if defined(CONFIG_AM33XX)
#define BOOT_DEVICE_MMC1 8
#define BOOT_DEVICE_MMC2 9 /* eMMC or daughter card */
diff --git a/arch/arm/include/asm/arch-omap5/clock.h b/arch/arm/include/asm/arch-omap5/clock.h
index 30d9de2..0dc584b 100644
--- a/arch/arm/include/asm/arch-omap5/clock.h
+++ b/arch/arm/include/asm/arch-omap5/clock.h
@@ -278,11 +278,11 @@
/* TPS659038 */
#define TPS659038_I2C_SLAVE_ADDR 0x58
-#define TPS659038_REG_ADDR_SMPS12_MPU 0x23
-#define TPS659038_REG_ADDR_SMPS45_EVE 0x2B
-#define TPS659038_REG_ADDR_SMPS6_GPU 0x2F
-#define TPS659038_REG_ADDR_SMPS7_CORE 0x33
-#define TPS659038_REG_ADDR_SMPS8_IVA 0x37
+#define TPS659038_REG_ADDR_SMPS12 0x23
+#define TPS659038_REG_ADDR_SMPS45 0x2B
+#define TPS659038_REG_ADDR_SMPS6 0x2F
+#define TPS659038_REG_ADDR_SMPS7 0x33
+#define TPS659038_REG_ADDR_SMPS8 0x37
/* TPS */
#define TPS62361_I2C_SLAVE_ADDR 0x60
@@ -314,7 +314,7 @@
*/
#define CONFIG_DEFAULT_OMAP_RESET_TIME_MAX_USEC 31219
-#ifdef CONFIG_DRA7XX
+#if defined(CONFIG_DRA7XX) || defined(CONFIG_AM57XX)
#define V_OSCK 20000000 /* Clock output from T2 */
#else
#define V_OSCK 19200000 /* Clock output from T2 */
diff --git a/arch/arm/include/asm/arch-omap5/omap.h b/arch/arm/include/asm/arch-omap5/omap.h
index b9600cf..e218159 100644
--- a/arch/arm/include/asm/arch-omap5/omap.h
+++ b/arch/arm/include/asm/arch-omap5/omap.h
@@ -27,7 +27,7 @@
#define CONTROL_CORE_ID_CODE 0x4A002204
#define CONTROL_WKUP_ID_CODE 0x4AE0C204
-#ifdef CONFIG_DRA7XX
+#if defined(CONFIG_DRA7XX) || defined(CONFIG_AM57XX)
#define CONTROL_ID_CODE CONTROL_WKUP_ID_CODE
#else
#define CONTROL_ID_CODE CONTROL_CORE_ID_CODE
@@ -163,7 +163,7 @@ struct s32ktimer {
* much larger) and do not, at this time, make use of the additional
* space.
*/
-#ifdef CONFIG_DRA7XX
+#if defined(CONFIG_DRA7XX) || defined(CONFIG_AM57XX)
#define NON_SECURE_SRAM_START 0x40300000
#define NON_SECURE_SRAM_END 0x40380000 /* Not inclusive */
#else
diff --git a/arch/arm/include/asm/omap_common.h b/arch/arm/include/asm/omap_common.h
index 1838234..323952f 100644
--- a/arch/arm/include/asm/omap_common.h
+++ b/arch/arm/include/asm/omap_common.h
@@ -540,6 +540,7 @@ extern struct prcm_regs const omap5_es2_prcm;
extern struct prcm_regs const omap4_prcm;
extern struct prcm_regs const dra7xx_prcm;
extern struct dplls const **dplls_data;
+extern struct dplls dra7xx_dplls;
extern struct vcores_data const **omap_vcores;
extern const u32 sys_clk_array[8];
extern struct omap_sys_ctrl_regs const **ctrl;
@@ -547,6 +548,8 @@ extern struct omap_sys_ctrl_regs const omap4_ctrl;
extern struct omap_sys_ctrl_regs const omap5_ctrl;
extern struct omap_sys_ctrl_regs const dra7xx_ctrl;
+extern struct pmic_data tps659038;
+
void hw_data_init(void);
const struct dpll_params *get_mpu_dpll_params(struct dplls const *);
diff --git a/board/comelit/dig297/dig297.c b/board/comelit/dig297/dig297.c
index 2b826df..9d4c41b 100644
--- a/board/comelit/dig297/dig297.c
+++ b/board/comelit/dig297/dig297.c
@@ -133,6 +133,11 @@ int board_mmc_init(bd_t *bis)
{
return omap_mmc_init(0, 0, 0, -1, -1);
}
+
+void board_mmc_power_init(void)
+{
+ twl4030_power_mmc_init(0);
+}
#endif
#ifdef CONFIG_CMD_NET
diff --git a/board/compulab/cm_t35/cm_t35.c b/board/compulab/cm_t35/cm_t35.c
index 886c723..43463d5 100644
--- a/board/compulab/cm_t35/cm_t35.c
+++ b/board/compulab/cm_t35/cm_t35.c
@@ -382,6 +382,13 @@ int board_mmc_init(bd_t *bis)
}
#endif
+#if defined(CONFIG_GENERIC_MMC)
+void board_mmc_power_init(void)
+{
+ twl4030_power_mmc_init(0);
+}
+#endif
+
#ifdef CONFIG_SYS_I2C_OMAP34XX
/*
* Routine: reset_net_chip
diff --git a/board/corscience/tricorder/tricorder.c b/board/corscience/tricorder/tricorder.c
index 9e81bf3..0fddf45 100644
--- a/board/corscience/tricorder/tricorder.c
+++ b/board/corscience/tricorder/tricorder.c
@@ -147,6 +147,13 @@ int board_mmc_init(bd_t *bis)
}
#endif
+#if defined(CONFIG_GENERIC_MMC)
+void board_mmc_power_init(void)
+{
+ twl4030_power_mmc_init(0);
+}
+#endif
+
/*
* Routine: get_board_mem_timings
* Description: If we use SPL then there is no x-loader nor config header
diff --git a/board/isee/igep00x0/igep00x0.c b/board/isee/igep00x0/igep00x0.c
index 7b87cc2..47522f8 100644
--- a/board/isee/igep00x0/igep00x0.c
+++ b/board/isee/igep00x0/igep00x0.c
@@ -150,6 +150,13 @@ int board_mmc_init(bd_t *bis)
}
#endif
+#if defined(CONFIG_GENERIC_MMC)
+void board_mmc_power_init(void)
+{
+ twl4030_power_mmc_init(0);
+}
+#endif
+
void set_fdt(void)
{
switch (gd->bd->bi_arch_number) {
diff --git a/board/logicpd/omap3som/omap3logic.c b/board/logicpd/omap3som/omap3logic.c
index 1fd9f2c..609edf1 100644
--- a/board/logicpd/omap3som/omap3logic.c
+++ b/board/logicpd/omap3som/omap3logic.c
@@ -128,6 +128,13 @@ int board_mmc_init(bd_t *bis)
}
#endif
+#if defined(CONFIG_GENERIC_MMC)
+void board_mmc_power_init(void)
+{
+ twl4030_power_mmc_init(0);
+}
+#endif
+
#ifdef CONFIG_SMC911X
/* GPMC CS1 settings for Logic SOM LV/Torpedo LAN92xx Ethernet chip */
static const u32 gpmc_lan92xx_config[] = {
diff --git a/board/logicpd/zoom1/zoom1.c b/board/logicpd/zoom1/zoom1.c
index 9ef0026..d39203a 100644
--- a/board/logicpd/zoom1/zoom1.c
+++ b/board/logicpd/zoom1/zoom1.c
@@ -109,6 +109,11 @@ int board_mmc_init(bd_t *bis)
{
return omap_mmc_init(0, 0, 0, -1, -1);
}
+
+void board_mmc_power_init(void)
+{
+ twl4030_power_mmc_init(0);
+}
#endif
#ifdef CONFIG_CMD_NET
diff --git a/board/matrix_vision/mvblx/mvblx.c b/board/matrix_vision/mvblx/mvblx.c
index a69359f..c9d615b 100644
--- a/board/matrix_vision/mvblx/mvblx.c
+++ b/board/matrix_vision/mvblx/mvblx.c
@@ -94,6 +94,12 @@ int board_mmc_init(bd_t *bis)
omap_mmc_init(1, 0, 0, -1, -1);
return 0;
}
+
+void board_mmc_power_init(void)
+{
+ twl4030_power_mmc_init(0);
+ twl4030_power_mmc_init(1);
+}
#endif
#if defined(CONFIG_CMD_NET)
diff --git a/board/nokia/rx51/rx51.c b/board/nokia/rx51/rx51.c
index c2e07db..b6b8ad6 100644
--- a/board/nokia/rx51/rx51.c
+++ b/board/nokia/rx51/rx51.c
@@ -659,3 +659,9 @@ int board_mmc_init(bd_t *bis)
omap_mmc_init(1, 0, 0, -1, -1);
return 0;
}
+
+void board_mmc_power_init(void)
+{
+ twl4030_power_mmc_init(0);
+ twl4030_power_mmc_init(1);
+}
diff --git a/board/overo/overo.c b/board/overo/overo.c
index dfb8602..b7f85e7 100644
--- a/board/overo/overo.c
+++ b/board/overo/overo.c
@@ -493,6 +493,13 @@ int board_mmc_init(bd_t *bis)
}
#endif
+#if defined(CONFIG_GENERIC_MMC)
+void board_mmc_power_init(void)
+{
+ twl4030_power_mmc_init(0);
+}
+#endif
+
#if defined(CONFIG_USB_EHCI) && !defined(CONFIG_SPL_BUILD)
static struct omap_usbhs_board_data usbhs_bdata = {
.port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED,
diff --git a/board/pandora/pandora.c b/board/pandora/pandora.c
index 146dcea..59b5a7e 100644
--- a/board/pandora/pandora.c
+++ b/board/pandora/pandora.c
@@ -126,4 +126,9 @@ int board_mmc_init(bd_t *bis)
{
return omap_mmc_init(0, 0, 0, -1, -1);
}
+
+void board_mmc_power_init(void)
+{
+ twl4030_power_mmc_init(0);
+}
#endif
diff --git a/board/siemens/common/board.c b/board/siemens/common/board.c
index 2782bcc..cc0ac6b 100644
--- a/board/siemens/common/board.c
+++ b/board/siemens/common/board.c
@@ -96,15 +96,6 @@ const struct dpll_params *get_dpll_ddr_params(void)
return &dpll_ddr;
}
-#ifdef CONFIG_BOARD_LATE_INIT
-int board_late_init(void)
-{
- omap_nand_switch_ecc(1, 8);
-
- return 0;
-}
-#endif
-
#ifndef CONFIG_SPL_BUILD
#if defined(BOARD_DFU_BUTTON_GPIO)
/*
diff --git a/board/siemens/common/factoryset.c b/board/siemens/common/factoryset.c
index 266dbbb..7baac3d 100644
--- a/board/siemens/common/factoryset.c
+++ b/board/siemens/common/factoryset.c
@@ -86,6 +86,7 @@ int get_factory_record_val(unsigned char *eeprom_buf, int size, uchar *record,
int i, nxt = 0;
int c;
unsigned char end = 0xff;
+ unsigned char tmp;
for (i = 0; fact_get_char(i) != end; i = nxt) {
nxt = i + 1;
@@ -93,6 +94,7 @@ int get_factory_record_val(unsigned char *eeprom_buf, int size, uchar *record,
int pos;
int endpos;
int z;
+ int level = 0;
c = strncmp((char *)&eeprom_buf[i + 1], (char *)record,
strlen((char *)record));
@@ -103,22 +105,30 @@ int get_factory_record_val(unsigned char *eeprom_buf, int size, uchar *record,
/* search for "<" */
c = -1;
for (z = pos; fact_get_char(z) != end; z++) {
- if ((fact_get_char(z) == '<') ||
- (fact_get_char(z) == '>')) {
- endpos = z;
- nxt = endpos;
- c = 0;
- break;
+ if (fact_get_char(z) == '<') {
+ if (level == 0) {
+ endpos = z;
+ nxt = endpos;
+ c = 0;
+ break;
+ } else {
+ level--;
+ }
}
+ if (fact_get_char(z) == '>')
+ level++;
}
+ } else {
+ continue;
}
if (c == 0) {
/* end found -> call get_factory_val */
+ tmp = eeprom_buf[endpos];
eeprom_buf[endpos] = end;
ret = get_factory_val(&eeprom_buf[pos],
- size - pos, name, buf, len);
+ endpos - pos, name, buf, len);
/* fix buffer */
- eeprom_buf[endpos] = '<';
+ eeprom_buf[endpos] = tmp;
debug("%s: %s.%s = %s\n",
__func__, record, name, buf);
return ret;
@@ -210,15 +220,6 @@ int factoryset_read_eeprom(int i2c_addr)
printf("DFU USB: VID = 0x%4x, PID = 0x%4x\n", factory_dat.usb_vendor_id,
factory_dat.usb_product_id);
#endif
- if (0 <= get_factory_record_val(cp, size, (uchar *)"DEV",
- (uchar *)"id", buf,
- MAX_STRING_LENGTH)) {
- if (strncmp((const char *)buf, "PXM50", 5) == 0)
- factory_dat.pxm50 = 1;
- else
- factory_dat.pxm50 = 0;
- }
- debug("PXM50: %d\n", factory_dat.pxm50);
#if defined(CONFIG_VIDEO)
if (0 <= get_factory_record_val(cp, size, (uchar *)"DISP1",
(uchar *)"name", factory_dat.disp_name,
@@ -238,6 +239,23 @@ int factoryset_read_eeprom(int i2c_addr)
NULL, 16);
debug("version number: %d\n", factory_dat.version);
}
+ /* Get ASN from factory set if available */
+ if (0 <= get_factory_record_val(cp, size, (uchar *)"DEV",
+ (uchar *)"id", factory_dat.asn,
+ MAX_STRING_LENGTH)) {
+ debug("factoryset asn: %s\n", factory_dat.asn);
+ } else {
+ factory_dat.asn[0] = 0;
+ }
+ /* Get COMP/ver from factory set if available */
+ if (0 <= get_factory_record_val(cp, size, (uchar *)"COMP",
+ (uchar *)"ver",
+ factory_dat.comp_version,
+ MAX_STRING_LENGTH)) {
+ debug("factoryset COMP/ver: %s\n", factory_dat.comp_version);
+ } else {
+ strcpy((char *)factory_dat.comp_version, "1.0");
+ }
return 0;
diff --git a/board/siemens/common/factoryset.h b/board/siemens/common/factoryset.h
index 4d6de10..3f23d5e 100644
--- a/board/siemens/common/factoryset.h
+++ b/board/siemens/common/factoryset.h
@@ -20,6 +20,8 @@ struct factorysetcontainer {
#endif
unsigned char serial[MAX_STRING_LENGTH];
int version;
+ uchar asn[MAX_STRING_LENGTH];
+ uchar comp_version[MAX_STRING_LENGTH];
};
int factoryset_read_eeprom(int i2c_addr);
diff --git a/board/siemens/draco/board.c b/board/siemens/draco/board.c
index 9be2e34..ede73ba 100644
--- a/board/siemens/draco/board.c
+++ b/board/siemens/draco/board.c
@@ -280,4 +280,13 @@ U_BOOT_CMD(
#endif /* #if defined(CONFIG_DRIVER_TI_CPSW) */
#endif /* #if (defined(CONFIG_DRIVER_TI_CPSW) && !defined(CONFIG_SPL_BUILD)) */
+#ifdef CONFIG_BOARD_LATE_INIT
+int board_late_init(void)
+{
+ omap_nand_switch_ecc(1, 8);
+
+ return 0;
+}
+#endif
+
#include "../common/board.c"
diff --git a/board/siemens/pxm2/board.c b/board/siemens/pxm2/board.c
index 559af0e..264ba02 100644
--- a/board/siemens/pxm2/board.c
+++ b/board/siemens/pxm2/board.c
@@ -428,4 +428,38 @@ static int board_video_init(void)
return 0;
}
#endif
+
+#ifdef CONFIG_BOARD_LATE_INIT
+int board_late_init(void)
+{
+ int ret;
+
+ omap_nand_switch_ecc(1, 8);
+
+#ifdef CONFIG_FACTORYSET
+ if (factory_dat.asn[0] != 0) {
+ char tmp[2 * MAX_STRING_LENGTH + 2];
+
+ if (strncmp((const char *)factory_dat.asn, "PXM50", 5) == 0)
+ factory_dat.pxm50 = 1;
+ else
+ factory_dat.pxm50 = 0;
+ sprintf(tmp, "%s_%s", factory_dat.asn,
+ factory_dat.comp_version);
+ ret = setenv("boardid", tmp);
+ if (ret)
+ printf("error setting board id\n");
+ } else {
+ factory_dat.pxm50 = 1;
+ ret = setenv("boardid", "PXM50_1.0");
+ if (ret)
+ printf("error setting board id\n");
+ }
+ debug("PXM50: %d\n", factory_dat.pxm50);
+#endif
+
+ return 0;
+}
+#endif
+
#include "../common/board.c"
diff --git a/board/siemens/rut/board.c b/board/siemens/rut/board.c
index 1752df2..fb840f7 100644
--- a/board/siemens/rut/board.c
+++ b/board/siemens/rut/board.c
@@ -467,4 +467,27 @@ static int board_video_init(void)
return 0;
}
#endif /* ifdef CONFIG_VIDEO */
+
+#ifdef CONFIG_BOARD_LATE_INIT
+int board_late_init(void)
+{
+ int ret;
+ char tmp[2 * MAX_STRING_LENGTH + 2];
+
+ omap_nand_switch_ecc(1, 8);
+
+ if (factory_dat.asn[0] != 0)
+ sprintf(tmp, "%s_%s", factory_dat.asn,
+ factory_dat.comp_version);
+ else
+ sprintf(tmp, "QMX7.E38_4.0");
+
+ ret = setenv("boardid", tmp);
+ if (ret)
+ printf("error setting board id\n");
+
+ return 0;
+}
+#endif
+
#include "../common/board.c"
diff --git a/board/technexion/tao3530/tao3530.c b/board/technexion/tao3530/tao3530.c
index 44a8240..744ff44 100644
--- a/board/technexion/tao3530/tao3530.c
+++ b/board/technexion/tao3530/tao3530.c
@@ -188,6 +188,13 @@ int board_mmc_init(bd_t *bis)
}
#endif
+#if defined(CONFIG_GENERIC_MMC)
+void board_mmc_power_init(void)
+{
+ twl4030_power_mmc_init(0);
+}
+#endif
+
#if defined(CONFIG_USB_EHCI) && !defined(CONFIG_SPL_BUILD)
/* Call usb_stop() before starting the kernel */
void show_boot_progress(int val)
diff --git a/board/ti/beagle/beagle.c b/board/ti/beagle/beagle.c
index 4c5e381..7b37fbe 100644
--- a/board/ti/beagle/beagle.c
+++ b/board/ti/beagle/beagle.c
@@ -534,6 +534,13 @@ int board_mmc_init(bd_t *bis)
}
#endif
+#if defined(CONFIG_GENERIC_MMC)
+void board_mmc_power_init(void)
+{
+ twl4030_power_mmc_init(0);
+}
+#endif
+
#if defined(CONFIG_USB_EHCI) && !defined(CONFIG_SPL_BUILD)
/* Call usb_stop() before starting the kernel */
void show_boot_progress(int val)
diff --git a/board/ti/beagle_x15/Kconfig b/board/ti/beagle_x15/Kconfig
new file mode 100644
index 0000000..a305ff1
--- /dev/null
+++ b/board/ti/beagle_x15/Kconfig
@@ -0,0 +1,12 @@
+if TARGET_BEAGLE_X15
+
+config SYS_BOARD
+ default "beagle_x15"
+
+config SYS_VENDOR
+ default "ti"
+
+config SYS_CONFIG_NAME
+ default "beagle_x15"
+
+endif
diff --git a/board/ti/beagle_x15/Makefile b/board/ti/beagle_x15/Makefile
new file mode 100644
index 0000000..5cd6873
--- /dev/null
+++ b/board/ti/beagle_x15/Makefile
@@ -0,0 +1,8 @@
+#
+# (C) Copyright 2014
+# Texas Instruments, <www.ti.com>
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y := board.o
diff --git a/board/ti/beagle_x15/board.c b/board/ti/beagle_x15/board.c
new file mode 100644
index 0000000..db96e34
--- /dev/null
+++ b/board/ti/beagle_x15/board.c
@@ -0,0 +1,395 @@
+/*
+ * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com
+ *
+ * Author: Felipe Balbi <balbi@ti.com>
+ *
+ * Based on board/ti/dra7xx/evm.c
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <palmas.h>
+#include <sata.h>
+#include <usb.h>
+#include <asm/omap_common.h>
+#include <asm/emif.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/sys_proto.h>
+#include <asm/arch/mmc_host_def.h>
+#include <asm/arch/sata.h>
+#include <asm/arch/gpio.h>
+#include <environment.h>
+
+#include "mux_data.h"
+
+#ifdef CONFIG_DRIVER_TI_CPSW
+#include <cpsw.h>
+#endif
+
+DECLARE_GLOBAL_DATA_PTR;
+
+const struct omap_sysinfo sysinfo = {
+ "Board: BeagleBoard x15\n"
+};
+
+static const struct dmm_lisa_map_regs beagle_x15_lisa_regs = {
+ .dmm_lisa_map_3 = 0x80740300,
+ .is_ma_present = 0x1
+};
+
+void emif_get_dmm_regs(const struct dmm_lisa_map_regs **dmm_lisa_regs)
+{
+ *dmm_lisa_regs = &beagle_x15_lisa_regs;
+}
+
+static const struct emif_regs beagle_x15_emif1_ddr3_532mhz_emif_regs = {
+ .sdram_config_init = 0x61851b32,
+ .sdram_config = 0x61851b32,
+ .sdram_config2 = 0x00000000,
+ .ref_ctrl = 0x00001035,
+ .sdram_tim1 = 0xceef266b,
+ .sdram_tim2 = 0x328f7fda,
+ .sdram_tim3 = 0x027f88a8,
+ .read_idle_ctrl = 0x00050001,
+ .zq_config = 0x0007190b,
+ .temp_alert_config = 0x00000000,
+ .emif_ddr_phy_ctlr_1_init = 0x0e24400a,
+ .emif_ddr_phy_ctlr_1 = 0x0e24400a,
+ .emif_ddr_ext_phy_ctrl_1 = 0x10040100,
+ .emif_ddr_ext_phy_ctrl_2 = 0x00740074,
+ .emif_ddr_ext_phy_ctrl_3 = 0x00780078,
+ .emif_ddr_ext_phy_ctrl_4 = 0x007c007c,
+ .emif_ddr_ext_phy_ctrl_5 = 0x007b007b,
+ .emif_rd_wr_lvl_rmp_win = 0x00000000,
+ .emif_rd_wr_lvl_rmp_ctl = 0x00000000,
+ .emif_rd_wr_lvl_ctl = 0x00000000,
+ .emif_rd_wr_exec_thresh = 0x00000305
+};
+
+static const u32 beagle_x15_emif1_ddr3_ext_phy_ctrl_const_regs[] = {
+ 0x00800080,
+ 0x00360036,
+ 0x00340034,
+ 0x00360036,
+ 0x00350035,
+ 0x00350035,
+
+ 0x01ff01ff,
+ 0x01ff01ff,
+ 0x01ff01ff,
+ 0x01ff01ff,
+ 0x01ff01ff,
+
+ 0x00430043,
+ 0x003e003e,
+ 0x004a004a,
+ 0x00470047,
+ 0x00400040,
+
+ 0x00000000,
+ 0x00600020,
+ 0x40010080,
+ 0x08102040,
+
+ 0x00400040,
+ 0x00400040,
+ 0x00400040,
+ 0x00400040,
+ 0x00400040
+};
+
+static const struct emif_regs beagle_x15_emif2_ddr3_532mhz_emif_regs = {
+ .sdram_config_init = 0x61851b32,
+ .sdram_config = 0x61851b32,
+ .sdram_config2 = 0x00000000,
+ .ref_ctrl = 0x00001035,
+ .sdram_tim1 = 0xceef266b,
+ .sdram_tim2 = 0x328f7fda,
+ .sdram_tim3 = 0x027f88a8,
+ .read_idle_ctrl = 0x00050001,
+ .zq_config = 0x0007190b,
+ .temp_alert_config = 0x00000000,
+ .emif_ddr_phy_ctlr_1_init = 0x0e24400a,
+ .emif_ddr_phy_ctlr_1 = 0x0e24400a,
+ .emif_ddr_ext_phy_ctrl_1 = 0x10040100,
+ .emif_ddr_ext_phy_ctrl_2 = 0x00820082,
+ .emif_ddr_ext_phy_ctrl_3 = 0x008b008b,
+ .emif_ddr_ext_phy_ctrl_4 = 0x00800080,
+ .emif_ddr_ext_phy_ctrl_5 = 0x007e007e,
+ .emif_rd_wr_lvl_rmp_win = 0x00000000,
+ .emif_rd_wr_lvl_rmp_ctl = 0x00000000,
+ .emif_rd_wr_lvl_ctl = 0x00000000,
+ .emif_rd_wr_exec_thresh = 0x00000305
+};
+
+static const u32 beagle_x15_emif2_ddr3_ext_phy_ctrl_const_regs[] = {
+ 0x00800080,
+ 0x00370037,
+ 0x00390039,
+ 0x00360036,
+ 0x00370037,
+ 0x00350035,
+ 0x01ff01ff,
+ 0x01ff01ff,
+ 0x01ff01ff,
+ 0x01ff01ff,
+ 0x01ff01ff,
+ 0x00540054,
+ 0x00540054,
+ 0x004e004e,
+ 0x004c004c,
+ 0x00400040,
+
+ 0x00000000,
+ 0x00600020,
+ 0x40010080,
+ 0x08102040,
+
+ 0x00400040,
+ 0x00400040,
+ 0x00400040,
+ 0x00400040,
+ 0x00400040
+};
+
+void emif_get_reg_dump(u32 emif_nr, const struct emif_regs **regs)
+{
+ switch (emif_nr) {
+ case 1:
+ *regs = &beagle_x15_emif1_ddr3_532mhz_emif_regs;
+ break;
+ case 2:
+ *regs = &beagle_x15_emif2_ddr3_532mhz_emif_regs;
+ break;
+ }
+}
+
+void emif_get_ext_phy_ctrl_const_regs(u32 emif_nr, const u32 **regs, u32 *size)
+{
+ switch (emif_nr) {
+ case 1:
+ *regs = beagle_x15_emif1_ddr3_ext_phy_ctrl_const_regs;
+ *size = ARRAY_SIZE(beagle_x15_emif1_ddr3_ext_phy_ctrl_const_regs);
+ break;
+ case 2:
+ *regs = beagle_x15_emif2_ddr3_ext_phy_ctrl_const_regs;
+ *size = ARRAY_SIZE(beagle_x15_emif2_ddr3_ext_phy_ctrl_const_regs);
+ break;
+ }
+}
+
+struct vcores_data beagle_x15_volts = {
+ .mpu.value = VDD_MPU_DRA752,
+ .mpu.efuse.reg = STD_FUSE_OPP_VMIN_MPU_NOM,
+ .mpu.efuse.reg_bits = DRA752_EFUSE_REGBITS,
+ .mpu.addr = TPS659038_REG_ADDR_SMPS12,
+ .mpu.pmic = &tps659038,
+
+ .eve.value = VDD_EVE_DRA752,
+ .eve.efuse.reg = STD_FUSE_OPP_VMIN_DSPEVE_NOM,
+ .eve.efuse.reg_bits = DRA752_EFUSE_REGBITS,
+ .eve.addr = TPS659038_REG_ADDR_SMPS45,
+ .eve.pmic = &tps659038,
+
+ .gpu.value = VDD_GPU_DRA752,
+ .gpu.efuse.reg = STD_FUSE_OPP_VMIN_GPU_NOM,
+ .gpu.efuse.reg_bits = DRA752_EFUSE_REGBITS,
+ .gpu.addr = TPS659038_REG_ADDR_SMPS45,
+ .gpu.pmic = &tps659038,
+
+ .core.value = VDD_CORE_DRA752,
+ .core.efuse.reg = STD_FUSE_OPP_VMIN_CORE_NOM,
+ .core.efuse.reg_bits = DRA752_EFUSE_REGBITS,
+ .core.addr = TPS659038_REG_ADDR_SMPS6,
+ .core.pmic = &tps659038,
+
+ .iva.value = VDD_IVA_DRA752,
+ .iva.efuse.reg = STD_FUSE_OPP_VMIN_IVA_NOM,
+ .iva.efuse.reg_bits = DRA752_EFUSE_REGBITS,
+ .iva.addr = TPS659038_REG_ADDR_SMPS45,
+ .iva.pmic = &tps659038,
+};
+
+void hw_data_init(void)
+{
+ *prcm = &dra7xx_prcm;
+ *dplls_data = &dra7xx_dplls;
+ *omap_vcores = &beagle_x15_volts;
+ *ctrl = &dra7xx_ctrl;
+}
+
+int board_init(void)
+{
+ gpmc_init();
+ gd->bd->bi_boot_params = (CONFIG_SYS_SDRAM_BASE + 0x100);
+
+ return 0;
+}
+
+int board_late_init(void)
+{
+ init_sata(0);
+ /*
+ * DEV_CTRL.DEV_ON = 1 please - else palmas switches off in 8 seconds
+ * This is the POWERHOLD-in-Low behavior.
+ */
+ palmas_i2c_write_u8(TPS65903X_CHIP_P1, 0xA0, 0x1);
+ return 0;
+}
+
+static void do_set_mux32(u32 base,
+ struct pad_conf_entry const *array, int size)
+{
+ int i;
+ struct pad_conf_entry *pad = (struct pad_conf_entry *)array;
+
+ for (i = 0; i < size; i++, pad++)
+ writel(pad->val, base + pad->offset);
+}
+
+void set_muxconf_regs_essential(void)
+{
+ do_set_mux32((*ctrl)->control_padconf_core_base,
+ core_padconf_array_essential,
+ sizeof(core_padconf_array_essential) /
+ sizeof(struct pad_conf_entry));
+}
+
+#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_GENERIC_MMC)
+int board_mmc_init(bd_t *bis)
+{
+ omap_mmc_init(0, 0, 0, -1, -1);
+ omap_mmc_init(1, 0, 0, -1, -1);
+ return 0;
+}
+#endif
+
+#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_OS_BOOT)
+int spl_start_uboot(void)
+{
+ /* break into full u-boot on 'c' */
+ if (serial_tstc() && serial_getc() == 'c')
+ return 1;
+
+#ifdef CONFIG_SPL_ENV_SUPPORT
+ env_init();
+ env_relocate_spec();
+ if (getenv_yesno("boot_os") != 1)
+ return 1;
+#endif
+
+ return 0;
+}
+#endif
+
+#ifdef CONFIG_DRIVER_TI_CPSW
+
+/* Delay value to add to calibrated value */
+#define RGMII0_TXCTL_DLY_VAL ((0x3 << 5) + 0x8)
+#define RGMII0_TXD0_DLY_VAL ((0x3 << 5) + 0x8)
+#define RGMII0_TXD1_DLY_VAL ((0x3 << 5) + 0x2)
+#define RGMII0_TXD2_DLY_VAL ((0x4 << 5) + 0x0)
+#define RGMII0_TXD3_DLY_VAL ((0x4 << 5) + 0x0)
+#define VIN2A_D13_DLY_VAL ((0x3 << 5) + 0x8)
+#define VIN2A_D17_DLY_VAL ((0x3 << 5) + 0x8)
+#define VIN2A_D16_DLY_VAL ((0x3 << 5) + 0x2)
+#define VIN2A_D15_DLY_VAL ((0x4 << 5) + 0x0)
+#define VIN2A_D14_DLY_VAL ((0x4 << 5) + 0x0)
+
+static void cpsw_control(int enabled)
+{
+ /* VTP can be added here */
+}
+
+static struct cpsw_slave_data cpsw_slaves[] = {
+ {
+ .slave_reg_ofs = 0x208,
+ .sliver_reg_ofs = 0xd80,
+ .phy_addr = 1,
+ },
+ {
+ .slave_reg_ofs = 0x308,
+ .sliver_reg_ofs = 0xdc0,
+ .phy_addr = 2,
+ },
+};
+
+static struct cpsw_platform_data cpsw_data = {
+ .mdio_base = CPSW_MDIO_BASE,
+ .cpsw_base = CPSW_BASE,
+ .mdio_div = 0xff,
+ .channels = 8,
+ .cpdma_reg_ofs = 0x800,
+ .slaves = 1,
+ .slave_data = cpsw_slaves,
+ .ale_reg_ofs = 0xd00,
+ .ale_entries = 1024,
+ .host_port_reg_ofs = 0x108,
+ .hw_stats_reg_ofs = 0x900,
+ .bd_ram_ofs = 0x2000,
+ .mac_control = (1 << 5),
+ .control = cpsw_control,
+ .host_port_num = 0,
+ .version = CPSW_CTRL_VERSION_2,
+};
+
+int board_eth_init(bd_t *bis)
+{
+ int ret;
+ uint8_t mac_addr[6];
+ uint32_t mac_hi, mac_lo;
+ uint32_t ctrl_val;
+
+ /* try reading mac address from efuse */
+ mac_lo = readl((*ctrl)->control_core_mac_id_0_lo);
+ mac_hi = readl((*ctrl)->control_core_mac_id_0_hi);
+ mac_addr[0] = (mac_hi & 0xFF0000) >> 16;
+ mac_addr[1] = (mac_hi & 0xFF00) >> 8;
+ mac_addr[2] = mac_hi & 0xFF;
+ mac_addr[3] = (mac_lo & 0xFF0000) >> 16;
+ mac_addr[4] = (mac_lo & 0xFF00) >> 8;
+ mac_addr[5] = mac_lo & 0xFF;
+
+ if (!getenv("ethaddr")) {
+ printf("<ethaddr> not set. Validating first E-fuse MAC\n");
+
+ if (is_valid_ether_addr(mac_addr))
+ eth_setenv_enetaddr("ethaddr", mac_addr);
+ }
+
+ mac_lo = readl((*ctrl)->control_core_mac_id_1_lo);
+ mac_hi = readl((*ctrl)->control_core_mac_id_1_hi);
+ mac_addr[0] = (mac_hi & 0xFF0000) >> 16;
+ mac_addr[1] = (mac_hi & 0xFF00) >> 8;
+ mac_addr[2] = mac_hi & 0xFF;
+ mac_addr[3] = (mac_lo & 0xFF0000) >> 16;
+ mac_addr[4] = (mac_lo & 0xFF00) >> 8;
+ mac_addr[5] = mac_lo & 0xFF;
+
+ if (!getenv("eth1addr")) {
+ if (is_valid_ether_addr(mac_addr))
+ eth_setenv_enetaddr("eth1addr", mac_addr);
+ }
+
+ ctrl_val = readl((*ctrl)->control_core_control_io1) & (~0x33);
+ ctrl_val |= 0x22;
+ writel(ctrl_val, (*ctrl)->control_core_control_io1);
+
+ ret = cpsw_register(&cpsw_data);
+ if (ret < 0)
+ printf("Error %d registering CPSW switch\n", ret);
+
+ return ret;
+}
+#endif
+
+#ifdef CONFIG_USB_XHCI_OMAP
+int board_usb_init(int index, enum usb_init_type init)
+{
+ setbits_le32((*prcm)->cm_l3init_usb_otg_ss_clkctrl,
+ OTG_SS_CLKCTRL_MODULEMODE_HW | OPTFCLKEN_REFCLK960M);
+
+ return 0;
+}
+#endif
diff --git a/board/ti/beagle_x15/mux_data.h b/board/ti/beagle_x15/mux_data.h
new file mode 100644
index 0000000..2294abe
--- /dev/null
+++ b/board/ti/beagle_x15/mux_data.h
@@ -0,0 +1,55 @@
+/*
+ * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com
+ *
+ * Author: Felipe Balbi <balbi@ti.com>
+ *
+ * Based on board/ti/dra7xx/evm.c
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+#ifndef _MUX_DATA_BEAGLE_X15_H_
+#define _MUX_DATA_BEAGLE_X15_H_
+
+#include <asm/arch/mux_dra7xx.h>
+
+const struct pad_conf_entry core_padconf_array_essential[] = {
+ {MMC1_CLK, (IEN | PTU | PDIS | M0)}, /* MMC1_CLK */
+ {MMC1_CMD, (IEN | PTU | PDIS | M0)}, /* MMC1_CMD */
+ {MMC1_DAT0, (IEN | PTU | PDIS | M0)}, /* MMC1_DAT0 */
+ {MMC1_DAT1, (IEN | PTU | PDIS | M0)}, /* MMC1_DAT1 */
+ {MMC1_DAT2, (IEN | PTU | PDIS | M0)}, /* MMC1_DAT2 */
+ {MMC1_DAT3, (IEN | PTU | PDIS | M0)}, /* MMC1_DAT3 */
+ {MMC1_SDCD, (FSC | IEN | PTU | PDIS | M0)}, /* MMC1_SDCD */
+ {MMC1_SDWP, (FSC | IEN | PTD | PEN | M14)}, /* MMC1_SDWP */
+ {GPMC_A19, (IEN | PTU | PDIS | M1)}, /* mmc2_dat4 */
+ {GPMC_A20, (IEN | PTU | PDIS | M1)}, /* mmc2_dat5 */
+ {GPMC_A21, (IEN | PTU | PDIS | M1)}, /* mmc2_dat6 */
+ {GPMC_A22, (IEN | PTU | PDIS | M1)}, /* mmc2_dat7 */
+ {GPMC_A23, (IEN | PTU | PDIS | M1)}, /* mmc2_clk */
+ {GPMC_A24, (IEN | PTU | PDIS | M1)}, /* mmc2_dat0 */
+ {GPMC_A25, (IEN | PTU | PDIS | M1)}, /* mmc2_dat1 */
+ {GPMC_A26, (IEN | PTU | PDIS | M1)}, /* mmc2_dat2 */
+ {GPMC_A27, (IEN | PTU | PDIS | M1)}, /* mmc2_dat3 */
+ {GPMC_CS1, (IEN | PTU | PDIS | M1)}, /* mmm2_cmd */
+ {UART3_RXD, (FSC | IEN | PTU | PDIS | M0)}, /* UART3_RXD */
+ {UART3_TXD, (FSC | IEN | PTU | PDIS | M0)}, /* UART3_TXD */
+ {I2C1_SDA, (IEN | PTU | PDIS | M0)}, /* I2C1_SDA */
+ {I2C1_SCL, (IEN | PTU | PDIS | M0)}, /* I2C1_SCL */
+ {MDIO_MCLK, (PTU | PEN | M0)}, /* MDIO_MCLK */
+ {MDIO_D, (IEN | PTU | PEN | M0)}, /* MDIO_D */
+ {RGMII0_TXC, (M0) },
+ {RGMII0_TXCTL, (M0) },
+ {RGMII0_TXD3, (M0) },
+ {RGMII0_TXD2, (M0) },
+ {RGMII0_TXD1, (M0) },
+ {RGMII0_TXD0, (M0) },
+ {RGMII0_RXC, (IEN | M0) },
+ {RGMII0_RXCTL, (IEN | M0) },
+ {RGMII0_RXD3, (IEN | M0) },
+ {RGMII0_RXD2, (IEN | M0) },
+ {RGMII0_RXD1, (IEN | M0) },
+ {RGMII0_RXD0, (IEN | M0) },
+ {USB1_DRVVBUS, (M0 | FSC) },
+ {SPI1_CS1, (PEN | IDIS | M14) }, /* GPIO7_11 */
+};
+#endif /* _MUX_DATA_BEAGLE_X15_H_ */
diff --git a/board/ti/dra7xx/evm.c b/board/ti/dra7xx/evm.c
index 37df7b2..6522241 100644
--- a/board/ti/dra7xx/evm.c
+++ b/board/ti/dra7xx/evm.c
@@ -96,18 +96,6 @@ int board_late_init(void)
return 0;
}
-/**
- * @brief misc_init_r - Configure EVM board specific configurations
- * such as power configurations, ethernet initialization as phase2 of
- * boot sequence
- *
- * @return 0
- */
-int misc_init_r(void)
-{
- return 0;
-}
-
static void do_set_mux32(u32 base,
struct pad_conf_entry const *array, int size)
{
diff --git a/board/ti/dra7xx/mux_data.h b/board/ti/dra7xx/mux_data.h
index 7276014..4824077 100644
--- a/board/ti/dra7xx/mux_data.h
+++ b/board/ti/dra7xx/mux_data.h
@@ -130,8 +130,8 @@ const struct pad_conf_entry core_padconf_array_essential[] = {
{GPMC_A13, (IEN | PDIS | M1)}, /* QSPI1_RTCLK */
{GPMC_A14, (IEN | PDIS | M1)}, /* QSPI1_D[3] */
{GPMC_A15, (IEN | PDIS | M1)}, /* QSPI1_D[2] */
- {GPMC_A16, (IEN | PDIS | M1)}, /* QSPI1_D[1] */
- {GPMC_A17, (IEN | PDIS | M1)}, /* QSPI1_D[0] */
+ {GPMC_A16, (IEN | PDIS | M1)}, /* QSPI1_D[0] */
+ {GPMC_A17, (IEN | PDIS | M1)}, /* QSPI1_D[1] */
{GPMC_A18, (M1)}, /* QSPI1_SCLK */
{GPMC_A3, (IEN | PDIS | M1)}, /* QSPI1_CS2 */
{GPMC_A4, (IEN | PDIS | M1)}, /* QSPI1_CS3 */
diff --git a/board/ti/evm/evm.c b/board/ti/evm/evm.c
index 81dd081..3f93d9c 100644
--- a/board/ti/evm/evm.c
+++ b/board/ti/evm/evm.c
@@ -20,6 +20,7 @@
#include <asm/arch/mmc_host_def.h>
#include <asm/gpio.h>
#include <i2c.h>
+#include <twl4030.h>
#include <asm/mach-types.h>
#include <linux/mtd/nand.h>
#include "evm.h"
@@ -264,3 +265,10 @@ int board_mmc_init(bd_t *bis)
return omap_mmc_init(0, 0, 0, -1, -1);
}
#endif
+
+#if defined(CONFIG_GENERIC_MMC)
+void board_mmc_power_init(void)
+{
+ twl4030_power_mmc_init(0);
+}
+#endif
diff --git a/board/ti/sdp3430/sdp.c b/board/ti/sdp3430/sdp.c
index 957940d..7171363 100644
--- a/board/ti/sdp3430/sdp.c
+++ b/board/ti/sdp3430/sdp.c
@@ -195,4 +195,9 @@ int board_mmc_init(bd_t *bis)
{
return omap_mmc_init(0, 0, 0, -1, -1);
}
+
+void board_mmc_power_init(void)
+{
+ twl4030_power_mmc_init(0);
+}
#endif
diff --git a/board/timll/devkit8000/devkit8000.c b/board/timll/devkit8000/devkit8000.c
index bcbee73..b978044 100644
--- a/board/timll/devkit8000/devkit8000.c
+++ b/board/timll/devkit8000/devkit8000.c
@@ -124,6 +124,13 @@ int board_mmc_init(bd_t *bis)
}
#endif
+#if defined(CONFIG_GENERIC_MMC)
+void board_mmc_power_init(void)
+{
+ twl4030_power_mmc_init(0);
+}
+#endif
+
#if defined(CONFIG_DRIVER_DM9000) & !defined(CONFIG_SPL_BUILD)
/*
* Routine: board_eth_init
diff --git a/configs/beagle_x15_defconfig b/configs/beagle_x15_defconfig
new file mode 100644
index 0000000..872ab63
--- /dev/null
+++ b/configs/beagle_x15_defconfig
@@ -0,0 +1,5 @@
+CONFIG_SPL=y
+CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=3"
++S:CONFIG_ARM=y
++S:CONFIG_OMAP54XX=y
++S:CONFIG_TARGET_BEAGLE_X15=y
diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index 44a4feb..8436bc7 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -1277,6 +1277,11 @@ block_dev_desc_t *mmc_get_dev(int dev)
}
#endif
+/* board-specific MMC power initializations. */
+__weak void board_mmc_power_init(void)
+{
+}
+
int mmc_start_init(struct mmc *mmc)
{
int err;
@@ -1293,6 +1298,8 @@ int mmc_start_init(struct mmc *mmc)
if (mmc->has_init)
return 0;
+ board_mmc_power_init();
+
/* made sure it's not NULL earlier */
err = mmc->cfg->ops->init(mmc);
diff --git a/drivers/mmc/omap_hsmmc.c b/drivers/mmc/omap_hsmmc.c
index ffb5284..c880ced 100644
--- a/drivers/mmc/omap_hsmmc.c
+++ b/drivers/mmc/omap_hsmmc.c
@@ -135,12 +135,7 @@ static unsigned char mmc_board_init(struct mmc *mmc)
pbias_lite = readl(&t2_base->pbias_lite);
pbias_lite &= ~(PBIASLITEPWRDNZ1 | PBIASLITEPWRDNZ0);
writel(pbias_lite, &t2_base->pbias_lite);
-#endif
-#if defined(CONFIG_TWL4030_POWER)
- twl4030_power_mmc_init();
- mdelay(100); /* ramp-up delay from Linux code */
-#endif
-#if defined(CONFIG_OMAP34XX)
+
writel(pbias_lite | PBIASLITEPWRDNZ1 |
PBIASSPEEDCTRL0 | PBIASLITEPWRDNZ0,
&t2_base->pbias_lite);
@@ -663,7 +658,8 @@ int omap_mmc_init(int dev_index, uint host_caps_mask, uint f_max, int cd_gpio,
case 1:
priv_data->base_addr = (struct hsmmc *)OMAP_HSMMC2_BASE;
#if (defined(CONFIG_OMAP44XX) || defined(CONFIG_OMAP54XX) || \
- defined(CONFIG_DRA7XX)) && defined(CONFIG_HSMMC2_8BIT)
+ defined(CONFIG_DRA7XX) || defined(CONFIG_AM57XX)) && \
+ defined(CONFIG_HSMMC2_8BIT)
/* Enable 8-bit interface for eMMC on OMAP4/5 or DRA7XX */
host_caps_val |= MMC_MODE_8BIT;
#endif
@@ -672,7 +668,7 @@ int omap_mmc_init(int dev_index, uint host_caps_mask, uint f_max, int cd_gpio,
#ifdef OMAP_HSMMC3_BASE
case 2:
priv_data->base_addr = (struct hsmmc *)OMAP_HSMMC3_BASE;
-#if defined(CONFIG_DRA7XX) && defined(CONFIG_HSMMC3_8BIT)
+#if (defined(CONFIG_DRA7XX) || defined(CONFIG_AM57XX)) && defined(CONFIG_HSMMC3_8BIT)
/* Enable 8-bit interface for eMMC on DRA7XX */
host_caps_val |= MMC_MODE_8BIT;
#endif
diff --git a/drivers/mtd/nand/omap_gpmc.c b/drivers/mtd/nand/omap_gpmc.c
index 40d6705..93829a4 100644
--- a/drivers/mtd/nand/omap_gpmc.c
+++ b/drivers/mtd/nand/omap_gpmc.c
@@ -73,14 +73,11 @@ static void omap_nand_hwcontrol(struct mtd_info *mtd, int32_t cmd,
writeb(cmd, this->IO_ADDR_W);
}
-#ifdef CONFIG_SPL_BUILD
/* Check wait pin as dev ready indicator */
-static int omap_spl_dev_ready(struct mtd_info *mtd)
+static int omap_dev_ready(struct mtd_info *mtd)
{
return gpmc_cfg->status & (1 << 8);
}
-#endif
-
/*
* gen_true_ecc - This function will generate true ECC value, which
@@ -887,7 +884,9 @@ int board_nand_init(struct nand_chip *nand)
nand->read_buf = nand_read_buf16;
else
nand->read_buf = nand_read_buf;
- nand->dev_ready = omap_spl_dev_ready;
#endif
+
+ nand->dev_ready = omap_dev_ready;
+
return 0;
}
diff --git a/drivers/power/palmas.c b/drivers/power/palmas.c
index cfbc9dc..6430fe0 100644
--- a/drivers/power/palmas.c
+++ b/drivers/power/palmas.c
@@ -27,7 +27,7 @@ int palmas_mmc1_poweron_ldo(void)
{
u8 val = 0;
-#if defined(CONFIG_DRA7XX)
+#if defined(CONFIG_DRA7XX) || defined(CONFIG_AM57XX)
/*
* Currently valid for the dra7xx_evm board:
* Set TPS659038 LDO1 to 3.0 V
diff --git a/drivers/power/twl4030.c b/drivers/power/twl4030.c
index e578ae6..7f1fdd1 100644
--- a/drivers/power/twl4030.c
+++ b/drivers/power/twl4030.c
@@ -91,17 +91,23 @@ void twl4030_power_init(void)
TWL4030_PM_RECEIVER_DEV_GRP_P1);
}
-void twl4030_power_mmc_init(void)
+void twl4030_power_mmc_init(int dev_index)
{
- /* Set VMMC1 to 3.15 Volts */
- twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VMMC1_DEDICATED,
- TWL4030_PM_RECEIVER_VMMC1_VSEL_32,
- TWL4030_PM_RECEIVER_VMMC1_DEV_GRP,
- TWL4030_PM_RECEIVER_DEV_GRP_P1);
+ if (dev_index == 0) {
+ /* Set VMMC1 to 3.15 Volts */
+ twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VMMC1_DEDICATED,
+ TWL4030_PM_RECEIVER_VMMC1_VSEL_32,
+ TWL4030_PM_RECEIVER_VMMC1_DEV_GRP,
+ TWL4030_PM_RECEIVER_DEV_GRP_P1);
- /* Set VMMC2 to 3.15 Volts */
- twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VMMC2_DEDICATED,
- TWL4030_PM_RECEIVER_VMMC2_VSEL_32,
- TWL4030_PM_RECEIVER_VMMC2_DEV_GRP,
- TWL4030_PM_RECEIVER_DEV_GRP_P1);
+ mdelay(100); /* ramp-up delay from Linux code */
+ } else if (dev_index == 1) {
+ /* Set VMMC2 to 3.15 Volts */
+ twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VMMC2_DEDICATED,
+ TWL4030_PM_RECEIVER_VMMC2_VSEL_32,
+ TWL4030_PM_RECEIVER_VMMC2_DEV_GRP,
+ TWL4030_PM_RECEIVER_DEV_GRP_P1);
+
+ mdelay(100); /* ramp-up delay from Linux code */
+ }
}
diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c
index 8f05191..af5beba 100644
--- a/drivers/serial/ns16550.c
+++ b/drivers/serial/ns16550.c
@@ -132,11 +132,12 @@ static void NS16550_setbrg(NS16550_t com_port, int baud_divisor)
void NS16550_init(NS16550_t com_port, int baud_divisor)
{
-#if (defined(CONFIG_SPL_BUILD) && defined(CONFIG_OMAP34XX))
+#if (defined(CONFIG_SPL_BUILD) && \
+ (defined(CONFIG_OMAP34XX) || defined(CONFIG_OMAP44XX)))
/*
- * On some OMAP3 devices when UART3 is configured for boot mode before
- * SPL starts only THRE bit is set. We have to empty the transmitter
- * before initialization starts.
+ * On some OMAP3/OMAP4 devices when UART3 is configured for boot mode
+ * before SPL starts only THRE bit is set. We have to empty the
+ * transmitter before initialization starts.
*/
if ((serial_in(&com_port->lsr) & (UART_LSR_TEMT | UART_LSR_THRE))
== UART_LSR_THRE) {
diff --git a/drivers/spi/ti_qspi.c b/drivers/spi/ti_qspi.c
index fd7fea8..857b604 100644
--- a/drivers/spi/ti_qspi.c
+++ b/drivers/spi/ti_qspi.c
@@ -102,7 +102,7 @@ static void ti_spi_setup_spi_register(struct ti_qspi_slave *qslave)
struct spi_slave *slave = &qslave->slave;
u32 memval = 0;
-#ifdef CONFIG_DRA7XX
+#if defined(CONFIG_DRA7XX) || defined(CONFIG_AM57XX)
slave->memory_map = (void *)MMAP_START_ADDR_DRA;
#else
slave->memory_map = (void *)MMAP_START_ADDR_AM43x;
@@ -244,7 +244,7 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
uint status;
int timeout;
-#ifdef CONFIG_DRA7XX
+#if defined(CONFIG_DRA7XX) || defined(CONFIG_AM57XX)
int val;
#endif
@@ -254,7 +254,7 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
/* Setup mmap flags */
if (flags & SPI_XFER_MMAP) {
writel(MM_SWITCH, &qslave->base->memswitch);
-#ifdef CONFIG_DRA7XX
+#if defined(CONFIG_DRA7XX) || defined(CONFIG_AM57XX)
val = readl(CORE_CTRL_IO);
val |= MEM_CS;
writel(val, CORE_CTRL_IO);
@@ -262,7 +262,7 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
return 0;
} else if (flags & SPI_XFER_MMAP_END) {
writel(~MM_SWITCH, &qslave->base->memswitch);
-#ifdef CONFIG_DRA7XX
+#if defined(CONFIG_DRA7XX) || defined(CONFIG_AM57XX)
val = readl(CORE_CTRL_IO);
val &= MEM_CS_UNSELECT;
writel(val, CORE_CTRL_IO);
diff --git a/drivers/usb/phy/omap_usb_phy.c b/drivers/usb/phy/omap_usb_phy.c
index f78d532..52a3664 100644
--- a/drivers/usb/phy/omap_usb_phy.c
+++ b/drivers/usb/phy/omap_usb_phy.c
@@ -118,7 +118,6 @@ void usb_phy_power(int on)
void omap_usb3_phy_init(struct omap_usb3_phy *phy_regs)
{
omap_usb_dpll_lock(phy_regs);
-
usb3_phy_partial_powerup(phy_regs);
/*
* Give enough time for the PHY to partially power-up before
@@ -126,7 +125,6 @@ void omap_usb3_phy_init(struct omap_usb3_phy *phy_regs)
* team.
*/
mdelay(100);
- usb3_phy_power(1);
}
static void omap_enable_usb3_phy(struct omap_xhci *omap)
diff --git a/include/configs/beagle_x15.h b/include/configs/beagle_x15.h
new file mode 100644
index 0000000..cc36330
--- /dev/null
+++ b/include/configs/beagle_x15.h
@@ -0,0 +1,88 @@
+/*
+ * (C) Copyright 2014
+ * Texas Instruments Incorporated.
+ * Felipe Balbi <balbi@ti.com>
+ *
+ * Configuration settings for the TI Beagle x15 board.
+ * See ti_omap5_common.h for omap5 common settings.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __CONFIG_BEAGLE_X15_H
+#define __CONFIG_BEAGLE_X15_H
+
+#define CONFIG_AM57XX
+
+#define CONFIG_NR_DRAM_BANKS 2
+
+#define CONFIG_ENV_SIZE (64 << 10)
+#define CONFIG_ENV_IS_IN_FAT
+#define FAT_ENV_INTERFACE "mmc"
+#define FAT_ENV_DEVICE_AND_PART "0:1"
+#define FAT_ENV_FILE "uboot.env"
+
+#define CONFIG_CMD_SAVEENV
+
+#define CONSOLEDEV "ttyO2"
+#define CONFIG_SYS_NS16550_COM1 UART1_BASE /* Base EVM has UART0 */
+#define CONFIG_SYS_NS16550_COM2 UART2_BASE /* UART2 */
+#define CONFIG_SYS_NS16550_COM3 UART3_BASE /* UART3 */
+#define CONFIG_BAUDRATE 115200
+
+#define CONFIG_SYS_OMAP_ABE_SYSCK
+
+/* Define the default GPT table for eMMC */
+#define PARTS_DEFAULT \
+ "uuid_disk=${uuid_gpt_disk};" \
+ "name=rootfs,start=2MiB,size=-,uuid=${uuid_gpt_rootfs}"
+
+#include <configs/ti_omap5_common.h>
+
+/* Enhance our eMMC support / experience. */
+#define CONFIG_CMD_GPT
+#define CONFIG_EFI_PARTITION
+#define CONFIG_PARTITION_UUIDS
+#define CONFIG_CMD_PART
+
+/* CPSW Ethernet */
+#define CONFIG_CMD_NET /* 'bootp' and 'tftp' */
+#define CONFIG_CMD_DHCP
+#define CONFIG_BOOTP_DNS /* Configurable parts of CMD_DHCP */
+#define CONFIG_BOOTP_DNS2
+#define CONFIG_BOOTP_SEND_HOSTNAME
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_NET_RETRY_COUNT 10
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_MII
+#define CONFIG_DRIVER_TI_CPSW /* Driver for IP block */
+#define CONFIG_MII /* Required in net/eth.c */
+#define CONFIG_PHY_GIGE /* per-board part of CPSW */
+#define CONFIG_PHYLIB
+
+#define CONFIG_SUPPORT_EMMC_BOOT
+
+/* USB xHCI HOST */
+#define CONFIG_CMD_USB
+#define CONFIG_USB_HOST
+#define CONFIG_USB_XHCI
+#define CONFIG_USB_XHCI_OMAP
+#define CONFIG_USB_STORAGE
+#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
+
+#define CONFIG_OMAP_USB_PHY
+#define CONFIG_OMAP_USB3PHY1_HOST
+
+/* SATA */
+#define CONFIG_BOARD_LATE_INIT
+#define CONFIG_CMD_SCSI
+#define CONFIG_LIBATA
+#define CONFIG_SCSI_AHCI
+#define CONFIG_SCSI_AHCI_PLAT
+#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1
+#define CONFIG_SYS_SCSI_MAX_LUN 1
+#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
+ CONFIG_SYS_SCSI_MAX_LUN)
+
+#endif /* __CONFIG_BEAGLE_X5_H */
diff --git a/include/configs/cm_t54.h b/include/configs/cm_t54.h
index 641ab48..92ce1e1 100644
--- a/include/configs/cm_t54.h
+++ b/include/configs/cm_t54.h
@@ -16,7 +16,6 @@
#include <configs/ti_omap5_common.h>
-#undef CONFIG_MISC_INIT_R
#undef CONFIG_SPL_OS_BOOT
/* Enable Generic board */
diff --git a/include/configs/dra7xx_evm.h b/include/configs/dra7xx_evm.h
index 2eaabde..174a711 100644
--- a/include/configs/dra7xx_evm.h
+++ b/include/configs/dra7xx_evm.h
@@ -50,6 +50,7 @@
#define CONFIG_EFI_PARTITION
#define CONFIG_PARTITION_UUIDS
#define CONFIG_CMD_PART
+#define CONFIG_HSMMC2_8BIT
/* CPSW Ethernet */
#define CONFIG_CMD_NET /* 'bootp' and 'tftp' */
diff --git a/include/configs/omap5_uevm.h b/include/configs/omap5_uevm.h
index e8dc462..e07795f 100644
--- a/include/configs/omap5_uevm.h
+++ b/include/configs/omap5_uevm.h
@@ -23,6 +23,7 @@
#define CONFIG_SYS_NS16550_COM3 UART3_BASE
#define CONFIG_BAUDRATE 115200
+#define CONFIG_MISC_INIT_R
/* MMC ENV related defines */
#define CONFIG_ENV_IS_IN_MMC
#define CONFIG_SYS_MMC_ENV_DEV 1 /* SLOT2: eMMC(1) */
diff --git a/include/configs/pxm2.h b/include/configs/pxm2.h
index d75d562..946b2c8 100644
--- a/include/configs/pxm2.h
+++ b/include/configs/pxm2.h
@@ -150,4 +150,8 @@
#define CONFIG_SYS_CONSOLE_FG_COL 0x00
#endif
+#ifndef CONFIG_SPL_BUILD
+#define CONFIG_FIT
+#endif
+
#endif /* ! __CONFIG_PXM2_H */
diff --git a/include/configs/rut.h b/include/configs/rut.h
index 6bddede..0067ea4 100644
--- a/include/configs/rut.h
+++ b/include/configs/rut.h
@@ -154,4 +154,8 @@
#define CONFIG_SYS_CONSOLE_FG_COL 0x00
#endif
+#ifndef CONFIG_SPL_BUILD
+#define CONFIG_FIT
+#endif
+
#endif /* ! __CONFIG_RUT_H */
diff --git a/include/configs/ti_omap5_common.h b/include/configs/ti_omap5_common.h
index 3166392..c47651d 100644
--- a/include/configs/ti_omap5_common.h
+++ b/include/configs/ti_omap5_common.h
@@ -19,7 +19,6 @@
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_DISPLAY_BOARDINFO
-#define CONFIG_MISC_INIT_R
#define CONFIG_ARCH_CPU_INIT
#define CONFIG_SYS_CACHELINE_SIZE 64
@@ -79,7 +78,7 @@
"partitions=" PARTS_DEFAULT "\0" \
"optargs=\0" \
"mmcdev=0\0" \
- "mmcroot=/dev/mmcblk1p2 rw\0" \
+ "mmcroot=/dev/mmcblk0p2 rw\0" \
"mmcrootfstype=ext4 rootwait\0" \
"mmcargs=setenv bootargs console=${console} " \
"${optargs} " \
@@ -118,6 +117,8 @@
"setenv fdtfile dra7-evm.dtb; fi;" \
"if test $board_name = dra72x; then " \
"setenv fdtfile dra72-evm.dtb; fi;" \
+ "if test $board_name = beagle_x15; then " \
+ "setenv fdtfile am57xx-beagle-x15.dtb; fi;" \
"if test $fdtfile = undefined; then " \
"echo WARNING: Could not determine device tree to use; fi; \0" \
"loadfdt=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile};\0" \
diff --git a/include/linux/usb/xhci-omap.h b/include/linux/usb/xhci-omap.h
index 82630ad..cb166e6 100644
--- a/include/linux/usb/xhci-omap.h
+++ b/include/linux/usb/xhci-omap.h
@@ -14,6 +14,10 @@
#define OMAP_XHCI_BASE 0x488d0000
#define OMAP_OCP1_SCP_BASE 0x4A081000
#define OMAP_OTG_WRAPPER_BASE 0x488c0000
+#elif defined CONFIG_AM57XX
+#define OMAP_XHCI_BASE 0x48890000
+#define OMAP_OCP1_SCP_BASE 0x4A084c00
+#define OMAP_OTG_WRAPPER_BASE 0x48880000
#elif defined CONFIG_AM43XX
#define OMAP_XHCI_BASE 0x483d0000
#define OMAP_OCP1_SCP_BASE 0x483E8000
diff --git a/include/mmc.h b/include/mmc.h
index d74a190..adffc35 100644
--- a/include/mmc.h
+++ b/include/mmc.h
@@ -385,6 +385,7 @@ struct mmc *mmc_spi_init(uint bus, uint cs, uint speed, uint mode);
int mmc_legacy_init(int verbose);
#endif
+void board_mmc_power_init(void);
int board_mmc_init(bd_t *bis);
int cpu_mmc_init(bd_t *bis);
int mmc_get_env_addr(struct mmc *mmc, int copy, u32 *env_addr);
diff --git a/include/twl4030.h b/include/twl4030.h
index f33cd1e..50f8da8 100644
--- a/include/twl4030.h
+++ b/include/twl4030.h
@@ -651,7 +651,7 @@ void twl4030_pmrecv_vsel_cfg(u8 vsel_reg, u8 vsel_val,
/* For initializing power device */
void twl4030_power_init(void);
/* For initializing mmc power */
-void twl4030_power_mmc_init(void);
+void twl4030_power_mmc_init(int dev_index);
/*
* LED