diff options
48 files changed, 232 insertions, 198 deletions
@@ -24,7 +24,7 @@ VERSION = 2010 PATCHLEVEL = 12 SUBLEVEL = -EXTRAVERSION = -rc2 +EXTRAVERSION = ifneq "$(SUBLEVEL)" "" U_BOOT_VERSION = $(VERSION).$(PATCHLEVEL).$(SUBLEVEL)$(EXTRAVERSION) else diff --git a/arch/arm/cpu/armv7/mx5/speed.c b/arch/arm/cpu/armv7/mx5/speed.c index a444def..2187e8e 100644 --- a/arch/arm/cpu/armv7/mx5/speed.c +++ b/arch/arm/cpu/armv7/mx5/speed.c @@ -28,10 +28,12 @@ #include <asm/arch/imx-regs.h> #include <asm/arch/clock.h> +#ifdef CONFIG_FSL_ESDHC +DECLARE_GLOBAL_DATA_PTR; +#endif + int get_clocks(void) { - DECLARE_GLOBAL_DATA_PTR; - #ifdef CONFIG_FSL_ESDHC gd->sdhc_clk = mxc_get_clock(MXC_IPG_PERCLK); #endif diff --git a/arch/arm/include/asm/arch-at91/at91_pmc.h b/arch/arm/include/asm/arch-at91/at91_pmc.h index 2f9ad96..fb8bb17 100644 --- a/arch/arm/include/asm/arch-at91/at91_pmc.h +++ b/arch/arm/include/asm/arch-at91/at91_pmc.h @@ -91,10 +91,18 @@ typedef struct at91_pmc { #define AT91_PMC_MCKR_PRES_64 0x00000018 #define AT91_PMC_MCKR_PRES_MASK 0x0000001C +#ifdef CONFIG_AT91RM9200 +#define AT91_PMC_MCKR_MDIV_1 0x00000000 +#define AT91_PMC_MCKR_MDIV_2 0x00000100 +#define AT91_PMC_MCKR_MDIV_3 0x00000200 +#define AT91_PMC_MCKR_MDIV_4 0x00000300 +#define AT91_PMC_MCKR_MDIV_MASK 0x00000300 +#else #define AT91_PMC_MCKR_MDIV_1 0x00000000 #define AT91_PMC_MCKR_MDIV_2 0x00000100 #define AT91_PMC_MCKR_MDIV_4 0x00000200 #define AT91_PMC_MCKR_MDIV_MASK 0x00000300 +#endif #define AT91_PMC_MCKR_PLLADIV_1 0x00001000 #define AT91_PMC_MCKR_PLLADIV_2 0x00002000 diff --git a/arch/blackfin/cpu/serial.c b/arch/blackfin/cpu/serial.c index 901cb97..650202e 100644 --- a/arch/blackfin/cpu/serial.c +++ b/arch/blackfin/cpu/serial.c @@ -42,6 +42,8 @@ #include <asm/blackfin.h> #include <asm/mach-common/bits/uart.h> +DECLARE_GLOBAL_DATA_PTR; + #ifdef CONFIG_UART_CONSOLE #include "serial.h" @@ -95,7 +97,6 @@ void serial_set_baud(uint32_t baud) */ void serial_setbrg(void) { - DECLARE_GLOBAL_DATA_PTR; serial_set_baud(gd->baudrate); } diff --git a/arch/m68k/cpu/mcf52x2/cpu.c b/arch/m68k/cpu/mcf52x2/cpu.c index d43ef2a..571d078 100644 --- a/arch/m68k/cpu/mcf52x2/cpu.c +++ b/arch/m68k/cpu/mcf52x2/cpu.c @@ -74,8 +74,7 @@ int watchdog_disable(void) { volatile wdog_t *wdt = (volatile wdog_t *)(MMAP_WDOG); - wdt->sr = 0x5555; /* reset watchdog counteDECLARE_GLOBAL_DATA_PTR; -r */ + wdt->sr = 0x5555; /* reset watchdog counter */ wdt->sr = 0xAAAA; wdt->cr = 0; /* disable watchdog timer */ diff --git a/arch/m68k/cpu/mcf547x_8x/speed.c b/arch/m68k/cpu/mcf547x_8x/speed.c index 2cee488..31130b5 100644 --- a/arch/m68k/cpu/mcf547x_8x/speed.c +++ b/arch/m68k/cpu/mcf547x_8x/speed.c @@ -30,13 +30,13 @@ #include <asm/immap.h> +DECLARE_GLOBAL_DATA_PTR; + /* * get_clocks() fills in gd->cpu_clock and gd->bus_clk */ int get_clocks(void) { - DECLARE_GLOBAL_DATA_PTR; - gd->bus_clk = CONFIG_SYS_CLK; gd->cpu_clk = (gd->bus_clk * 2); diff --git a/arch/sh/lib/board.c b/arch/sh/lib/board.c index fe53ab4..3d201b2 100644 --- a/arch/sh/lib/board.c +++ b/arch/sh/lib/board.c @@ -32,6 +32,8 @@ #include <miiphy.h> #endif +DECLARE_GLOBAL_DATA_PTR; + extern int cpu_init(void); extern int board_init(void); extern int dram_init(void); @@ -43,8 +45,6 @@ unsigned long monitor_flash_len = CONFIG_SYS_MONITOR_LEN; static int sh_flash_init(void) { - DECLARE_GLOBAL_DATA_PTR; - gd->bd->bi_flashsize = flash_init(); printf("FLASH: %ldMB\n", gd->bd->bi_flashsize / (1024*1024)); @@ -99,7 +99,6 @@ static int sh_mem_env_init(void) #if defined(CONFIG_CMD_NET) static int sh_net_init(void) { - DECLARE_GLOBAL_DATA_PTR; gd->bd->bi_ip_addr = getenv_IPaddr("ipaddr"); return 0; } @@ -139,8 +138,6 @@ init_fnc_t *init_sequence[] = void sh_generic_init(void) { - DECLARE_GLOBAL_DATA_PTR; - bd_t *bd; init_fnc_t **init_fnc_ptr; diff --git a/board/emk/top9000/Makefile b/board/emk/top9000/Makefile index 9b28048..3ac6f14 100644 --- a/board/emk/top9000/Makefile +++ b/board/emk/top9000/Makefile @@ -26,9 +26,9 @@ include $(TOPDIR)/config.mk -LIB = $(obj)lib$(BOARD).a +LIB = $(obj)lib$(BOARD).o -COBJS-y += top9000.o +COBJS-y += $(BOARD).o COBJS-$(CONFIG_ATMEL_SPI) += spi.o SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c) @@ -36,7 +36,7 @@ OBJS := $(addprefix $(obj),$(COBJS-y)) SOBJS := $(addprefix $(obj),$(SOBJS)) $(LIB): $(obj).depend $(OBJS) $(SOBJS) - $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) + $(call cmd_link_o_target, $(OBJS) $(SOBJS)) clean: rm -f $(SOBJS) $(OBJS) diff --git a/board/emk/top9000/spi.c b/board/emk/top9000/spi.c index b468948..b957986 100644 --- a/board/emk/top9000/spi.c +++ b/board/emk/top9000/spi.c @@ -58,4 +58,3 @@ void spi_cs_deactivate(struct spi_slave *slave) at91_set_pio_output(cs_to_portbit[slave->bus][slave->cs].port, cs_to_portbit[slave->bus][slave->cs].bit, 1); } - diff --git a/board/emk/top9000/top9000.c b/board/emk/top9000/top9000.c index b0fe2d6..73dd706 100644 --- a/board/emk/top9000/top9000.c +++ b/board/emk/top9000/top9000.c @@ -120,7 +120,7 @@ int board_mmc_getcd(u8 *cd, struct mmc *mmc) int board_early_init_f(void) { - at91_shdwn_t *shdwn = (at91_shdwn_t *)AT91_SHDWN_BASE; + struct at91_shdwn *shdwn = (struct at91_shdwn *)AT91_SHDWN_BASE; /* * make sure the board can be powered on by diff --git a/board/espt/espt.c b/board/espt/espt.c index 2930858..44ab635 100644 --- a/board/espt/espt.c +++ b/board/espt/espt.c @@ -24,6 +24,8 @@ #include <asm/io.h> #include <asm/processor.h> +DECLARE_GLOBAL_DATA_PTR; + int checkboard(void) { puts("BOARD: ESPT-GIGA\n"); @@ -37,8 +39,6 @@ int board_init(void) int dram_init(void) { - DECLARE_GLOBAL_DATA_PTR; - gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; gd->bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE; printf("DRAM: %dMB\n", CONFIG_SYS_SDRAM_SIZE / (1024 * 1024)); diff --git a/board/isee/igep0020/igep0020.c b/board/isee/igep0020/igep0020.c index 3ba541e..36cc924 100644 --- a/board/isee/igep0020/igep0020.c +++ b/board/isee/igep0020/igep0020.c @@ -32,6 +32,8 @@ #include <asm/mach-types.h> #include "igep0020.h" +DECLARE_GLOBAL_DATA_PTR; + /* GPMC definitions for LAN9221 chips */ static const u32 gpmc_lan_config[] = { NET_LAN9221_GPMC_CONFIG1, @@ -48,8 +50,6 @@ static const u32 gpmc_lan_config[] = { */ int board_init(void) { - DECLARE_GLOBAL_DATA_PTR; - gpmc_init(); /* in SRAM or SDRAM, finish GPMC */ /* board id for Linux */ gd->bd->bi_arch_number = MACH_TYPE_IGEP0020; diff --git a/board/isee/igep0030/config.mk b/board/isee/igep0030/config.mk index de6384f..059a878 100644 --- a/board/isee/igep0030/config.mk +++ b/board/isee/igep0030/config.mk @@ -31,4 +31,3 @@ # For use with external or internal boots. CONFIG_SYS_TEXT_BASE = 0x80008000 - diff --git a/board/isee/igep0030/igep0030.c b/board/isee/igep0030/igep0030.c index bb4dc3b..6a92735 100644 --- a/board/isee/igep0030/igep0030.c +++ b/board/isee/igep0030/igep0030.c @@ -30,14 +30,14 @@ #include <asm/mach-types.h> #include "igep0030.h" +DECLARE_GLOBAL_DATA_PTR; + /* * Routine: board_init * Description: Early hardware init. */ int board_init(void) { - DECLARE_GLOBAL_DATA_PTR; - gpmc_init(); /* in SRAM or SDRAM, finish GPMC */ /* board id for Linux */ gd->bd->bi_arch_number = MACH_TYPE_IGEP0030; diff --git a/board/linkstation/linkstation.c b/board/linkstation/linkstation.c index c0d43eb..e564e50 100644 --- a/board/linkstation/linkstation.c +++ b/board/linkstation/linkstation.c @@ -32,11 +32,12 @@ #include <pci.h> #endif +DECLARE_GLOBAL_DATA_PTR; + extern void init_AVR_DUART(void); int checkboard (void) { - DECLARE_GLOBAL_DATA_PTR; char *p; bd_t *bd = gd->bd; diff --git a/board/logicpd/zoom1/zoom1.c b/board/logicpd/zoom1/zoom1.c index e442d68..7ef13cc 100644 --- a/board/logicpd/zoom1/zoom1.c +++ b/board/logicpd/zoom1/zoom1.c @@ -39,14 +39,14 @@ #include <asm/mach-types.h> #include "zoom1.h" +DECLARE_GLOBAL_DATA_PTR; + /* * Routine: board_init * Description: Early hardware init. */ int board_init(void) { - DECLARE_GLOBAL_DATA_PTR; - gpmc_init(); /* in SRAM or SDRAM, finish GPMC */ /* board id for Linux */ gd->bd->bi_arch_number = MACH_TYPE_OMAP_LDP; diff --git a/board/logicpd/zoom2/zoom2.c b/board/logicpd/zoom2/zoom2.c index e9f6625..76793e4 100644 --- a/board/logicpd/zoom2/zoom2.c +++ b/board/logicpd/zoom2/zoom2.c @@ -43,6 +43,8 @@ #include "zoom2.h" #include "zoom2_serial.h" +DECLARE_GLOBAL_DATA_PTR; + /* * This the the zoom2, board specific, gpmc configuration for the * quad uart on the debug board. The more general gpmc configurations @@ -120,7 +122,6 @@ void zoom2_identify(void) */ int board_init (void) { - DECLARE_GLOBAL_DATA_PTR; u32 *gpmc_config; gpmc_init (); /* in SRAM or SDRAM, finish GPMC */ diff --git a/board/mpr2/mpr2.c b/board/mpr2/mpr2.c index 0ec0c19..4881859 100644 --- a/board/mpr2/mpr2.c +++ b/board/mpr2/mpr2.c @@ -24,6 +24,8 @@ #include <asm/io.h> #include <asm/processor.h> +DECLARE_GLOBAL_DATA_PTR; + int checkboard(void) { puts("BOARD: MPR2\n"); @@ -152,8 +154,6 @@ int board_init(void) int dram_init(void) { - DECLARE_GLOBAL_DATA_PTR; - gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; gd->bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE; printf("SDRAM: %dMB\n", CONFIG_SYS_SDRAM_SIZE / (1024 * 1024)); diff --git a/board/ms7720se/ms7720se.c b/board/ms7720se/ms7720se.c index f83c120..ab7c338 100644 --- a/board/ms7720se/ms7720se.c +++ b/board/ms7720se/ms7720se.c @@ -30,6 +30,8 @@ #include <asm/io.h> #include <asm/processor.h> +DECLARE_GLOBAL_DATA_PTR; + #define LED_BASE 0xB0800000 int checkboard(void) @@ -45,8 +47,6 @@ int board_init(void) int dram_init(void) { - DECLARE_GLOBAL_DATA_PTR; - gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; gd->bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE; printf("DRAM: %dMB\n", CONFIG_SYS_SDRAM_SIZE / (1024 * 1024)); diff --git a/board/ms7722se/ms7722se.c b/board/ms7722se/ms7722se.c index 4e40b17..4e67ac6 100644 --- a/board/ms7722se/ms7722se.c +++ b/board/ms7722se/ms7722se.c @@ -28,6 +28,8 @@ #include <asm/io.h> #include <asm/processor.h> +DECLARE_GLOBAL_DATA_PTR; + #define LED_BASE 0xB0800000 int checkboard(void) @@ -46,8 +48,6 @@ int board_init(void) int dram_init(void) { - DECLARE_GLOBAL_DATA_PTR; - gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; gd->bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE; printf("DRAM: %dMB\n", CONFIG_SYS_SDRAM_SIZE / (1024 * 1024)); diff --git a/board/ms7750se/ms7750se.c b/board/ms7750se/ms7750se.c index 02ff0a3..9370af3 100644 --- a/board/ms7750se/ms7750se.c +++ b/board/ms7750se/ms7750se.c @@ -24,6 +24,8 @@ #include <common.h> #include <asm/processor.h> +DECLARE_GLOBAL_DATA_PTR; + int checkboard(void) { puts("BOARD: SH7750/SH7750S/SH7750R Solution Engine\n"); @@ -37,8 +39,6 @@ int board_init(void) int dram_init (void) { - DECLARE_GLOBAL_DATA_PTR; - gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; gd->bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE; printf("DRAM: %dMB\n", CONFIG_SYS_SDRAM_SIZE / (1024 * 1024)); diff --git a/board/overo/overo.c b/board/overo/overo.c index f917e40..4eafdb1 100644 --- a/board/overo/overo.c +++ b/board/overo/overo.c @@ -40,6 +40,8 @@ #include <asm/mach-types.h> #include "overo.h" +DECLARE_GLOBAL_DATA_PTR; + #define TWL4030_I2C_BUS 0 #define EXPANSION_EEPROM_I2C_BUS 2 #define EXPANSION_EEPROM_I2C_ADDRESS 0x51 @@ -87,8 +89,6 @@ static const u32 gpmc_lan_config[] = { */ int board_init(void) { - DECLARE_GLOBAL_DATA_PTR; - gpmc_init(); /* in SRAM or SDRAM, finish GPMC */ /* board id for Linux */ gd->bd->bi_arch_number = MACH_TYPE_OVERO; diff --git a/board/pandora/pandora.c b/board/pandora/pandora.c index 355e9ea..992e9f7 100644 --- a/board/pandora/pandora.c +++ b/board/pandora/pandora.c @@ -37,6 +37,8 @@ #include <asm/mach-types.h> #include "pandora.h" +DECLARE_GLOBAL_DATA_PTR; + #define TWL4030_BB_CFG_BBCHEN (1 << 4) #define TWL4030_BB_CFG_BBSEL_3200MV (3 << 2) #define TWL4030_BB_CFG_BBISEL_500UA 2 @@ -47,8 +49,6 @@ */ int board_init(void) { - DECLARE_GLOBAL_DATA_PTR; - gpmc_init(); /* in SRAM or SDRAM, finish GPMC */ /* board id for Linux */ gd->bd->bi_arch_number = MACH_TYPE_OMAP3_PANDORA; diff --git a/board/renesas/MigoR/migo_r.c b/board/renesas/MigoR/migo_r.c index c0f26ac..75b653f 100644 --- a/board/renesas/MigoR/migo_r.c +++ b/board/renesas/MigoR/migo_r.c @@ -28,6 +28,8 @@ #include <asm/io.h> #include <asm/processor.h> +DECLARE_GLOBAL_DATA_PTR; + int checkboard(void) { puts("BOARD: Renesas MigoR\n"); @@ -41,8 +43,6 @@ int board_init(void) int dram_init (void) { - DECLARE_GLOBAL_DATA_PTR; - gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; gd->bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE; printf("DRAM: %dMB\n", CONFIG_SYS_SDRAM_SIZE / (1024 * 1024)); diff --git a/board/renesas/ap325rxa/ap325rxa.c b/board/renesas/ap325rxa/ap325rxa.c index be919f5..758e6f4 100644 --- a/board/renesas/ap325rxa/ap325rxa.c +++ b/board/renesas/ap325rxa/ap325rxa.c @@ -23,6 +23,8 @@ #include <asm/io.h> #include <asm/processor.h> +DECLARE_GLOBAL_DATA_PTR; + /* PRI control register */ #define PRPRICR5 0xFF800048 /* LMB */ #define PRPRICR5_D 0x2a @@ -143,8 +145,6 @@ int board_init(void) int dram_init(void) { - DECLARE_GLOBAL_DATA_PTR; - gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; gd->bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE; printf("DRAM: %dMB\n", CONFIG_SYS_SDRAM_SIZE / (1024 * 1024)); diff --git a/board/renesas/r2dplus/r2dplus.c b/board/renesas/r2dplus/r2dplus.c index 0c08d68..b70395d 100644 --- a/board/renesas/r2dplus/r2dplus.c +++ b/board/renesas/r2dplus/r2dplus.c @@ -28,6 +28,8 @@ #include <asm/io.h> #include <asm/pci.h> +DECLARE_GLOBAL_DATA_PTR; + int checkboard(void) { puts("BOARD: Renesas Solutions R2D Plus\n"); @@ -41,8 +43,6 @@ int board_init(void) int dram_init(void) { - DECLARE_GLOBAL_DATA_PTR; - gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; gd->bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE; printf("DRAM: %dMB\n", CONFIG_SYS_SDRAM_SIZE / (1024 * 1024)); diff --git a/board/renesas/r7780mp/r7780mp.c b/board/renesas/r7780mp/r7780mp.c index 396e4b6..0b80099 100644 --- a/board/renesas/r7780mp/r7780mp.c +++ b/board/renesas/r7780mp/r7780mp.c @@ -26,6 +26,8 @@ #include <netdev.h> #include "r7780mp.h" +DECLARE_GLOBAL_DATA_PTR; + int checkboard(void) { #if defined(CONFIG_R7780MP) @@ -46,8 +48,6 @@ int board_init(void) int dram_init(void) { - DECLARE_GLOBAL_DATA_PTR; - gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; gd->bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE; printf("DRAM: %dMB\n", CONFIG_SYS_SDRAM_SIZE / (1024 * 1024)); diff --git a/board/renesas/rsk7203/rsk7203.c b/board/renesas/rsk7203/rsk7203.c index fbf2e23..06552c0 100644 --- a/board/renesas/rsk7203/rsk7203.c +++ b/board/renesas/rsk7203/rsk7203.c @@ -26,6 +26,8 @@ #include <asm/io.h> #include <asm/processor.h> +DECLARE_GLOBAL_DATA_PTR; + int checkboard(void) { puts("BOARD: Renesas Technology RSK7203\n"); @@ -39,8 +41,6 @@ int board_init(void) int dram_init(void) { - DECLARE_GLOBAL_DATA_PTR; - gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; gd->bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE; printf("DRAM: %dMB\n", CONFIG_SYS_SDRAM_SIZE / (1024 * 1024)); diff --git a/board/renesas/sh7763rdp/sh7763rdp.c b/board/renesas/sh7763rdp/sh7763rdp.c index 88bab70..9f44b9a 100644 --- a/board/renesas/sh7763rdp/sh7763rdp.c +++ b/board/renesas/sh7763rdp/sh7763rdp.c @@ -25,6 +25,8 @@ #include <asm/io.h> #include <asm/processor.h> +DECLARE_GLOBAL_DATA_PTR; + #define CPU_CMDREG 0xB1000006 #define PDCR 0xffef0006 #define PECR 0xffef0008 @@ -64,8 +66,6 @@ int board_init(void) int dram_init(void) { - DECLARE_GLOBAL_DATA_PTR; - gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; gd->bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE; printf("DRAM: %dMB\n", CONFIG_SYS_SDRAM_SIZE / (1024 * 1024)); diff --git a/board/renesas/sh7785lcr/sh7785lcr.c b/board/renesas/sh7785lcr/sh7785lcr.c index cad3905..904e755 100644 --- a/board/renesas/sh7785lcr/sh7785lcr.c +++ b/board/renesas/sh7785lcr/sh7785lcr.c @@ -23,6 +23,8 @@ #include <asm/pci.h> #include <netdev.h> +DECLARE_GLOBAL_DATA_PTR; + int checkboard(void) { puts("BOARD: Renesas Technology Corp. R0P7785LC0011RL\n"); @@ -36,8 +38,6 @@ int board_init(void) int dram_init(void) { - DECLARE_GLOBAL_DATA_PTR; - gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; gd->bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE; printf("DRAM: %dMB\n", CONFIG_SYS_SDRAM_SIZE / (1024 * 1024)); diff --git a/board/samsung/smdk6400/smdk6400.c b/board/samsung/smdk6400/smdk6400.c index 78aaa9e..35aa40b 100644 --- a/board/samsung/smdk6400/smdk6400.c +++ b/board/samsung/smdk6400/smdk6400.c @@ -32,6 +32,8 @@ #include <netdev.h> #include <asm/arch/s3c6400.h> +DECLARE_GLOBAL_DATA_PTR; + /* ------------------------------------------------------------------------- */ #define CS8900_Tacs 0x0 /* 0clk address set-up */ #define CS8900_Tcos 0x4 /* 4clk chip selection set-up */ @@ -63,8 +65,6 @@ static void cs8900_pre_init(void) int board_init(void) { - DECLARE_GLOBAL_DATA_PTR; - cs8900_pre_init(); /* NOR-flash in SROM0 */ @@ -80,8 +80,6 @@ int board_init(void) int dram_init(void) { - DECLARE_GLOBAL_DATA_PTR; - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; diff --git a/board/ti/beagle/beagle.c b/board/ti/beagle/beagle.c index d9b6f01..c066d6e 100644 --- a/board/ti/beagle/beagle.c +++ b/board/ti/beagle/beagle.c @@ -51,6 +51,8 @@ #define BEAGLE_NO_EEPROM 0xffffffff +DECLARE_GLOBAL_DATA_PTR; + static struct { unsigned int device_vendor; unsigned char revision; @@ -66,8 +68,6 @@ static struct { */ int board_init(void) { - DECLARE_GLOBAL_DATA_PTR; - gpmc_init(); /* in SRAM or SDRAM, finish GPMC */ /* board id for Linux */ gd->bd->bi_arch_number = MACH_TYPE_OMAP3_BEAGLE; diff --git a/board/ti/evm/evm.c b/board/ti/evm/evm.c index 09d14f7..aaf3033 100644 --- a/board/ti/evm/evm.c +++ b/board/ti/evm/evm.c @@ -37,9 +37,11 @@ #include <asm/mach-types.h> #include "evm.h" -static u8 omap3_evm_version; +DECLARE_GLOBAL_DATA_PTR; -u8 get_omap3_evm_rev(void) +static u32 omap3_evm_version; + +u32 get_omap3_evm_rev(void) { return omap3_evm_version; } @@ -103,8 +105,6 @@ u8 omap3_evm_need_extvbus(void) */ int board_init(void) { - DECLARE_GLOBAL_DATA_PTR; - gpmc_init(); /* in SRAM or SDRAM, finish GPMC */ /* board id for Linux */ gd->bd->bi_arch_number = MACH_TYPE_OMAP3EVM; diff --git a/board/ti/evm/evm.h b/board/ti/evm/evm.h index a76deb8..b721ad6 100644 --- a/board/ti/evm/evm.h +++ b/board/ti/evm/evm.h @@ -45,7 +45,7 @@ enum { OMAP3EVM_BOARD_GEN_2, /* EVM Rev >= Rev E */ }; -u8 get_omap3_evm_rev(void); +u32 get_omap3_evm_rev(void); #if defined(CONFIG_CMD_NET) static void setup_net_chip(void); diff --git a/board/ti/sdp3430/sdp.c b/board/ti/sdp3430/sdp.c index 0d8e20d..72f0984 100644 --- a/board/ti/sdp3430/sdp.c +++ b/board/ti/sdp3430/sdp.c @@ -31,6 +31,8 @@ #include <asm/mach-types.h> #include "sdp.h" +DECLARE_GLOBAL_DATA_PTR; + const omap3_sysinfo sysinfo = { DDR_DISCRETE, "OMAP3 SDP3430 board", @@ -101,8 +103,6 @@ extern struct gpmc *gpmc_cfg; */ int board_init(void) { - DECLARE_GLOBAL_DATA_PTR; - gpmc_init(); /* in SRAM or SDRAM, finish GPMC */ /* TODO: Dynamically pop out CS mapping and program accordingly */ /* Configure devices for default ON ON ON settings */ diff --git a/drivers/i2c/omap24xx_i2c.c b/drivers/i2c/omap24xx_i2c.c index fab49fd..215be34 100644 --- a/drivers/i2c/omap24xx_i2c.c +++ b/drivers/i2c/omap24xx_i2c.c @@ -27,6 +27,8 @@ #include "omap24xx_i2c.h" +DECLARE_GLOBAL_DATA_PTR; + #define I2C_TIMEOUT 1000 static void wait_for_bb (void); @@ -40,7 +42,6 @@ static unsigned int current_bus; void i2c_init (int speed, int slaveadd) { - DECLARE_GLOBAL_DATA_PTR; int psc, fsscll, fssclh; int hsscll = 0, hssclh = 0; u32 scll, sclh; diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c index 57cd4ee..40b136c 100644 --- a/drivers/mmc/fsl_esdhc.c +++ b/drivers/mmc/fsl_esdhc.c @@ -398,7 +398,7 @@ static int esdhc_init(struct mmc *mmc) esdhc_write32(®s->sysctl, SYSCTL_HCKEN | SYSCTL_IPGEN); /* Set the initial clock speed */ - set_sysctl(mmc, 400000); + mmc_set_clock(mmc, 400000); /* Disable the BRR and BWR bits in IRQSTAT */ esdhc_clrbits32(®s->irqstaten, IRQSTATEN_BRR | IRQSTATEN_BWR); @@ -444,7 +444,7 @@ int fsl_esdhc_initialize(bd_t *bis, struct fsl_esdhc_cfg *cfg) { struct fsl_esdhc *regs; struct mmc *mmc; - u32 caps; + u32 caps, voltage_caps; if (!cfg) return -1; @@ -462,14 +462,24 @@ int fsl_esdhc_initialize(bd_t *bis, struct fsl_esdhc_cfg *cfg) mmc->set_ios = esdhc_set_ios; mmc->init = esdhc_init; + voltage_caps = 0; caps = regs->hostcapblt; - if (caps & ESDHC_HOSTCAPBLT_VS18) - mmc->voltages |= MMC_VDD_165_195; + voltage_caps |= MMC_VDD_165_195; if (caps & ESDHC_HOSTCAPBLT_VS30) - mmc->voltages |= MMC_VDD_29_30 | MMC_VDD_30_31; + voltage_caps |= MMC_VDD_29_30 | MMC_VDD_30_31; if (caps & ESDHC_HOSTCAPBLT_VS33) - mmc->voltages |= MMC_VDD_32_33 | MMC_VDD_33_34; + voltage_caps |= MMC_VDD_32_33 | MMC_VDD_33_34; + +#ifdef CONFIG_SYS_SD_VOLTAGE + mmc->voltages = CONFIG_SYS_SD_VOLTAGE; +#else + mmc->voltages = MMC_VDD_32_33 | MMC_VDD_33_34; +#endif + if ((mmc->voltages & voltage_caps) == 0) { + printf("voltage not supported by controller\n"); + return -1; + } mmc->host_caps = MMC_MODE_4BIT | MMC_MODE_8BIT; @@ -477,7 +487,7 @@ int fsl_esdhc_initialize(bd_t *bis, struct fsl_esdhc_cfg *cfg) mmc->host_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS; mmc->f_min = 400000; - mmc->f_max = MIN(gd->sdhc_clk, 50000000); + mmc->f_max = MIN(gd->sdhc_clk, 52000000); mmc_register(mmc); diff --git a/drivers/serial/s3c64xx.c b/drivers/serial/s3c64xx.c index 6d22df7..a88e930 100644 --- a/drivers/serial/s3c64xx.c +++ b/drivers/serial/s3c64xx.c @@ -25,6 +25,8 @@ #include <asm/arch/s3c6400.h> +DECLARE_GLOBAL_DATA_PTR; + #ifdef CONFIG_SERIAL1 #define UART_NR S3C64XX_UART0 @@ -68,7 +70,6 @@ static const int udivslot[] = { void serial_setbrg(void) { - DECLARE_GLOBAL_DATA_PTR; s3c64xx_uart *const uart = s3c64xx_get_base_uart(UART_NR); u32 pclk = get_PCLK(); u32 baudrate = gd->baudrate; diff --git a/drivers/serial/serial_s5p.c b/drivers/serial/serial_s5p.c index 36333c3..9c1cbf4 100644 --- a/drivers/serial/serial_s5p.c +++ b/drivers/serial/serial_s5p.c @@ -27,6 +27,8 @@ #include <asm/arch/clk.h> #include <serial.h> +DECLARE_GLOBAL_DATA_PTR; + static inline struct s5p_uart *s5p_get_base_uart(int dev_index) { u32 offset = dev_index * sizeof(struct s5p_uart); @@ -61,7 +63,6 @@ static const int udivslot[] = { void serial_setbrg_dev(const int dev_index) { - DECLARE_GLOBAL_DATA_PTR; struct s5p_uart *const uart = s5p_get_base_uart(dev_index); u32 uclk = get_uart_clk(dev_index); u32 baudrate = gd->baudrate; diff --git a/drivers/serial/serial_sh.c b/drivers/serial/serial_sh.c index bfdb2ce..0103a29 100644 --- a/drivers/serial/serial_sh.c +++ b/drivers/serial/serial_sh.c @@ -21,6 +21,8 @@ #include <asm/io.h> #include <asm/processor.h> +DECLARE_GLOBAL_DATA_PTR; + #if defined(CONFIG_CONS_SCIF0) # define SCIF_BASE SCIF0_BASE #elif defined(CONFIG_CONS_SCIF1) @@ -131,8 +133,6 @@ void serial_setbrg(void) { - DECLARE_GLOBAL_DATA_PTR; - writeb(SCBRR_VALUE(gd->baudrate, CONFIG_SYS_CLK_FREQ), SCBRR); } diff --git a/drivers/video/mx3fb.c b/drivers/video/mx3fb.c index 51831f0..6dd952c 100644 --- a/drivers/video/mx3fb.c +++ b/drivers/video/mx3fb.c @@ -85,7 +85,7 @@ void lcd_panel_disable(void) #define V_END_WIDTH (7 + 3) /* lower_margin + vsync_len */ #define SIG_POL (DI_D3_DRDY_SHARP_POL | DI_D3_CLK_POL) #define IF_CONF 0 -#define IF_CLK_DIV 0x175 +#define IF_CLK_DIV 0x55 #else #define XRES 240 #define YRES 320 diff --git a/include/configs/davinci_dm6467evm.h b/include/configs/davinci_dm6467evm.h index f0a8e98..3ef4555 100644 --- a/include/configs/davinci_dm6467evm.h +++ b/include/configs/davinci_dm6467evm.h @@ -126,4 +126,12 @@ #define CONFIG_CMD_NAND #endif +#define CONFIG_MAX_RAM_BANK_SIZE (256 << 20) /* 256 MB */ + +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CONFIG_SYS_INIT_RAM_SIZE 0x1000 +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + \ + CONFIG_SYS_INIT_RAM_SIZE - \ + GENERATED_GBL_DATA_SIZE) + #endif /* __CONFIG_H */ diff --git a/include/configs/davinci_schmoogie.h b/include/configs/davinci_schmoogie.h index 967ebcc..5cc8bc0 100644 --- a/include/configs/davinci_schmoogie.h +++ b/include/configs/davinci_schmoogie.h @@ -147,11 +147,13 @@ #undef CONFIG_CMD_SETGETDCR #undef CONFIG_CMD_FLASH #undef CONFIG_CMD_IMLS -/*=======================*/ -/* KGDB support (if any) */ -/*=======================*/ -#ifdef CONFIG_CMD_KGDB -#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */ -#endif + +#define CONFIG_MAX_RAM_BANK_SIZE (256 << 20) /* 256 MB */ + +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CONFIG_SYS_INIT_RAM_SIZE 0x1000 +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + \ + CONFIG_SYS_INIT_RAM_SIZE - \ + GENERATED_GBL_DATA_SIZE) + #endif /* __CONFIG_H */ diff --git a/include/configs/davinci_sffsdr.h b/include/configs/davinci_sffsdr.h index 4d866d0..307b9f2 100644 --- a/include/configs/davinci_sffsdr.h +++ b/include/configs/davinci_sffsdr.h @@ -143,9 +143,13 @@ #undef CONFIG_CMD_SETGETDCR #undef CONFIG_CMD_FLASH #undef CONFIG_CMD_IMLS -/* KGDB support (if any) */ -#ifdef CONFIG_CMD_KGDB -#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */ -#endif + +#define CONFIG_MAX_RAM_BANK_SIZE (256 << 20) /* 256 MB */ + +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CONFIG_SYS_INIT_RAM_SIZE 0x1000 +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + \ + CONFIG_SYS_INIT_RAM_SIZE - \ + GENERATED_GBL_DATA_SIZE) + #endif /* __CONFIG_H */ diff --git a/include/configs/davinci_sonata.h b/include/configs/davinci_sonata.h index f0eeb90..ebfdafa 100644 --- a/include/configs/davinci_sonata.h +++ b/include/configs/davinci_sonata.h @@ -198,11 +198,13 @@ #else #error "Either CONFIG_SYS_USE_NAND or CONFIG_SYS_USE_NOR _MUST_ be defined !!!" #endif -/*=======================*/ -/* KGDB support (if any) */ -/*=======================*/ -#ifdef CONFIG_CMD_KGDB -#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */ -#endif + +#define CONFIG_MAX_RAM_BANK_SIZE (256 << 20) /* 256 MB */ + +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CONFIG_SYS_INIT_RAM_SIZE 0x1000 +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + \ + CONFIG_SYS_INIT_RAM_SIZE - \ + GENERATED_GBL_DATA_SIZE) + #endif /* __CONFIG_H */ diff --git a/include/configs/top9000.h b/include/configs/top9000.h index ff3933b..5f0160d 100644 --- a/include/configs/top9000.h +++ b/include/configs/top9000.h @@ -40,9 +40,9 @@ /* * Warning: changing CONFIG_SYS_TEXT_BASE requires - * adapting the initial boot program + * adapting the initial boot program. */ -#define CONFIG_SYS_TEXT_BASE 0x21f00000 /* 31 MB into RAM */ +#define CONFIG_SYS_TEXT_BASE 0x20000000 /* start of SDRAM */ /* Command line configuration */ #include <config_cmd_default.h> @@ -311,4 +311,3 @@ extern void read_factory_r(void); #endif #endif - diff --git a/include/linux/mii.h b/include/linux/mii.h index 6e7ffab..8b92692 100644 --- a/include/linux/mii.h +++ b/include/linux/mii.h @@ -10,128 +10,128 @@ /* Generic MII registers. */ -#define MII_BMCR 0x00 /* Basic mode control register */ -#define MII_BMSR 0x01 /* Basic mode status register */ -#define MII_PHYSID1 0x02 /* PHYS ID 1 */ -#define MII_PHYSID2 0x03 /* PHYS ID 2 */ -#define MII_ADVERTISE 0x04 /* Advertisement control reg */ -#define MII_LPA 0x05 /* Link partner ability reg */ -#define MII_EXPANSION 0x06 /* Expansion register */ -#define MII_CTRL1000 0x09 /* 1000BASE-T control */ -#define MII_STAT1000 0x0a /* 1000BASE-T status */ +#define MII_BMCR 0x00 /* Basic mode control register */ +#define MII_BMSR 0x01 /* Basic mode status register */ +#define MII_PHYSID1 0x02 /* PHYS ID 1 */ +#define MII_PHYSID2 0x03 /* PHYS ID 2 */ +#define MII_ADVERTISE 0x04 /* Advertisement control reg */ +#define MII_LPA 0x05 /* Link partner ability reg */ +#define MII_EXPANSION 0x06 /* Expansion register */ +#define MII_CTRL1000 0x09 /* 1000BASE-T control */ +#define MII_STAT1000 0x0a /* 1000BASE-T status */ #define MII_ESTATUS 0x0f /* Extended Status */ -#define MII_DCOUNTER 0x12 /* Disconnect counter */ -#define MII_FCSCOUNTER 0x13 /* False carrier counter */ -#define MII_NWAYTEST 0x14 /* N-way auto-neg test reg */ -#define MII_RERRCOUNTER 0x15 /* Receive error counter */ -#define MII_SREVISION 0x16 /* Silicon revision */ -#define MII_RESV1 0x17 /* Reserved... */ -#define MII_LBRERROR 0x18 /* Lpback, rx, bypass error */ -#define MII_PHYADDR 0x19 /* PHY address */ -#define MII_RESV2 0x1a /* Reserved... */ -#define MII_TPISTATUS 0x1b /* TPI status for 10mbps */ -#define MII_NCONFIG 0x1c /* Network interface config */ +#define MII_DCOUNTER 0x12 /* Disconnect counter */ +#define MII_FCSCOUNTER 0x13 /* False carrier counter */ +#define MII_NWAYTEST 0x14 /* N-way auto-neg test reg */ +#define MII_RERRCOUNTER 0x15 /* Receive error counter */ +#define MII_SREVISION 0x16 /* Silicon revision */ +#define MII_RESV1 0x17 /* Reserved... */ +#define MII_LBRERROR 0x18 /* Lpback, rx, bypass error */ +#define MII_PHYADDR 0x19 /* PHY address */ +#define MII_RESV2 0x1a /* Reserved... */ +#define MII_TPISTATUS 0x1b /* TPI status for 10mbps */ +#define MII_NCONFIG 0x1c /* Network interface config */ /* Basic mode control register. */ -#define BMCR_RESV 0x003f /* Unused... */ -#define BMCR_SPEED1000 0x0040 /* MSB of Speed (1000) */ -#define BMCR_CTST 0x0080 /* Collision test */ -#define BMCR_FULLDPLX 0x0100 /* Full duplex */ -#define BMCR_ANRESTART 0x0200 /* Auto negotiation restart */ -#define BMCR_ISOLATE 0x0400 /* Disconnect DP83840 from MII */ -#define BMCR_PDOWN 0x0800 /* Powerdown the DP83840 */ -#define BMCR_ANENABLE 0x1000 /* Enable auto negotiation */ -#define BMCR_SPEED100 0x2000 /* Select 100Mbps */ -#define BMCR_LOOPBACK 0x4000 /* TXD loopback bits */ -#define BMCR_RESET 0x8000 /* Reset the DP83840 */ +#define BMCR_RESV 0x003f /* Unused... */ +#define BMCR_SPEED1000 0x0040 /* MSB of Speed (1000) */ +#define BMCR_CTST 0x0080 /* Collision test */ +#define BMCR_FULLDPLX 0x0100 /* Full duplex */ +#define BMCR_ANRESTART 0x0200 /* Auto negotiation restart */ +#define BMCR_ISOLATE 0x0400 /* Disconnect DP83840 from MII */ +#define BMCR_PDOWN 0x0800 /* Powerdown the DP83840 */ +#define BMCR_ANENABLE 0x1000 /* Enable auto negotiation */ +#define BMCR_SPEED100 0x2000 /* Select 100Mbps */ +#define BMCR_LOOPBACK 0x4000 /* TXD loopback bits */ +#define BMCR_RESET 0x8000 /* Reset the DP83840 */ /* Basic mode status register. */ -#define BMSR_ERCAP 0x0001 /* Ext-reg capability */ -#define BMSR_JCD 0x0002 /* Jabber detected */ -#define BMSR_LSTATUS 0x0004 /* Link status */ -#define BMSR_ANEGCAPABLE 0x0008 /* Able to do auto-negotiation */ -#define BMSR_RFAULT 0x0010 /* Remote fault detected */ -#define BMSR_ANEGCOMPLETE 0x0020 /* Auto-negotiation complete */ -#define BMSR_RESV 0x00c0 /* Unused... */ +#define BMSR_ERCAP 0x0001 /* Ext-reg capability */ +#define BMSR_JCD 0x0002 /* Jabber detected */ +#define BMSR_LSTATUS 0x0004 /* Link status */ +#define BMSR_ANEGCAPABLE 0x0008 /* Able to do auto-negotiation */ +#define BMSR_RFAULT 0x0010 /* Remote fault detected */ +#define BMSR_ANEGCOMPLETE 0x0020 /* Auto-negotiation complete */ +#define BMSR_RESV 0x00c0 /* Unused... */ #define BMSR_ESTATEN 0x0100 /* Extended Status in R15 */ -#define BMSR_100HALF2 0x0200 /* Can do 100BASE-T2 HDX */ -#define BMSR_100FULL2 0x0400 /* Can do 100BASE-T2 FDX */ -#define BMSR_10HALF 0x0800 /* Can do 10mbps, half-duplex */ -#define BMSR_10FULL 0x1000 /* Can do 10mbps, full-duplex */ -#define BMSR_100HALF 0x2000 /* Can do 100mbps, half-duplex */ -#define BMSR_100FULL 0x4000 /* Can do 100mbps, full-duplex */ -#define BMSR_100BASE4 0x8000 /* Can do 100mbps, 4k packets */ +#define BMSR_100HALF2 0x0200 /* Can do 100BASE-T2 HDX */ +#define BMSR_100FULL2 0x0400 /* Can do 100BASE-T2 FDX */ +#define BMSR_10HALF 0x0800 /* Can do 10mbps, half-duplex */ +#define BMSR_10FULL 0x1000 /* Can do 10mbps, full-duplex */ +#define BMSR_100HALF 0x2000 /* Can do 100mbps, half-duplex */ +#define BMSR_100FULL 0x4000 /* Can do 100mbps, full-duplex */ +#define BMSR_100BASE4 0x8000 /* Can do 100mbps, 4k packets */ /* Advertisement control register. */ -#define ADVERTISE_SLCT 0x001f /* Selector bits */ -#define ADVERTISE_CSMA 0x0001 /* Only selector supported */ -#define ADVERTISE_10HALF 0x0020 /* Try for 10mbps half-duplex */ -#define ADVERTISE_1000XFULL 0x0020 /* Try for 1000BASE-X full-duplex */ -#define ADVERTISE_10FULL 0x0040 /* Try for 10mbps full-duplex */ -#define ADVERTISE_1000XHALF 0x0040 /* Try for 1000BASE-X half-duplex */ -#define ADVERTISE_100HALF 0x0080 /* Try for 100mbps half-duplex */ -#define ADVERTISE_1000XPAUSE 0x0080 /* Try for 1000BASE-X pause */ -#define ADVERTISE_100FULL 0x0100 /* Try for 100mbps full-duplex */ -#define ADVERTISE_1000XPSE_ASYM 0x0100 /* Try for 1000BASE-X asym pause */ -#define ADVERTISE_100BASE4 0x0200 /* Try for 100mbps 4k packets */ -#define ADVERTISE_PAUSE_CAP 0x0400 /* Try for pause */ -#define ADVERTISE_PAUSE_ASYM 0x0800 /* Try for asymetric pause */ -#define ADVERTISE_RESV 0x1000 /* Unused... */ -#define ADVERTISE_RFAULT 0x2000 /* Say we can detect faults */ -#define ADVERTISE_LPACK 0x4000 /* Ack link partners response */ -#define ADVERTISE_NPAGE 0x8000 /* Next page bit */ +#define ADVERTISE_SLCT 0x001f /* Selector bits */ +#define ADVERTISE_CSMA 0x0001 /* Only selector supported */ +#define ADVERTISE_10HALF 0x0020 /* Try for 10mbps half-duplex */ +#define ADVERTISE_1000XFULL 0x0020 /* Try for 1000BASE-X full-duplex */ +#define ADVERTISE_10FULL 0x0040 /* Try for 10mbps full-duplex */ +#define ADVERTISE_1000XHALF 0x0040 /* Try for 1000BASE-X half-duplex */ +#define ADVERTISE_100HALF 0x0080 /* Try for 100mbps half-duplex */ +#define ADVERTISE_1000XPAUSE 0x0080 /* Try for 1000BASE-X pause */ +#define ADVERTISE_100FULL 0x0100 /* Try for 100mbps full-duplex */ +#define ADVERTISE_1000XPSE_ASYM 0x0100 /* Try for 1000BASE-X asym pause */ +#define ADVERTISE_100BASE4 0x0200 /* Try for 100mbps 4k packets */ +#define ADVERTISE_PAUSE_CAP 0x0400 /* Try for pause */ +#define ADVERTISE_PAUSE_ASYM 0x0800 /* Try for asymetric pause */ +#define ADVERTISE_RESV 0x1000 /* Unused... */ +#define ADVERTISE_RFAULT 0x2000 /* Say we can detect faults */ +#define ADVERTISE_LPACK 0x4000 /* Ack link partners response */ +#define ADVERTISE_NPAGE 0x8000 /* Next page bit */ #define ADVERTISE_FULL (ADVERTISE_100FULL | ADVERTISE_10FULL | \ ADVERTISE_CSMA) #define ADVERTISE_ALL (ADVERTISE_10HALF | ADVERTISE_10FULL | \ - ADVERTISE_100HALF | ADVERTISE_100FULL) + ADVERTISE_100HALF | ADVERTISE_100FULL) /* Link partner ability register. */ -#define LPA_SLCT 0x001f /* Same as advertise selector */ -#define LPA_10HALF 0x0020 /* Can do 10mbps half-duplex */ -#define LPA_1000XFULL 0x0020 /* Can do 1000BASE-X full-duplex */ -#define LPA_10FULL 0x0040 /* Can do 10mbps full-duplex */ -#define LPA_1000XHALF 0x0040 /* Can do 1000BASE-X half-duplex */ -#define LPA_100HALF 0x0080 /* Can do 100mbps half-duplex */ -#define LPA_1000XPAUSE 0x0080 /* Can do 1000BASE-X pause */ -#define LPA_100FULL 0x0100 /* Can do 100mbps full-duplex */ -#define LPA_1000XPAUSE_ASYM 0x0100 /* Can do 1000BASE-X pause asym*/ -#define LPA_100BASE4 0x0200 /* Can do 100mbps 4k packets */ -#define LPA_PAUSE_CAP 0x0400 /* Can pause */ -#define LPA_PAUSE_ASYM 0x0800 /* Can pause asymetrically */ -#define LPA_RESV 0x1000 /* Unused... */ -#define LPA_RFAULT 0x2000 /* Link partner faulted */ -#define LPA_LPACK 0x4000 /* Link partner acked us */ -#define LPA_NPAGE 0x8000 /* Next page bit */ +#define LPA_SLCT 0x001f /* Same as advertise selector */ +#define LPA_10HALF 0x0020 /* Can do 10mbps half-duplex */ +#define LPA_1000XFULL 0x0020 /* Can do 1000BASE-X full-duplex */ +#define LPA_10FULL 0x0040 /* Can do 10mbps full-duplex */ +#define LPA_1000XHALF 0x0040 /* Can do 1000BASE-X half-duplex */ +#define LPA_100HALF 0x0080 /* Can do 100mbps half-duplex */ +#define LPA_1000XPAUSE 0x0080 /* Can do 1000BASE-X pause */ +#define LPA_100FULL 0x0100 /* Can do 100mbps full-duplex */ +#define LPA_1000XPAUSE_ASYM 0x0100 /* Can do 1000BASE-X pause asym*/ +#define LPA_100BASE4 0x0200 /* Can do 100mbps 4k packets */ +#define LPA_PAUSE_CAP 0x0400 /* Can pause */ +#define LPA_PAUSE_ASYM 0x0800 /* Can pause asymetrically */ +#define LPA_RESV 0x1000 /* Unused... */ +#define LPA_RFAULT 0x2000 /* Link partner faulted */ +#define LPA_LPACK 0x4000 /* Link partner acked us */ +#define LPA_NPAGE 0x8000 /* Next page bit */ #define LPA_DUPLEX (LPA_10FULL | LPA_100FULL) #define LPA_100 (LPA_100FULL | LPA_100HALF | LPA_100BASE4) /* Expansion register for auto-negotiation. */ -#define EXPANSION_NWAY 0x0001 /* Can do N-way auto-nego */ -#define EXPANSION_LCWP 0x0002 /* Got new RX page code word */ -#define EXPANSION_ENABLENPAGE 0x0004 /* This enables npage words */ -#define EXPANSION_NPCAPABLE 0x0008 /* Link partner supports npage */ -#define EXPANSION_MFAULTS 0x0010 /* Multiple faults detected */ -#define EXPANSION_RESV 0xffe0 /* Unused... */ +#define EXPANSION_NWAY 0x0001 /* Can do N-way auto-nego */ +#define EXPANSION_LCWP 0x0002 /* Got new RX page code word */ +#define EXPANSION_ENABLENPAGE 0x0004 /* This enables npage words */ +#define EXPANSION_NPCAPABLE 0x0008 /* Link partner supports npage */ +#define EXPANSION_MFAULTS 0x0010 /* Multiple faults detected */ +#define EXPANSION_RESV 0xffe0 /* Unused... */ #define ESTATUS_1000_TFULL 0x2000 /* Can do 1000BT Full */ #define ESTATUS_1000_THALF 0x1000 /* Can do 1000BT Half */ /* N-way test register. */ -#define NWAYTEST_RESV1 0x00ff /* Unused... */ -#define NWAYTEST_LOOPBACK 0x0100 /* Enable loopback for N-way */ -#define NWAYTEST_RESV2 0xfe00 /* Unused... */ +#define NWAYTEST_RESV1 0x00ff /* Unused... */ +#define NWAYTEST_LOOPBACK 0x0100 /* Enable loopback for N-way */ +#define NWAYTEST_RESV2 0xfe00 /* Unused... */ /* 1000BASE-T Control register */ -#define ADVERTISE_1000FULL 0x0200 /* Advertise 1000BASE-T full duplex */ -#define ADVERTISE_1000HALF 0x0100 /* Advertise 1000BASE-T half duplex */ +#define ADVERTISE_1000FULL 0x0200 /* Advertise 1000BASE-T full duplex */ +#define ADVERTISE_1000HALF 0x0100 /* Advertise 1000BASE-T half duplex */ /* 1000BASE-T Status register */ -#define LPA_1000LOCALRXOK 0x2000 /* Link partner local receiver status */ -#define LPA_1000REMRXOK 0x1000 /* Link partner remote receiver status */ -#define LPA_1000FULL 0x0800 /* Link partner 1000BASE-T full duplex */ -#define LPA_1000HALF 0x0400 /* Link partner 1000BASE-T half duplex */ +#define LPA_1000LOCALRXOK 0x2000 /* Link partner local receiver status */ +#define LPA_1000REMRXOK 0x1000 /* Link partner remote receiver status */ +#define LPA_1000FULL 0x0800 /* Link partner 1000BASE-T full duplex */ +#define LPA_1000HALF 0x0400 /* Link partner 1000BASE-T half duplex */ /* Flow control flags */ #define FLOW_CTRL_TX 0x01 diff --git a/include/mmc.h b/include/mmc.h index 9f94f42..74c0b1d 100644 --- a/include/mmc.h +++ b/include/mmc.h @@ -1,5 +1,5 @@ /* - * Copyright 2008, Freescale Semiconductor, Inc + * Copyright 2008,2010 Freescale Semiconductor, Inc * Andy Fleming * * Based (loosely) on the Linux code @@ -280,6 +280,7 @@ int mmc_register(struct mmc *mmc); int mmc_initialize(bd_t *bis); int mmc_init(struct mmc *mmc); int mmc_read(struct mmc *mmc, u64 src, uchar *dst, int size); +void mmc_set_clock(struct mmc *mmc, uint clock); struct mmc *find_mmc_device(int dev_num); int mmc_set_dev(int dev_num); void print_mmc_devices(char separator); |