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-rw-r--r--include/configs/openrd_base.h31
1 files changed, 31 insertions, 0 deletions
diff --git a/include/configs/openrd_base.h b/include/configs/openrd_base.h
index 52fa73d..846dfcd 100644
--- a/include/configs/openrd_base.h
+++ b/include/configs/openrd_base.h
@@ -103,6 +103,7 @@
#define CONFIG_CMD_NAND
#define CONFIG_CMD_PING
#define CONFIG_CMD_USB
+#define CONFIG_CMD_IDE
/*
* NAND configuration
@@ -205,6 +206,36 @@
#endif /* CONFIG_CMD_USB */
/*
+ * IDe Support on SATA port0
+ */
+#ifdef CONFIG_CMD_IDE
+#define __io
+#define CONFIG_CMD_EXT2
+#define CONFIG_MVSATA_IDE
+#define CONFIG_IDE_PREINIT
+#define CONFIG_MVSATA_IDE_USE_PORT1
+/* Needs byte-swapping for ATA data register */
+#define CONFIG_IDE_SWAP_IO
+/* Data, registers and alternate blocks are at the same offset */
+#define CONFIG_SYS_ATA_DATA_OFFSET (0x0100)
+#define CONFIG_SYS_ATA_REG_OFFSET (0x0100)
+#define CONFIG_SYS_ATA_ALT_OFFSET (0x0100)
+/* Each 8-bit ATA register is aligned to a 4-bytes address */
+#define CONFIG_SYS_ATA_STRIDE 4
+/* Controller supports 48-bits LBA addressing */
+#define CONFIG_LBA48
+/* CONFIG_CMD_IDE requires some #defines for ATA registers */
+#define CONFIG_SYS_IDE_MAXBUS 2
+#define CONFIG_SYS_IDE_MAXDEVICE 2
+/* ATA registers base is at SATA controller base */
+#define CONFIG_SYS_ATA_BASE_ADDR KW_SATA_BASE
+/* ATA bus 0 is Kirkwood port 0 on openrd */
+#define CONFIG_SYS_ATA_IDE0_OFFSET KW_SATA_PORT0_OFFSET
+/* ATA bus 1 is Kirkwood port 1 on openrd */
+#define CONFIG_SYS_ATA_IDE1_OFFSET KW_SATA_PORT1_OFFSET
+#endif /* CONFIG_CMD_IDE */
+
+/*
* File system
*/
#define CONFIG_CMD_FAT