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-rw-r--r--CHANGELOG22
-rw-r--r--MAINTAINERS4
-rwxr-xr-xMAKEALL9
-rw-r--r--Makefile6
-rw-r--r--board/cobra5272/flash.c1
-rw-r--r--board/m5271evb/Makefile40
-rw-r--r--board/m5271evb/config.mk25
-rw-r--r--board/m5271evb/m5271evb.c125
-rw-r--r--board/m5271evb/u-boot.lds145
-rw-r--r--board/m5272c3/flash.c1
-rw-r--r--board/m5282evb/flash.c1
-rw-r--r--board/r5200/Makefile40
-rw-r--r--board/r5200/config.mk25
-rw-r--r--board/r5200/r5200.c125
-rw-r--r--board/r5200/u-boot.lds144
-rw-r--r--common/environment.c3
-rw-r--r--config.mk7
-rw-r--r--cpu/mcf52x2/cpu.c49
-rw-r--r--cpu/mcf52x2/cpu_init.c37
-rw-r--r--cpu/mcf52x2/fec.c22
-rw-r--r--cpu/mcf52x2/interrupts.c7
-rw-r--r--cpu/mcf52x2/serial.c30
-rw-r--r--cpu/mcf52x2/start.S42
-rw-r--r--examples/Makefile2
-rw-r--r--include/asm-m68k/immap_5271.h98
-rw-r--r--include/asm-m68k/m5271.h114
-rw-r--r--include/asm-m68k/mcftimer.h2
-rw-r--r--include/asm-m68k/mcfuart.h2
-rw-r--r--include/asm-m68k/ptrace.h2
-rw-r--r--include/configs/M5271EVB.h154
-rw-r--r--include/configs/r5200.h169
-rw-r--r--lib_m68k/board.c9
-rw-r--r--lib_m68k/time.c9
33 files changed, 1446 insertions, 25 deletions
diff --git a/CHANGELOG b/CHANGELOG
index ad5f7a3..7eb8ede 100644
--- a/CHANGELOG
+++ b/CHANGELOG
@@ -2,6 +2,19 @@
Changes since U-Boot 1.1.4:
======================================================================
+* Add M5271EVB board support.
+
+* Make R5200 specific low level initialization board conditional.
+
+* Update CPU target identification strings for Coldfire family.
+
+* Update register definitions for MCF5271.
+
+* Fix serial console support for MCF5271.
+
+* Fixes for gcc 3.4 based m68k toolchain,
+ based on patch by Jate Sujjavanich.
+
* Fix lowboot support on MCC200 board
* Merged MPC8349ADS and MPC8349EMDS ports into MPC8349EMDS port:
@@ -494,6 +507,15 @@ Changes since U-Boot 1.1.4:
PMC405 and CPCI2DP: Added firmware download and booting via pci.
Patch by Matthias Fuchs, 20 Dec 2005
+* Add ColdFire targets to MAKEALL script
+ Patch by Zachary Landau, 26 Jan 2006
+
+* Add support for r5200 board
+ Patch by Zachary Landau, 26 Jan 2006
+
+* Add support for Freescale M5271 processor
+ Patch by Zachary Landau, 26 Jan 2006
+
* Fix 28F256J3A support on PM520 board
(without bank-switching only 32 MB can be accessed)
diff --git a/MAINTAINERS b/MAINTAINERS
index 0ef9e03..9380220 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -534,6 +534,10 @@ Matthias Fuchs <matthias.fuchs@esd-electronics.com>
TASREG MCF5249
+Zachary P. Landau <zachary.landau@labxtechnologies.com>
+
+ r5200 mcf52x2
+
#########################################################################
# End of MAINTAINERS list #
#########################################################################
diff --git a/MAKEALL b/MAKEALL
index 0d81844..8ab31e0 100755
--- a/MAKEALL
+++ b/MAKEALL
@@ -273,6 +273,12 @@ LIST_nios2="PCI5441 PK1C20"
LIST_microblaze="suzaku"
+#########################################################################
+## ColdFire Systems
+#########################################################################
+
+LIST_coldfire="cobra5272 M5272C3 M5282EVB TASREG r5200 M5271EVB"
+
#-----------------------------------------------------------------------
#----- for now, just run PPC by default -----
@@ -300,7 +306,8 @@ do
microblaze| \
mips|mips_el| \
nios|nios2| \
- x86|I486)
+ x86|I486| \
+ coldfire)
for target in `eval echo '$LIST_'${arg}`
do
build_target ${target}
diff --git a/Makefile b/Makefile
index 6e24341..fa7a4a7 100644
--- a/Makefile
+++ b/Makefile
@@ -1315,6 +1315,12 @@ M5282EVB_config : unconfig
TASREG_config : unconfig
@./mkconfig $(@:_config=) m68k mcf52x2 tasreg esd
+r5200_config : unconfig
+ @./mkconfig $(@:_config=) m68k mcf52x2 r5200
+
+M5271EVB_config : unconfig
+ @./mkconfig $(@:_config=) m68k mcf52x2 m5271evb
+
#########################################################################
## MPC83xx Systems
#########################################################################
diff --git a/board/cobra5272/flash.c b/board/cobra5272/flash.c
index 73cc2f2..82452e2 100644
--- a/board/cobra5272/flash.c
+++ b/board/cobra5272/flash.c
@@ -65,6 +65,7 @@ void flash_print_info (flash_info_t * info)
printf ("\n");
Done:
+ return;
}
diff --git a/board/m5271evb/Makefile b/board/m5271evb/Makefile
new file mode 100644
index 0000000..34de983
--- /dev/null
+++ b/board/m5271evb/Makefile
@@ -0,0 +1,40 @@
+#
+# (C) Copyright 2000-2006
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB = lib$(BOARD).a
+
+OBJS = $(BOARD).o
+
+$(LIB): .depend $(OBJS)
+ $(AR) crv $@ $(OBJS)
+
+#########################################################################
+
+.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
+ $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
+
+sinclude .depend
+
+#########################################################################
diff --git a/board/m5271evb/config.mk b/board/m5271evb/config.mk
new file mode 100644
index 0000000..9a7af7c
--- /dev/null
+++ b/board/m5271evb/config.mk
@@ -0,0 +1,25 @@
+#
+# (C) Copyright 2000-2006
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+# Coldfire contribution by Bernhard Kuhn <bkuhn@metrowerks.com>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+TEXT_BASE = 0xffe00000
diff --git a/board/m5271evb/m5271evb.c b/board/m5271evb/m5271evb.c
new file mode 100644
index 0000000..d364bd6
--- /dev/null
+++ b/board/m5271evb/m5271evb.c
@@ -0,0 +1,125 @@
+/*
+ * (C) Copyright 2000-2006
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/m5271.h>
+#include <asm/immap_5271.h>
+
+int checkboard (void) {
+ puts ("Board: Freescale M5271EVB\n");
+ return 0;
+};
+
+long int initdram (int board_type) {
+
+ int i;
+
+ /* Enable Address lines 23-21 and lower 16bits of data path */
+ mbar_writeByte(MCF_GPIO_PAR_AD, MCF_GPIO_AD_ADDR23 |
+ MCF_GPIO_AD_ADDR22 | MCF_GPIO_AD_ADDR21 |
+ MCF_GPIO_AD_DATAL);
+
+ /* Set CS2 pin to be SD_CS0 */
+ mbar_writeByte(MCF_GPIO_PAR_CS, mbar_readByte(MCF_GPIO_PAR_CS)
+ | MCF_GPIO_PAR_CS_PAR_CS2);
+
+ /* Configure SDRAM Control Pin Assignemnt Register */
+ mbar_writeByte(MCF_GPIO_PAR_SDRAM, MCF_GPIO_SDRAM_CSSDCS_00 |
+ MCF_GPIO_SDRAM_SDWE | MCF_GPIO_SDRAM_SCAS |
+ MCF_GPIO_SDRAM_SRAS | MCF_GPIO_SDRAM_SCKE |
+ MCF_GPIO_SDRAM_SDCS_11);
+
+ /*
+ * Check to see if the SDRAM has already been initialized
+ * by a run control tool
+ */
+ if (!(mbar_readLong(MCF_SDRAMC_DACR0) & MCF_SDRAMC_DACRn_RE))
+ {
+ /* Initialize DRAM Control Register: DCR */
+ mbar_writeShort(MCF_SDRAMC_DCR,
+ MCF_SDRAMC_DCR_RTIM(0x01)
+ | MCF_SDRAMC_DCR_RC(0x30));
+
+ /*
+ * Initialize DACR0
+ *
+ * CASL: 01
+ * CBM: cmd at A20, bank select bits 21 and up
+ * PS: 32bit port size
+ */
+ mbar_writeLong(MCF_SDRAMC_DACR0,
+ MCF_SDRAMC_DACRn_BA(CFG_SDRAM_BASE>>18)
+ | MCF_SDRAMC_DACRn_CASL(1)
+ | MCF_SDRAMC_DACRn_CBM(3)
+ | MCF_SDRAMC_DACRn_PS(0));
+
+ /* Initialize DMR0 */
+ mbar_writeLong(MCF_SDRAMC_DMR0,
+ MCF_SDRAMC_DMRn_BAM_16M
+ | MCF_SDRAMC_DMRn_V);
+
+ /* Set IP bit in DACR */
+ mbar_writeLong(MCF_SDRAMC_DACR0, mbar_readLong(MCF_SDRAMC_DACR0)
+ | MCF_SDRAMC_DACRn_IP);
+
+ /* Wait at least 20ns to allow banks to precharge */
+ for (i = 0; i < 5; i++)
+ asm(" nop");
+
+ /* Write to this block to initiate precharge */
+ *(u32 *)(CFG_SDRAM_BASE) = 0xa5a5a5a5;
+
+ /* Set RE bit in DACR */
+ mbar_writeLong(MCF_SDRAMC_DACR0, mbar_readLong(MCF_SDRAMC_DACR0)
+ | MCF_SDRAMC_DACRn_RE);
+
+ /* Wait for at least 8 auto refresh cycles to occur */
+ for (i = 0; i < 2000; i++)
+ asm(" nop");
+
+ /* Finish the configuration by issuing the MRS */
+ mbar_writeLong(MCF_SDRAMC_DACR0, mbar_readLong(MCF_SDRAMC_DACR0)
+ | MCF_SDRAMC_DACRn_MRS);
+
+ /*
+ * Write to the SDRAM Mode Register A0-A11 = 0x400
+ *
+ * Write Burst Mode = Programmed Burst Length
+ * Op Mode = Standard Op
+ * CAS Latency = 2
+ * Burst Type = Sequential
+ * Burst Length = 1
+ */
+ *(u32 *)(CFG_SDRAM_BASE + 0x400) = 0xa5a5a5a5;
+ }
+
+ return CFG_SDRAM_SIZE * 1024 * 1024;
+};
+
+int testdram (void) {
+
+ /* TODO: XXX XXX XXX */
+ printf ("DRAM test not implemented!\n");
+
+ return (0);
+}
diff --git a/board/m5271evb/u-boot.lds b/board/m5271evb/u-boot.lds
new file mode 100644
index 0000000..69f3179
--- /dev/null
+++ b/board/m5271evb/u-boot.lds
@@ -0,0 +1,145 @@
+/*
+ * (C) Copyright 2000
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_ARCH(m68k)
+SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib);
+/* Do we need any of these for elf?
+ __DYNAMIC = 0; */
+GROUP(libgcc.a)
+SECTIONS
+{
+ /* Read-only sections, merged into text segment: */
+ . = + SIZEOF_HEADERS;
+ .interp : { *(.interp) }
+ .hash : { *(.hash) }
+ .dynsym : { *(.dynsym) }
+ .dynstr : { *(.dynstr) }
+ .rel.text : { *(.rel.text) }
+ .rela.text : { *(.rela.text) }
+ .rel.data : { *(.rel.data) }
+ .rela.data : { *(.rela.data) }
+ .rel.rodata : { *(.rel.rodata) }
+ .rela.rodata : { *(.rela.rodata) }
+ .rel.got : { *(.rel.got) }
+ .rela.got : { *(.rela.got) }
+ .rel.ctors : { *(.rel.ctors) }
+ .rela.ctors : { *(.rela.ctors) }
+ .rel.dtors : { *(.rel.dtors) }
+ .rela.dtors : { *(.rela.dtors) }
+ .rel.bss : { *(.rel.bss) }
+ .rela.bss : { *(.rela.bss) }
+ .rel.plt : { *(.rel.plt) }
+ .rela.plt : { *(.rela.plt) }
+ .init : { *(.init) }
+ .plt : { *(.plt) }
+ .text :
+ {
+ /* WARNING - the following is hand-optimized to fit within */
+ /* the sector layout of our flash chips! XXX FIXME XXX */
+
+ cpu/mcf52x2/start.o (.text)
+ lib_m68k/traps.o (.text)
+ cpu/mcf52x2/interrupts.o (.text)
+ common/dlmalloc.o (.text)
+ lib_generic/zlib.o (.text)
+
+ . = DEFINED(env_offset) ? env_offset : .;
+ common/environment.o (.ppcenv)
+
+ *(.text)
+ *(.fixup)
+ *(.got1)
+ }
+ _etext = .;
+ PROVIDE (etext = .);
+ .rodata :
+ {
+ *(.rodata)
+ *(.rodata1)
+ }
+ .fini : { *(.fini) } =0
+ .ctors : { *(.ctors) }
+ .dtors : { *(.dtors) }
+
+ /* Read-write section, merged into data segment: */
+ . = (. + 0x00FF) & 0xFFFFFF00;
+ _erotext = .;
+ PROVIDE (erotext = .);
+
+ .reloc :
+ {
+ __got_start = .;
+ *(.got)
+ __got_end = .;
+ _GOT2_TABLE_ = .;
+ *(.got2)
+ _FIXUP_TABLE_ = .;
+ *(.fixup)
+ }
+ __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
+ __fixup_entries = (. - _FIXUP_TABLE_)>>2;
+
+ .data :
+ {
+ *(.data)
+ *(.data1)
+ *(.sdata)
+ *(.sdata2)
+ *(.dynamic)
+ CONSTRUCTORS
+ }
+ _edata = .;
+ PROVIDE (edata = .);
+
+ . = .;
+ __u_boot_cmd_start = .;
+ .u_boot_cmd : { *(.u_boot_cmd) }
+ __u_boot_cmd_end = .;
+
+
+ . = .;
+ __start___ex_table = .;
+ __ex_table : { *(__ex_table) }
+ __stop___ex_table = .;
+
+ . = ALIGN(256);
+ __init_begin = .;
+ .text.init : { *(.text.init) }
+ .data.init : { *(.data.init) }
+ . = ALIGN(256);
+ __init_end = .;
+
+ __bss_start = .;
+ .bss :
+ {
+ _sbss = .;
+ *(.sbss) *(.scommon)
+ *(.dynbss)
+ *(.bss)
+ *(COMMON)
+ . = ALIGN(4);
+ _ebss = .;
+ }
+ _end = . ;
+ PROVIDE (end = .);
+}
diff --git a/board/m5272c3/flash.c b/board/m5272c3/flash.c
index f156342..ea0b1fd 100644
--- a/board/m5272c3/flash.c
+++ b/board/m5272c3/flash.c
@@ -65,6 +65,7 @@ void flash_print_info (flash_info_t * info)
printf ("\n");
Done:
+ return;
}
diff --git a/board/m5282evb/flash.c b/board/m5282evb/flash.c
index 95f35ad..36a7c31 100644
--- a/board/m5282evb/flash.c
+++ b/board/m5282evb/flash.c
@@ -65,6 +65,7 @@ void flash_print_info (flash_info_t * info)
printf ("\n");
Done:
+ return;
}
diff --git a/board/r5200/Makefile b/board/r5200/Makefile
new file mode 100644
index 0000000..d0364ed
--- /dev/null
+++ b/board/r5200/Makefile
@@ -0,0 +1,40 @@
+#
+# (C) Copyright 2000-2003
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB = lib$(BOARD).a
+
+OBJS = $(BOARD).o
+
+$(LIB): .depend $(OBJS)
+ $(AR) crv $@ $(OBJS)
+
+#########################################################################
+
+.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
+ $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
+
+sinclude .depend
+
+#########################################################################
diff --git a/board/r5200/config.mk b/board/r5200/config.mk
new file mode 100644
index 0000000..8fc5319
--- /dev/null
+++ b/board/r5200/config.mk
@@ -0,0 +1,25 @@
+#
+# (C) Copyright 2000-2003
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+# Coldfire contribution by Bernhard Kuhn <bkuhn@metrowerks.com>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+TEXT_BASE = 0x10000000
diff --git a/board/r5200/r5200.c b/board/r5200/r5200.c
new file mode 100644
index 0000000..e51ad25
--- /dev/null
+++ b/board/r5200/r5200.c
@@ -0,0 +1,125 @@
+/*
+ * (C) Copyright 2000-2003
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/m5271.h>
+#include <asm/immap_5271.h>
+
+
+int checkboard (void) {
+ puts ("Board: R5200 Ethernet Module\n");
+ return 0;
+};
+
+long int initdram (int board_type) {
+ int i;
+
+ /*
+ * Set CS2 pin to be SD_CS0
+ */
+ mbar_writeByte(MCF_GPIO_PAR_CS, mbar_readByte(MCF_GPIO_PAR_CS)
+ | MCF_GPIO_PAR_CS_PAR_CS2);
+
+ mbar_writeByte(MCF_GPIO_PAR_SDRAM, mbar_readByte(MCF_GPIO_PAR_SDRAM)
+ | MCF_GPIO_PAR_SDRAM_PAR_CSSDCS(0x01));
+
+ /*
+ * Check to see if the SDRAM has already been initialized
+ * by a run control tool
+ */
+ if (!(mbar_readLong(MCF_SDRAMC_DACR0) & MCF_SDRAMC_DACRn_RE))
+ {
+ /*
+ * Initialize DRAM Control Register: DCR
+ */
+ mbar_writeShort(MCF_SDRAMC_DCR, MCF_SDRAMC_DCR_RTIM(0x01)
+ | MCF_SDRAMC_DCR_RC(0x30));
+
+ /*
+ * Initialize DACR0
+ */
+ mbar_writeLong(MCF_SDRAMC_DACR0,
+ MCF_SDRAMC_DACRn_BA(CFG_SDRAM_BASE>>18)
+ | MCF_SDRAMC_DACRn_CASL(0)
+ | MCF_SDRAMC_DACRn_CBM(3)
+ | MCF_SDRAMC_DACRn_PS(2));
+
+ /*
+ * Initialize DMR0
+ */
+ mbar_writeLong(MCF_SDRAMC_DMR0,
+ MCF_SDRAMC_DMRn_BAM_8M
+ | MCF_SDRAMC_DMRn_V);
+
+ /*
+ * Set IP bit in DACR
+ */
+ mbar_writeLong(MCF_SDRAMC_DACR0, mbar_readLong(MCF_SDRAMC_DACR0)
+ | MCF_SDRAMC_DACRn_IP);
+
+ /*
+ * Wait at least 20ns to allow banks to precharge
+ */
+ for (i = 0; i < 5; i++)
+ asm(" nop");
+
+ /*
+ * Write to this block to initiate precharge
+ */
+ *(u16 *)(CFG_SDRAM_BASE) = 0x9696;
+
+ /*
+ * Set RE bit in DACR
+ */
+ mbar_writeLong(MCF_SDRAMC_DACR0, mbar_readLong(MCF_SDRAMC_DACR0)
+ | MCF_SDRAMC_DACRn_RE);
+
+
+ /*
+ * Wait for at least 8 auto refresh cycles to occur
+ */
+ for (i = 0; i < 2000; i++)
+ asm(" nop");
+
+ /*
+ * Finish the configuration by issuing the MRS.
+ */
+ mbar_writeLong(MCF_SDRAMC_DACR0, mbar_readLong(MCF_SDRAMC_DACR0)
+ | MCF_SDRAMC_DACRn_MRS);
+
+
+ /*
+ * Write to the SDRAM Mode Register
+ */
+ *(u16 *)(CFG_SDRAM_BASE + 0x1000) = 0x9696;
+ }
+
+ return CFG_SDRAM_SIZE * 1024 * 1024;
+};
+
+int testdram (void) {
+ /* TODO: XXX XXX XXX */
+ printf ("DRAM test not implemented!\n");
+
+ return (0);
+}
diff --git a/board/r5200/u-boot.lds b/board/r5200/u-boot.lds
new file mode 100644
index 0000000..f7dc070
--- /dev/null
+++ b/board/r5200/u-boot.lds
@@ -0,0 +1,144 @@
+/*
+ * (C) Copyright 2000
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_ARCH(m68k)
+SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib);
+/* Do we need any of these for elf?
+ __DYNAMIC = 0; */
+SECTIONS
+{
+ /* Read-only sections, merged into text segment: */
+ . = + SIZEOF_HEADERS;
+ .interp : { *(.interp) }
+ .hash : { *(.hash) }
+ .dynsym : { *(.dynsym) }
+ .dynstr : { *(.dynstr) }
+ .rel.text : { *(.rel.text) }
+ .rela.text : { *(.rela.text) }
+ .rel.data : { *(.rel.data) }
+ .rela.data : { *(.rela.data) }
+ .rel.rodata : { *(.rel.rodata) }
+ .rela.rodata : { *(.rela.rodata) }
+ .rel.got : { *(.rel.got) }
+ .rela.got : { *(.rela.got) }
+ .rel.ctors : { *(.rel.ctors) }
+ .rela.ctors : { *(.rela.ctors) }
+ .rel.dtors : { *(.rel.dtors) }
+ .rela.dtors : { *(.rela.dtors) }
+ .rel.bss : { *(.rel.bss) }
+ .rela.bss : { *(.rela.bss) }
+ .rel.plt : { *(.rel.plt) }
+ .rela.plt : { *(.rela.plt) }
+ .init : { *(.init) }
+ .plt : { *(.plt) }
+ .text :
+ {
+ /* WARNING - the following is hand-optimized to fit within */
+ /* the sector layout of our flash chips! XXX FIXME XXX */
+
+ cpu/mcf52x2/start.o (.text)
+ lib_m68k/traps.o (.text)
+ cpu/mcf52x2/interrupts.o (.text)
+ common/dlmalloc.o (.text)
+ lib_generic/zlib.o (.text)
+
+ . = DEFINED(env_offset) ? env_offset : .;
+ common/environment.o (.text)
+
+ *(.text)
+ *(.fixup)
+ *(.got1)
+ }
+ _etext = .;
+ PROVIDE (etext = .);
+ .rodata :
+ {
+ *(.rodata)
+ *(.rodata1)
+ }
+ .fini : { *(.fini) } =0
+ .ctors : { *(.ctors) }
+ .dtors : { *(.dtors) }
+
+ /* Read-write section, merged into data segment: */
+ . = (. + 0x00FF) & 0xFFFFFF00;
+ _erotext = .;
+ PROVIDE (erotext = .);
+
+ .reloc :
+ {
+ __got_start = .;
+ *(.got)
+ __got_end = .;
+ _GOT2_TABLE_ = .;
+ *(.got2)
+ _FIXUP_TABLE_ = .;
+ *(.fixup)
+ }
+ __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
+ __fixup_entries = (. - _FIXUP_TABLE_)>>2;
+
+ .data :
+ {
+ *(.data)
+ *(.data1)
+ *(.sdata)
+ *(.sdata2)
+ *(.dynamic)
+ CONSTRUCTORS
+ }
+ _edata = .;
+ PROVIDE (edata = .);
+
+ . = .;
+ __u_boot_cmd_start = .;
+ .u_boot_cmd : { *(.u_boot_cmd) }
+ __u_boot_cmd_end = .;
+
+
+ . = .;
+ __start___ex_table = .;
+ __ex_table : { *(__ex_table) }
+ __stop___ex_table = .;
+
+ . = ALIGN(256);
+ __init_begin = .;
+ .text.init : { *(.text.init) }
+ .data.init : { *(.data.init) }
+ . = ALIGN(256);
+ __init_end = .;
+
+ __bss_start = .;
+ .bss :
+ {
+ _sbss = .;
+ *(.sbss) *(.scommon)
+ *(.dynbss)
+ *(.bss)
+ *(COMMON)
+ . = ALIGN(4);
+ _ebss = .;
+ }
+ _end = . ;
+ PROVIDE (end = .);
+}
diff --git a/common/environment.c b/common/environment.c
index c7f54c6..81471ce 100644
--- a/common/environment.c
+++ b/common/environment.c
@@ -59,7 +59,8 @@
defined(CONFIG_TQM8xxL) || \
defined(CONFIG_RRVISION) || \
defined(CONFIG_TRAB) || \
- defined(CONFIG_PPCHAMELEONEVB) ) && \
+ defined(CONFIG_PPCHAMELEONEVB) || \
+ defined(CONFIG_M5271EVB)) && \
defined(ENV_CRC) /* Environment embedded in U-Boot .ppcenv section */
/* XXX - This only works with GNU C */
# define __PPCENV__ __attribute__ ((section(".ppcenv")))
diff --git a/config.mk b/config.mk
index dfbb1b7..b1e1d8f 100644
--- a/config.mk
+++ b/config.mk
@@ -143,7 +143,14 @@ CFLAGS := $(CPPFLAGS) -Wall -Wno-trigraphs
endif
endif
+# turn jbsr into jsr for m68k
+ifeq ($(ARCH),m68k)
+ifeq ($(findstring 3.4,$(shell $(CC) --version)),3.4)
+AFLAGS_DEBUG := -Wa,-gstabs,-S
+endif
+else
AFLAGS_DEBUG := -Wa,-gstabs
+endif
AFLAGS := $(AFLAGS_DEBUG) -D__ASSEMBLY__ $(CPPFLAGS)
LDFLAGS += -Bstatic -T $(LDSCRIPT) -Ttext $(TEXT_BASE) $(PLATFORM_LDFLAGS)
diff --git a/cpu/mcf52x2/cpu.c b/cpu/mcf52x2/cpu.c
index 32a524f..e6e5d9b 100644
--- a/cpu/mcf52x2/cpu.c
+++ b/cpu/mcf52x2/cpu.c
@@ -25,6 +25,11 @@
#include <watchdog.h>
#include <command.h>
+#ifdef CONFIG_M5271
+#include <asm/immap_5271.h>
+#include <asm/m5271.h>
+#endif
+
#ifdef CONFIG_M5272
#include <asm/immap_5272.h>
#include <asm/m5272.h>
@@ -38,6 +43,42 @@
#include <asm/m5249.h>
#endif
+#ifdef CONFIG_M5271
+int checkcpu (void)
+{
+ char buf[32];
+
+ printf ("CPU: Freescale Coldfire MCF5271 at %s MHz\n", strmhz(buf, CFG_CLK));
+ return 0;
+}
+
+int do_reset (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[]) {
+ mbar_writeByte(MCF_RCM_RCR,
+ MCF_RCM_RCR_SOFTRST | MCF_RCM_RCR_FRCRSTOUT);
+ return 0;
+};
+
+#if defined(CONFIG_WATCHDOG)
+void watchdog_reset (void)
+{
+ mbar_writeShort(MCF_WTM_WSR, 0x5555);
+ mbar_writeShort(MCF_WTM_WSR, 0xAAAA);
+}
+
+int watchdog_disable (void)
+{
+ mbar_writeShort(MCF_WTM_WCR, 0);
+ return (0);
+}
+
+int watchdog_init (void)
+{
+ mbar_writeShort(MCF_WTM_WCR, MCF_WTM_WCR_EN);
+ return (0);
+}
+#endif /* #ifdef CONFIG_WATCHDOG */
+
+#endif
#ifdef CONFIG_M5272
int do_reset (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[]) {
@@ -66,12 +107,12 @@ int checkcpu(void) {
case 0x4: suf = "3K75N"; break;
default:
suf = NULL;
- printf ("MOTOROLA MCF5272 (Mask:%01x)\n", msk);
+ printf ("Freescale MCF5272 (Mask:%01x)\n", msk);
break;
}
if (suf)
- printf ("MOTOROLA MCF5272 %s\n", suf);
+ printf ("Freescale MCF5272 %s\n", suf);
return 0;
};
@@ -117,7 +158,7 @@ int watchdog_init (void)
#ifdef CONFIG_M5282
int checkcpu (void)
{
- puts ("CPU: MOTOROLA Coldfire MCF5282\n");
+ puts ("CPU: Freescale Coldfire MCF5282\n");
return 0;
}
@@ -131,7 +172,7 @@ int checkcpu (void)
{
char buf[32];
- printf ("CPU: MOTOROLA Coldfire MCF5249 at %s MHz\n", strmhz(buf, CFG_CLK));
+ printf ("CPU: Freescale Coldfire MCF5249 at %s MHz\n", strmhz(buf, CFG_CLK));
return 0;
}
diff --git a/cpu/mcf52x2/cpu_init.c b/cpu/mcf52x2/cpu_init.c
index 350c431..d33adc2 100644
--- a/cpu/mcf52x2/cpu_init.c
+++ b/cpu/mcf52x2/cpu_init.c
@@ -24,6 +24,11 @@
#include <common.h>
#include <watchdog.h>
+#ifdef CONFIG_M5271
+#include <asm/m5271.h>
+#include <asm/immap_5271.h>
+#endif
+
#ifdef CONFIG_M5272
#include <asm/m5272.h>
#include <asm/immap_5272.h>
@@ -38,6 +43,38 @@
#include <asm/m5249.h>
#endif
+#if defined(CONFIG_M5271)
+void cpu_init_f (void)
+{
+#ifndef CONFIG_WATCHDOG
+ /* Disable the watchdog if we aren't using it */
+ mbar_writeShort(MCF_WTM_WCR, 0);
+#endif
+
+ /* Set clockspeed to 100MHz */
+ mbar_writeShort(MCF_FMPLL_SYNCR,
+ MCF_FMPLL_SYNCR_MFD(0) | MCF_FMPLL_SYNCR_RFD(0));
+ while (!mbar_readByte(MCF_FMPLL_SYNSR) & MCF_FMPLL_SYNSR_LOCK);
+
+ /* Enable UART pins */
+ mbar_writeShort(MCF_GPIO_PAR_UART, MCF_GPIO_PAR_UART_U0TXD |
+ MCF_GPIO_PAR_UART_U0RXD |
+ MCF_GPIO_PAR_UART_U1RXD_UART1 |
+ MCF_GPIO_PAR_UART_U1TXD_UART1);
+
+ /* Enable Ethernet pins */
+ mbar_writeByte(MCF_GPIO_PAR_FECI2C, CFG_FECI2C);
+}
+
+/*
+ * initialize higher level parts of CPU like timers
+ */
+int cpu_init_r (void)
+{
+ return (0);
+}
+#endif
+
#if defined(CONFIG_M5272)
/*
* Breath some life into the CPU...
diff --git a/cpu/mcf52x2/fec.c b/cpu/mcf52x2/fec.c
index a5c50af..f207dd6 100644
--- a/cpu/mcf52x2/fec.c
+++ b/cpu/mcf52x2/fec.c
@@ -25,6 +25,11 @@
#include <malloc.h>
#include <asm/fec.h>
+#ifdef CONFIG_M5271
+#include <asm/m5271.h>
+#include <asm/immap_5271.h>
+#endif
+
#ifdef CONFIG_M5272
#include <asm/m5272.h>
#include <asm/immap_5272.h>
@@ -41,7 +46,7 @@
#ifdef CONFIG_M5272
#define FEC_ADDR (CFG_MBAR + 0x840)
#endif
-#ifdef CONFIG_M5282
+#if defined(CONFIG_M5282) || defined(CONFIG_M5271)
#define FEC_ADDR (CFG_MBAR + 0x1000)
#endif
@@ -240,10 +245,22 @@ int eth_init (bd_t * bd)
#endif
#undef ea
+#ifdef CONFIG_M5271
+ /* Clear multicast address hash table
+ */
+ fecp->fec_ghash_table_high = 0;
+ fecp->fec_ghash_table_low = 0;
+
+ /* Clear individual address hash table
+ */
+ fecp->fec_ihash_table_high = 0;
+ fecp->fec_ihash_table_low = 0;
+#else
/* Clear multicast address hash table
*/
fecp->fec_hash_table_high = 0;
fecp->fec_hash_table_low = 0;
+#endif
/* Set maximum receive buffer size.
*/
@@ -295,6 +312,9 @@ int eth_init (bd_t * bd)
fecp->fec_x_cntrl = FEC_TCNTRL_FDEN;
#else /* Half duplex mode */
fecp->fec_r_cntrl = FEC_RCNTRL_MII_MODE | FEC_RCNTRL_DRT;
+#ifdef CONFIG_M5271
+ fecp->fec_r_cntrl |= (PKT_MAXBUF_SIZE << 16); /* set max frame length */
+#endif
fecp->fec_x_cntrl = 0;
#endif
/* Set MII speed */
diff --git a/cpu/mcf52x2/interrupts.c b/cpu/mcf52x2/interrupts.c
index 868df39..116747a 100644
--- a/cpu/mcf52x2/interrupts.c
+++ b/cpu/mcf52x2/interrupts.c
@@ -27,6 +27,11 @@
#include <watchdog.h>
#include <asm/processor.h>
+#ifdef CONFIG_M5271
+#include <asm/m5271.h>
+#include <asm/immap_5271.h>
+#endif
+
#ifdef CONFIG_M5272
#include <asm/m5272.h>
#include <asm/immap_5272.h>
@@ -171,7 +176,7 @@ int interrupt_init (void)
}
#endif
-#ifdef CONFIG_M5282
+#if defined(CONFIG_M5282) || defined(CONFIG_M5271)
int interrupt_init (void)
{
return 0;
diff --git a/cpu/mcf52x2/serial.c b/cpu/mcf52x2/serial.c
index 79628d0..1cde1b6 100644
--- a/cpu/mcf52x2/serial.c
+++ b/cpu/mcf52x2/serial.c
@@ -26,6 +26,10 @@
#include <asm/mcfuart.h>
+#ifdef CONFIG_M5271
+#include <asm/m5271.h>
+#endif
+
#ifdef CONFIG_M5272
#include <asm/m5272.h>
#endif
@@ -40,7 +44,7 @@
DECLARE_GLOBAL_DATA_PTR;
-#ifdef CONFIG_M5249
+#if defined(CONFIG_M5249) || defined(CONFIG_M5271)
#define DoubleClock(a) ((double)(CFG_CLK/2) / 32.0 / (double)(a))
#else
#define DoubleClock(a) ((double)(CFG_CLK) / 32.0 / (double)(a))
@@ -48,9 +52,12 @@ DECLARE_GLOBAL_DATA_PTR;
void rs_serial_setbaudrate(int port,int baudrate)
{
-#if defined(CONFIG_M5272) || defined(CONFIG_M5249)
+#if defined(CONFIG_M5272) || defined(CONFIG_M5249) || defined(CONFIG_M5271)
volatile unsigned char *uartp;
- double clock, fraction;
+#ifndef CONFIG_M5271
+ double fraction;
+#endif
+ double clock;
if (port == 0)
uartp = (volatile unsigned char *) (CFG_MBAR + MCFUART_BASE1);
@@ -59,12 +66,14 @@ void rs_serial_setbaudrate(int port,int baudrate)
clock = DoubleClock(baudrate); /* Set baud above */
- fraction = ((clock - (int)clock) * 16.0) + 0.5;
-
uartp[MCFUART_UBG1] = (((int)clock >> 8) & 0xff); /* set msb baud */
uartp[MCFUART_UBG2] = ((int)clock & 0xff); /* set lsb baud */
+
+#ifndef CONFIG_M5271
+ fraction = ((clock - (int)clock) * 16.0) + 0.5;
uartp[MCFUART_UFPD] = ((int)fraction & 0xf); /* set baud fraction adjust */
#endif
+#endif
};
void rs_serial_init(int port,int baudrate)
@@ -79,8 +88,9 @@ void rs_serial_init(int port,int baudrate)
else
uartp = (volatile unsigned char *) (CFG_MBAR + MCFUART_BASE2);
- uartp[MCFUART_UCR] = MCFUART_UCR_CMDRESETRX; /* reset RX */
uartp[MCFUART_UCR] = MCFUART_UCR_CMDRESETTX; /* reset TX */
+ uartp[MCFUART_UCR] = MCFUART_UCR_CMDRESETRX; /* reset RX */
+
uartp[MCFUART_UCR] = MCFUART_UCR_CMDRESETMRPTR; /* reset MR pointer */
uartp[MCFUART_UCR] = MCFUART_UCR_CMDRESETERR; /* reset Error pointer */
@@ -90,9 +100,15 @@ void rs_serial_init(int port,int baudrate)
uartp[MCFUART_UMR] = MCFUART_MR1_PARITYNONE | MCFUART_MR1_CS8;
uartp[MCFUART_UMR] = MCFUART_MR2_STOP1;
- rs_serial_setbaudrate(port,baudrate);
+ /* Mask UART interrupts */
+ uartp[MCFUART_UIMR] = 0;
+ /* Set clock Select Register: Tx/Rx clock is timer */
uartp[MCFUART_UCSR] = MCFUART_UCSR_RXCLKTIMER | MCFUART_UCSR_TXCLKTIMER;
+
+ rs_serial_setbaudrate(port,baudrate);
+
+ /* Enable Tx/Rx */
uartp[MCFUART_UCR] = MCFUART_UCR_RXENABLE | MCFUART_UCR_TXENABLE;
return;
diff --git a/cpu/mcf52x2/start.S b/cpu/mcf52x2/start.S
index b4926e2..3ab812b 100644
--- a/cpu/mcf52x2/start.S
+++ b/cpu/mcf52x2/start.S
@@ -55,7 +55,11 @@
*/
_vectors:
+#ifndef CONFIG_R5200
.long 0x00000000, _START
+#else
+.long 0x00000000, 0x400 /* Flash offset is 0 until we setup CS0 */
+#endif
.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
@@ -124,26 +128,42 @@ _start:
movec %d0, %RAMBAR0
#endif /* #if defined(CONFIG_M5272) || defined(CONFIG_M5249) */
-#ifdef CONFIG_M5282
+#if defined(CONFIG_M5282) || defined(CONFIG_M5271)
/* Initialize IPSBAR */
move.l #(CFG_MBAR + 1), %d0 /* set IPSBAR address + valid flag */
move.l %d0, 0x40000000
+#ifdef CONFIG_M5282
/* Initialize FLASHBAR: locate internal Flash and validate it */
move.l #(CFG_INT_FLASH_BASE + 0x21), %d0
movec %d0, %RAMBAR0
+#endif
/* Initialize RAMBAR1: locate SRAM and validate it */
move.l #(CFG_INIT_RAM_ADDR + 0x21), %d0
movec %d0, %RAMBAR1
#endif
+#ifdef CONFIG_R5200
+ move.l #(_flash_setup-CFG_FLASH_BASE), %a0
+ move.l #(_flash_setup_end-CFG_FLASH_BASE), %a1
+ move.l #(CFG_INIT_RAM_ADDR), %a2
+_copy_flash:
+ move.l (%a0)+, (%a2)+
+ cmp.l %a0, %a1
+ bgt.s _copy_flash
+ jmp CFG_INIT_RAM_ADDR
+_after_flash_copy:
+#endif
+
+#if 0
/* invalidate and disable cache */
move.l #0x01000000, %d0 /* Invalidate cache cmd */
movec %d0, %CACR /* Invalidate cache */
move.l #0, %d0
movec %d0, %ACR0
movec %d0, %ACR1
+#endif
/* set stackpointer to end of internal ram to get some stackspace for the first c-code */
move.l #(CFG_INIT_RAM_ADDR + CFG_INIT_SP_OFFSET), %sp
@@ -154,10 +174,28 @@ _start:
bsr cpu_init_f /* run low-level CPU init code (from flash) */
bsr board_init_f /* run low-level board init code (from flash) */
- /* board_init_f() does not return
+ /* board_init_f() does not return */
/*------------------------------------------------------------------------------*/
+#ifdef CONFIG_R5200
+_flash_setup:
+ /* CSAR0 */
+ move.l #((CFG_FLASH_BASE & 0xffff0000) >> 16), %d0
+ move.w %d0, 0x40000080
+
+ /* CSCR0 */
+ move.l #0x2180, %d0 /* 8 wait states, 16bit port, auto ack, */
+ move.w %d0, 0x4000008A
+
+ /* CSMR0 */
+ move.l #0x001f0001, %d0 /* 2 MB, valid */
+ move.l %d0, 0x40000084
+
+ jmp _after_flash_copy.L
+_flash_setup_end:
+#endif
+
/*
* void relocate_code (addr_sp, gd, addr_moni)
*
diff --git a/examples/Makefile b/examples/Makefile
index fee2674..b198048 100644
--- a/examples/Makefile
+++ b/examples/Makefile
@@ -122,7 +122,7 @@ clibdir := $(shell dirname `$(CC) $(CFLAGS) -print-file-name=libc.a`)
CPPFLAGS += -I..
-all: .depend $(OBJS) $(LIB) $(SREC) $(BIN)
+all: .depend $(OBJS) $(LIB) #$(SREC) $(BIN)
#########################################################################
$(LIB): .depend $(LIBOBJS)
diff --git a/include/asm-m68k/immap_5271.h b/include/asm-m68k/immap_5271.h
new file mode 100644
index 0000000..424dc1d
--- /dev/null
+++ b/include/asm-m68k/immap_5271.h
@@ -0,0 +1,98 @@
+/*
+ * MCF5272 Internal Memory Map
+ *
+ * Copyright (c) 2003 Josef Baumgartner <josef.baumgartner@telex.de>
+ * 2006 Zachary P. Landau <zachary.landau@labxtechnologies.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __IMMAP_5271__
+#define __IMMAP_5271__
+
+/* Interrupt module registers
+*/
+typedef struct int_ctrl {
+ uint int_icr1;
+ uint int_icr2;
+ uint int_icr3;
+ uint int_icr4;
+ uint int_isr;
+ uint int_pitr;
+ uint int_piwr;
+ uchar res1[3];
+ uchar int_pivr;
+} intctrl_t;
+
+/* Timer module registers
+ */
+typedef struct timer_ctrl {
+ ushort timer_tmr;
+ ushort res1;
+ ushort timer_trr;
+ ushort res2;
+ ushort timer_tcap;
+ ushort res3;
+ ushort timer_tcn;
+ ushort res4;
+ ushort timer_ter;
+ uchar res5[14];
+} timer_t;
+
+ /* Fast ethernet controller registers
+ */
+typedef struct fec {
+ uint res1;
+ uint fec_ievent;
+ uint fec_imask;
+ uint res2;
+ uint fec_r_des_active;
+ uint fec_x_des_active;
+ uint res3[3];
+ uint fec_ecntrl;
+ uint res4[6];
+ uint fec_mii_data;
+ uint fec_mii_speed;
+ uint res5[7];
+ uint fec_mibc;
+ uint res6[7];
+ uint fec_r_cntrl;
+ uint res7[15];
+ uint fec_x_cntrl;
+ uint res8[7];
+ uint fec_addr_low;
+ uint fec_addr_high;
+ uint fec_opd;
+ uint res9[10];
+ uint fec_ihash_table_high;
+ uint fec_ihash_table_low;
+ uint fec_ghash_table_high;
+ uint fec_ghash_table_low;
+ uint res10[7];
+ uint fec_tfwr;
+ uint res11;
+ uint fec_r_bound;
+ uint fec_r_fstart;
+ uint res12[11];
+ uint fec_r_des_start;
+ uint fec_x_des_start;
+ uint fec_r_buff_size;
+} fec_t;
+
+#endif /* __IMMAP_5271__ */
diff --git a/include/asm-m68k/m5271.h b/include/asm-m68k/m5271.h
new file mode 100644
index 0000000..765414f
--- /dev/null
+++ b/include/asm-m68k/m5271.h
@@ -0,0 +1,114 @@
+/*
+ * mcf5271.h -- Definitions for Motorola Coldfire 5271
+ *
+ * (C) Copyright 2006, Lab X Technologies <zachary.landau@labxtechnologies.com>
+ * Based on mcf5272sim.h of uCLinux distribution:
+ * (C) Copyright 1999, Greg Ungerer (gerg@snapgear.com)
+ * (C) Copyright 2000, Lineo Inc. (www.lineo.com)
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+
+#ifndef _MCF5271_H_
+#define _MCF5271_H_
+
+#define mbar_readLong(x) *((volatile unsigned long *) (CFG_MBAR + x))
+#define mbar_readShort(x) *((volatile unsigned short *) (CFG_MBAR + x))
+#define mbar_readByte(x) *((volatile unsigned char *) (CFG_MBAR + x))
+#define mbar_writeLong(x,y) *((volatile unsigned long *) (CFG_MBAR + x)) = y
+#define mbar_writeShort(x,y) *((volatile unsigned short *) (CFG_MBAR + x)) = y
+#define mbar_writeByte(x,y) *((volatile unsigned char *) (CFG_MBAR + x)) = y
+
+#define MCF_FMPLL_SYNCR 0x120000
+#define MCF_FMPLL_SYNSR 0x120004
+#define MCF_FMPLL_SYNCR_MFD(x) ((x&0x7)<<24)
+#define MCF_FMPLL_SYNCR_RFD(x) ((x&0x7)<<19)
+#define MCF_FMPLL_SYNSR_LOCK 0x8
+
+#define MCF_WTM_WCR 0x140000
+#define MCF_WTM_WCNTR 0x140004
+#define MCF_WTM_WSR 0x140006
+#define MCF_WTM_WCR_EN 0x0001
+
+#define MCF_RCM_RCR 0x110000
+#define MCF_RCM_RCR_FRCRSTOUT 0x40
+#define MCF_RCM_RCR_SOFTRST 0x80
+
+#define MCF_GPIO_PAR_AD 0x100040
+#define MCF_GPIO_PAR_CS 0x100045
+#define MCF_GPIO_PAR_SDRAM 0x100046
+#define MCF_GPIO_PAR_FECI2C 0x100047
+#define MCF_GPIO_PAR_UART 0x100048
+
+#define MCF_GPIO_AD_ADDR23 0x80
+#define MCF_GPIO_AD_ADDR22 0x40
+#define MCF_GPIO_AD_ADDR21 0x20
+#define MCF_GPIO_AD_DATAL 0x01
+#define MCF_GPIO_AD_MASK 0xe1
+
+#define MCF_GPIO_PAR_CS_PAR_CS2 0x04
+
+#define MCF_GPIO_SDRAM_CSSDCS_00 0x00 /* CS[3:2] pins: CS3, CS2 */
+#define MCF_GPIO_SDRAM_CSSDCS_01 0x40 /* CS[3:2] pins: CS3, SD_CS0 */
+#define MCF_GPIO_SDRAM_CSSDCS_10 0x80 /* CS[3:2] pins: SD_CS1, SC2 */
+#define MCF_GPIO_SDRAM_CSSDCS_11 0xc0 /* CS[3:2] pins: SD_CS1, SD_CS0 */
+#define MCF_GPIO_SDRAM_SDWE 0x20 /* WE pin */
+#define MCF_GPIO_SDRAM_SCAS 0x10 /* CAS pin */
+#define MCF_GPIO_SDRAM_SRAS 0x08 /* RAS pin */
+#define MCF_GPIO_SDRAM_SCKE 0x04 /* CKE pin */
+#define MCF_GPIO_SDRAM_SDCS_00 0x00 /* SD_CS[0:1] pins: GPIO, GPIO */
+#define MCF_GPIO_SDRAM_SDCS_01 0x01 /* SD_CS[0:1] pins: GPIO, SD_CS0 */
+#define MCF_GPIO_SDRAM_SDCS_10 0x02 /* SD_CS[0:1] pins: SD_CS1, GPIO */
+#define MCF_GPIO_SDRAM_SDCS_11 0x03 /* SD_CS[0:1] pins: SD_CS1, SD_CS0 */
+
+#define MCF_GPIO_PAR_UART_U0RTS 0x0001
+#define MCF_GPIO_PAR_UART_U0CTS 0x0002
+#define MCF_GPIO_PAR_UART_U0TXD 0x0004
+#define MCF_GPIO_PAR_UART_U0RXD 0x0008
+#define MCF_GPIO_PAR_UART_U1RXD_UART1 0x0C00
+#define MCF_GPIO_PAR_UART_U1TXD_UART1 0x0300
+
+#define MCF_GPIO_PAR_SDRAM_PAR_CSSDCS(x) (((x)&0x03)<<6)
+
+#define MCF_SDRAMC_DCR 0x000040
+#define MCF_SDRAMC_DACR0 0x000048
+#define MCF_SDRAMC_DMR0 0x00004C
+
+#define MCF_SDRAMC_DCR_RC(x) (((x)&0x01FF)<<0)
+#define MCF_SDRAMC_DCR_RTIM(x) (((x)&0x0003)<<9)
+#define MCF_SDRAMC_DCR_IS 0x0800
+#define MCF_SDRAMC_DCR_COC 0x1000
+#define MCF_SDRAMC_DCR_NAM 0x2000
+
+#define MCF_SDRAMC_DACRn_IP 0x00000008
+#define MCF_SDRAMC_DACRn_PS(x) (((x)&0x00000003)<<4)
+#define MCF_SDRAMC_DACRn_MRS 0x00000040
+#define MCF_SDRAMC_DACRn_CBM(x) (((x)&0x00000007)<<8)
+#define MCF_SDRAMC_DACRn_CASL(x) (((x)&0x00000003)<<12)
+#define MCF_SDRAMC_DACRn_RE 0x00008000
+#define MCF_SDRAMC_DACRn_BA(x) (((x)&0x00003FFF)<<18)
+
+#define MCF_SDRAMC_DMRn_BAM_8M 0x007C0000
+#define MCF_SDRAMC_DMRn_BAM_16M 0x00FC0000
+#define MCF_SDRAMC_DMRn_V 0x00000001
+
+#define MCFSIM_ICR1 0x000C41
+
+#endif /* _MCF5271_H_ */
diff --git a/include/asm-m68k/mcftimer.h b/include/asm-m68k/mcftimer.h
index 047950b..a73b80e 100644
--- a/include/asm-m68k/mcftimer.h
+++ b/include/asm-m68k/mcftimer.h
@@ -45,7 +45,7 @@
#elif defined(CONFIG_M5249) || defined(CONFIG_M5307) || defined(CONFIG_M5407)
#define MCFTIMER_BASE1 0x140 /* Base address of TIMER1 */
#define MCFTIMER_BASE2 0x180 /* Base address of TIMER2 */
-#elif defined(CONFIG_M5282)
+#elif defined(CONFIG_M5282) | defined(CONFIG_M5271)
#define MCFTIMER_BASE1 0x150000 /* Base address of TIMER1 */
#define MCFTIMER_BASE2 0x160000 /* Base address of TIMER2 */
#define MCFTIMER_BASE3 0x170000 /* Base address of TIMER4 */
diff --git a/include/asm-m68k/mcfuart.h b/include/asm-m68k/mcfuart.h
index e5082a9..7c0999d 100644
--- a/include/asm-m68k/mcfuart.h
+++ b/include/asm-m68k/mcfuart.h
@@ -46,7 +46,7 @@
#define MCFUART_BASE1 0x140 /* Base address of UART1 */
#define MCFUART_BASE2 0x180 /* Base address of UART2 */
#endif
-#elif defined(CONFIG_M5282)
+#elif defined(CONFIG_M5282) || defined(CONFIG_M5271)
#define MCFUART_BASE1 0x200 /* Base address of UART1 */
#define MCFUART_BASE2 0x240 /* Base address of UART2 */
#define MCFUART_BASE3 0x280 /* Base address of UART3 */
diff --git a/include/asm-m68k/ptrace.h b/include/asm-m68k/ptrace.h
index a6d3d74..75b2418 100644
--- a/include/asm-m68k/ptrace.h
+++ b/include/asm-m68k/ptrace.h
@@ -43,7 +43,7 @@ struct pt_regs {
ulong a4;
ulong a5;
ulong a6;
-#if defined(CONFIG_M5272) || defined(CONFIG_M5282) || defined(CONFIG_M5249)
+#if defined(CONFIG_M5272) || defined(CONFIG_M5282) || defined(CONFIG_M5249) || defined(CONFIG_M5271)
unsigned format : 4; /* frame format specifier */
unsigned vector : 12; /* vector offset */
unsigned short sr;
diff --git a/include/configs/M5271EVB.h b/include/configs/M5271EVB.h
new file mode 100644
index 0000000..3935f56
--- /dev/null
+++ b/include/configs/M5271EVB.h
@@ -0,0 +1,154 @@
+/*
+ * Configuation settings for the Freescale M5271EVB
+ *
+ * Based on MC5272C3 and r5200 board configs
+ * (C) Copyright 2006 Lab X Technologies <zachary.landau@labxtechnologies.com>
+ * (C) Copyright 2003 Josef Baumgartner <josef.baumgartner@telex.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * board/config.h - configuration options, board specific
+ */
+
+#ifndef _M5271EVB_H
+#define _M5271EVB_H
+
+#define DEBUG
+#undef DEBUG
+
+/*
+ * High Level Configuration Options (easy to change)
+ */
+#define CONFIG_MCF52x2 /* define processor family */
+#define CONFIG_M5271 /* define processor type */
+#define CONFIG_M5271EVB /* define board type */
+
+#define CONFIG_IPADDR 192.168.30.1
+#define CONFIG_SERVERIP 192.168.1.1
+#define CONFIG_ETHADDR 00:06:3b:01:41:55
+
+#define CONFIG_BAUDRATE 19200
+#define CFG_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 }
+
+#undef CONFIG_WATCHDOG /* disable watchdog */
+
+/* Configuration for environment
+ * Environment is embedded in u-boot in the second sector of the flash
+ */
+#ifndef CONFIG_MONITOR_IS_IN_RAM
+#define CFG_ENV_OFFSET 0x4000
+#define CFG_ENV_SECT_SIZE 0x2000
+#define CFG_ENV_IS_IN_FLASH 1
+#else
+#define CFG_ENV_ADDR 0xffe04000
+#define CFG_ENV_SECT_SIZE 0x2000
+#define CFG_ENV_IS_IN_FLASH 1
+#endif
+
+#define CONFIG_COMMANDS ((CONFIG_CMD_DFL | CFG_CMD_PING | CFG_CMD_NET ) & ~(CFG_CMD_LOADS | CFG_CMD_LOADB))
+
+/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
+#include <cmd_confdefs.h>
+
+#define CFG_PROMPT "=> "
+#define CFG_LONGHELP /* undef to save memory */
+
+#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
+#else
+#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
+#endif
+#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
+#define CFG_MAXARGS 16 /* max number of command args */
+#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
+
+#define CFG_LOAD_ADDR 0x00100000
+
+#define CFG_MEMTEST_START 0x400
+#define CFG_MEMTEST_END 0x380000
+
+#define CFG_HZ 1000000
+#define CFG_CLK 100000000
+
+/*
+ * Low Level Configuration Settings
+ * (address mappings, register initial values, etc.)
+ * You should know what you are doing if you make changes here.
+ */
+
+#define CFG_MBAR 0x40000000 /* Register Base Addrs */
+
+/* Enable FEC ethernet */
+#define FEC_ENET
+#define CONFIG_NET_RETRY_COUNT 5
+#define CFG_ENET_BD_BASE 0x480000
+
+/*
+ * Definitions for initial stack pointer and data area (in DPRAM)
+ */
+#define CFG_INIT_RAM_ADDR 0x20000000
+#define CFG_INIT_RAM_END 0x1000 /* End of used area in internal SRAM */
+#define CFG_GBL_DATA_SIZE 64 /* size in bytes reserved for initial data */
+#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
+#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
+
+/*
+ * Start addresses for the final memory configuration
+ * (Set up by the startup code)
+ * Please note that CFG_SDRAM_BASE _must_ start at 0
+ */
+#define CFG_SDRAM_BASE 0x00000000
+#define CFG_SDRAM_SIZE 16 /* SDRAM size in MB */
+#define CFG_FLASH_BASE 0xffe00000
+
+#ifdef CONFIG_MONITOR_IS_IN_RAM
+#define CFG_MONITOR_BASE 0x20000
+#else
+#define CFG_MONITOR_BASE (CFG_FLASH_BASE + 0x400)
+#endif
+
+#define CFG_MONITOR_LEN 0x40000
+#define CFG_MALLOC_LEN (256 << 10)
+#define CFG_BOOTPARAMS_LEN (64*1024)
+
+/*
+ * For booting Linux, the board info and command line data
+ * have to be in the first 8 MB of memory, since this is
+ * the maximum mapped by the Linux kernel during initialization ??
+ */
+#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
+
+/* FLASH organization */
+#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
+#define CFG_MAX_FLASH_SECT 11 /* max number of sectors on one chip */
+#define CFG_FLASH_ERASE_TOUT 1000
+
+#define CFG_FLASH_CFI 1
+#define CFG_FLASH_CFI_DRIVER 1
+#define CFG_FLASH_SIZE 0x200000
+
+/* Cache Configuration */
+#define CFG_CACHELINE_SIZE 16
+
+/* Port configuration */
+#define CFG_FECI2C 0xF0
+
+#endif /* _M5271EVB_H */
diff --git a/include/configs/r5200.h b/include/configs/r5200.h
new file mode 100644
index 0000000..7049704
--- /dev/null
+++ b/include/configs/r5200.h
@@ -0,0 +1,169 @@
+/*
+ * Configuation settings for the R5200 board
+ *
+ * (C) Copyright 2006 Lab X Technologies <zachary.landau@labxtechnologies.com>
+ * Based on Motorola MC5272C3 board config
+ * (C) Copyright 2003 Josef Baumgartner <josef.baumgartner@telex.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * board/config.h - configuration options, board specific
+ */
+
+#ifndef _R5200_H
+#define _R5200_H
+
+/*
+ * High Level Configuration Options
+ * (easy to change)
+ */
+#define CONFIG_MCF52x2 /* define processor family */
+#define CONFIG_M5271 /* define processor type */
+#define CONFIG_R5200 /* define board type */
+
+#define FEC_ENET
+#define CONFIG_NET_RETRY_COUNT 5
+
+#define CONFIG_IPADDR 192.168.0.172
+#define CONFIG_SERVERIP 192.168.0.148
+#define CONFIG_ETHADDR 00:06:3b:00:44:55
+
+#define CONFIG_BAUDRATE 19200
+#define CFG_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 }
+
+#define CONFIG_WATCHDOG
+#define CONFIG_WATCHDOG_TIMEOUT 0xFFFF /* clock modulus */
+
+/* Configuration for environment
+ * Environment is embedded in u-boot in the second sector of the flash
+ */
+#ifndef CONFIG_MONITOR_IS_IN_RAM
+#define CFG_ENV_OFFSET 0x20000
+#define CFG_ENV_SECT_SIZE 0x20000
+#define CFG_ENV_IS_IN_FLASH 1
+#define CFG_ENV_IS_EMBEDDED 1
+#else
+#define CFG_ENV_ADDR 0xf0020000
+#define CFG_ENV_SECT_SIZE 0x2000
+#define CFG_ENV_IS_IN_FLASH 1
+#endif
+
+#define CONFIG_COMMANDS ((CONFIG_CMD_DFL | CFG_CMD_PING | CFG_CMD_NET ) & ~(CFG_CMD_LOADS | CFG_CMD_LOADB))
+
+/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
+#include <cmd_confdefs.h>
+
+/* Note: We only copy one sectors worth of application code from location
+ * 10200000 for speed purposes. Increase the size if necessary */
+#define CONFIG_BOOTCOMMAND "cp.b 10200000 0 20000; go 400"
+#define CONFIG_BOOTDELAY 1
+
+#define CFG_PROMPT "u-boot> "
+#define CFG_LONGHELP /* undef to save memory */
+
+#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
+#else
+#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
+#endif
+#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
+#define CFG_MAXARGS 16 /* max number of command args */
+#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
+
+#define CFG_LOAD_ADDR 0x00002000
+
+#define CFG_MEMTEST_START 0x400
+#define CFG_MEMTEST_END 0x380000
+
+#define CFG_HZ 1000000
+#define CFG_CLK 100000000
+
+/*
+ * Low Level Configuration Settings
+ * (address mappings, register initial values, etc.)
+ * You should know what you are doing if you make changes here.
+ */
+
+#define CFG_MBAR 0x40000000 /* Register Base Addrs */
+
+#define CFG_ENET_BD_BASE 0x480000
+
+/*-----------------------------------------------------------------------
+ * Definitions for initial stack pointer and data area (in DPRAM)
+ */
+#define CFG_INIT_RAM_ADDR 0x20000000
+#define CFG_INIT_RAM_END 0x1000 /* End of used area in internal SRAM */
+#define CFG_GBL_DATA_SIZE 64 /* size in bytes reserved for initial data */
+#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
+#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
+
+/*-----------------------------------------------------------------------
+ * Start addresses for the final memory configuration
+ * (Set up by the startup code)
+ * Please note that CFG_SDRAM_BASE _must_ start at 0
+ */
+#define CFG_SDRAM_BASE 0x00000000
+#define CFG_SDRAM_SIZE 8 /* SDRAM size in MB */
+#define CFG_FLASH_BASE 0x10000000
+
+#ifdef CONFIG_MONITOR_IS_IN_RAM
+#define CFG_MONITOR_BASE 0x20000
+#else
+#define CFG_MONITOR_BASE (CFG_FLASH_BASE + 0x400)
+#endif
+
+#define CFG_MONITOR_LEN 0x20001
+#define CFG_MALLOC_LEN (256 << 10)
+#define CFG_BOOTPARAMS_LEN 64*1024
+
+/*
+ * For booting Linux, the board info and command line data
+ * have to be in the first 8 MB of memory, since this is
+ * the maximum mapped by the Linux kernel during initialization ??
+ */
+#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
+
+/*-----------------------------------------------------------------------
+ * FLASH organization
+ */
+#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
+#define CFG_MAX_FLASH_SECT 1024 /* max number of sectors on one chip */
+#define CFG_FLASH_ERASE_TOUT 1000
+
+#define CFG_FLASH_CFI 1
+#define CFG_FLASH_CFI_DRIVER 1
+#define CFG_FLASH_SIZE 0x800000
+
+/*-----------------------------------------------------------------------
+ * Cache Configuration
+ */
+#define CFG_CACHELINE_SIZE 16
+
+/*-----------------------------------------------------------------------
+ * Memory bank definitions
+ */
+
+/*-----------------------------------------------------------------------
+ * Port configuration
+ */
+#define CFG_FECI2C 0xF0
+
+#endif /* _R5200_H */
diff --git a/lib_m68k/board.c b/lib_m68k/board.c
index 80c41a6..73d2e3f 100644
--- a/lib_m68k/board.c
+++ b/lib_m68k/board.c
@@ -261,6 +261,7 @@ board_init_f (ulong bootflag)
{
bd_t *bd;
ulong len, addr, addr_sp;
+ ulong *paddr;
gd_t *id;
init_fnc_t **init_fnc_ptr;
#ifdef CONFIG_PRAM
@@ -357,8 +358,12 @@ board_init_f (ulong bootflag)
*/
addr_sp -= 16;
addr_sp &= ~0xF;
- *((ulong *) addr_sp)-- = 0;
- *((ulong *) addr_sp)-- = 0;
+
+ paddr = (ulong *)addr_sp;
+ *paddr-- = 0;
+ *paddr-- = 0;
+ addr_sp = (ulong)paddr;
+
debug ("Stack Pointer at: %08lx\n", addr_sp);
/*
diff --git a/lib_m68k/time.c b/lib_m68k/time.c
index 1d6d297..d45e470 100644
--- a/lib_m68k/time.c
+++ b/lib_m68k/time.c
@@ -27,6 +27,11 @@
#include <asm/mcftimer.h>
+#ifdef CONFIG_M5271
+#include <asm/m5271.h>
+#include <asm/immap_5271.h>
+#endif
+
#ifdef CONFIG_M5272
#include <asm/m5272.h>
#include <asm/immap_5272.h>
@@ -43,7 +48,7 @@
static ulong timestamp;
-#ifdef CONFIG_M5282
+#if defined(CONFIG_M5282) || defined(CONFIG_M5271)
static unsigned short lastinc;
#endif
@@ -127,7 +132,7 @@ void set_timer (ulong t)
}
#endif
-#if defined(CONFIG_M5282)
+#if defined(CONFIG_M5282) || defined(CONFIG_M5271)
void udelay(unsigned long usec)
{