diff options
| -rw-r--r-- | MAINTAINERS | 2 | ||||
| -rwxr-xr-x | MAKEALL | 6 | ||||
| -rw-r--r-- | Makefile | 5 | ||||
| -rw-r--r-- | board/xilinx/microblaze-generic/Makefile (renamed from board/xilinx/ml401/Makefile) | 0 | ||||
| -rw-r--r-- | board/xilinx/microblaze-generic/config.mk (renamed from board/xilinx/ml401/config.mk) | 0 | ||||
| -rw-r--r-- | board/xilinx/microblaze-generic/microblaze-generic.c (renamed from board/xilinx/ml401/ml401.c) | 0 | ||||
| -rw-r--r-- | board/xilinx/microblaze-generic/u-boot.lds (renamed from board/xilinx/ml401/u-boot.lds) | 0 | ||||
| -rw-r--r-- | board/xilinx/microblaze-generic/xparameters.h (renamed from board/xilinx/ml401/xparameters.h) | 2 | ||||
| -rw-r--r-- | cpu/microblaze/cache.c | 3 | ||||
| -rw-r--r-- | include/configs/microblaze-generic.h (renamed from include/configs/ml401.h) | 121 | ||||
| -rw-r--r-- | lib_microblaze/board.c | 30 | ||||
| -rw-r--r-- | lib_microblaze/cache.c | 16 |
12 files changed, 121 insertions, 64 deletions
diff --git a/MAINTAINERS b/MAINTAINERS index 60def0c..dfe54a7 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -707,7 +707,7 @@ Yasushi Shoji <yashi@atmark-techno.com> Michal Simek <monstr@monstr.eu> - ML401 MicroBlaze + microblaze-generic MicroBlaze ######################################################################### # Coldfire Systems: # @@ -697,9 +697,9 @@ LIST_nios2=" \ ## MicroBlaze Systems ######################################################################### -LIST_microblaze=" \ - ml401 \ - suzaku \ +LIST_microblaze=" \ + microblaze-generic \ + suzaku \ " ######################################################################### @@ -3170,10 +3170,9 @@ PCI5441_config : unconfig ## Microblaze #======================================================================== -ml401_config: unconfig +microblaze-generic_config: unconfig @mkdir -p $(obj)include - @echo "#define CONFIG_ML401 1" > $(obj)include/config.h - @$(MKCONFIG) -a $(@:_config=) microblaze microblaze ml401 xilinx + @$(MKCONFIG) -a $(@:_config=) microblaze microblaze microblaze-generic xilinx suzaku_config: unconfig @mkdir -p $(obj)include diff --git a/board/xilinx/ml401/Makefile b/board/xilinx/microblaze-generic/Makefile index 10b47b2..10b47b2 100644 --- a/board/xilinx/ml401/Makefile +++ b/board/xilinx/microblaze-generic/Makefile diff --git a/board/xilinx/ml401/config.mk b/board/xilinx/microblaze-generic/config.mk index c75daaf..c75daaf 100644 --- a/board/xilinx/ml401/config.mk +++ b/board/xilinx/microblaze-generic/config.mk diff --git a/board/xilinx/ml401/ml401.c b/board/xilinx/microblaze-generic/microblaze-generic.c index f388b77..f388b77 100644 --- a/board/xilinx/ml401/ml401.c +++ b/board/xilinx/microblaze-generic/microblaze-generic.c diff --git a/board/xilinx/ml401/u-boot.lds b/board/xilinx/microblaze-generic/u-boot.lds index b38f648..b38f648 100644 --- a/board/xilinx/ml401/u-boot.lds +++ b/board/xilinx/microblaze-generic/u-boot.lds diff --git a/board/xilinx/ml401/xparameters.h b/board/xilinx/microblaze-generic/xparameters.h index d805061..fae03bf 100644 --- a/board/xilinx/ml401/xparameters.h +++ b/board/xilinx/microblaze-generic/xparameters.h @@ -25,6 +25,8 @@ * Version: Xilinx EDK 8.2.02 EDK_Im_Sp2.4 */ +#define XILINX_BOARD_NAME microblaze-generic + /* System Clock Frequency */ #define XILINX_CLOCK_FREQ 100000000 diff --git a/cpu/microblaze/cache.c b/cpu/microblaze/cache.c index 4b7866f..3b7c4d4 100644 --- a/cpu/microblaze/cache.c +++ b/cpu/microblaze/cache.c @@ -25,8 +25,6 @@ #include <common.h> #include <asm/asm.h> -#if defined(CONFIG_CMD_CACHE) - int dcache_status (void) { int i = 0; @@ -62,4 +60,3 @@ void dcache_enable (void) { void dcache_disable(void) { MSRCLR(0x80); } -#endif diff --git a/include/configs/ml401.h b/include/configs/microblaze-generic.h index c802dcb..4c6cc9f 100644 --- a/include/configs/ml401.h +++ b/include/configs/microblaze-generic.h @@ -25,32 +25,33 @@ #ifndef __CONFIG_H #define __CONFIG_H -#include "../board/xilinx/ml401/xparameters.h" +#include "../board/xilinx/microblaze-generic/xparameters.h" #define CONFIG_MICROBLAZE 1 /* MicroBlaze CPU */ #define MICROBLAZE_V5 1 -#define CONFIG_ML401 1 /* ML401 Board */ /* uart */ #ifdef XILINX_UARTLITE_BASEADDR -#define CONFIG_XILINX_UARTLITE -#define CONFIG_SERIAL_BASE XILINX_UARTLITE_BASEADDR -#define CONFIG_BAUDRATE XILINX_UARTLITE_BAUDRATE -#define CONFIG_SYS_BAUDRATE_TABLE { CONFIG_BAUDRATE } + #define CONFIG_XILINX_UARTLITE + #define CONFIG_SERIAL_BASE XILINX_UARTLITE_BASEADDR + #define CONFIG_BAUDRATE XILINX_UARTLITE_BAUDRATE + #define CONFIG_SYS_BAUDRATE_TABLE { CONFIG_BAUDRATE } + #define CONSOLE_ARG "console=console=ttyUL0,115200\0" #elif XILINX_UART16550_BASEADDR -#define CONFIG_SYS_NS16550 1 -#define CONFIG_SYS_NS16550_SERIAL -#define CONFIG_SYS_NS16550_REG_SIZE -4 -#define CONFIG_CONS_INDEX 1 -#define CONFIG_SYS_NS16550_COM1 (XILINX_UART16550_BASEADDR + 0x1000 + 0x3) -#define CONFIG_SYS_NS16550_CLK XILINX_UART16550_CLOCK_HZ -#define CONFIG_BAUDRATE 115200 - -/* The following table includes the supported baudrates */ -#define CONFIG_SYS_BAUDRATE_TABLE \ - {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400} + #define CONFIG_SYS_NS16550 1 + #define CONFIG_SYS_NS16550_SERIAL + #define CONFIG_SYS_NS16550_REG_SIZE -4 + #define CONFIG_CONS_INDEX 1 + #define CONFIG_SYS_NS16550_COM1 (XILINX_UART16550_BASEADDR + 0x1000 + 0x3) + #define CONFIG_SYS_NS16550_CLK XILINX_UART16550_CLOCK_HZ + #define CONFIG_BAUDRATE 115200 + + /* The following table includes the supported baudrates */ + #define CONFIG_SYS_BAUDRATE_TABLE \ + {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400} + #define CONSOLE_ARG "console=console=ttyS0,115200\0" #else -#error Undefined uart + #error Undefined uart #endif /* setting reset address */ @@ -58,44 +59,44 @@ /* ethernet */ #ifdef XILINX_EMAC_BASEADDR -#define CONFIG_XILINX_EMAC 1 -#define CONFIG_SYS_ENET -#else -#ifdef XILINX_EMACLITE_BASEADDR -#define CONFIG_XILINX_EMACLITE 1 -#define CONFIG_SYS_ENET -#endif + #define CONFIG_XILINX_EMAC 1 + #define CONFIG_SYS_ENET +#elif XILINX_EMACLITE_BASEADDR + #define CONFIG_XILINX_EMACLITE 1 + #define CONFIG_SYS_ENET +#elif XILINX_LLTEMAC_BASEADDR + #define CONFIG_XILINX_LL_TEMAC 1 + #define CONFIG_SYS_ENET #endif + #undef ET_DEBUG /* gpio */ #ifdef XILINX_GPIO_BASEADDR -#define CONFIG_SYS_GPIO_0 1 -#define CONFIG_SYS_GPIO_0_ADDR XILINX_GPIO_BASEADDR + #define CONFIG_SYS_GPIO_0 1 + #define CONFIG_SYS_GPIO_0_ADDR XILINX_GPIO_BASEADDR #endif /* interrupt controller */ #ifdef XILINX_INTC_BASEADDR -#define CONFIG_SYS_INTC_0 1 -#define CONFIG_SYS_INTC_0_ADDR XILINX_INTC_BASEADDR -#define CONFIG_SYS_INTC_0_NUM XILINX_INTC_NUM_INTR_INPUTS + #define CONFIG_SYS_INTC_0 1 + #define CONFIG_SYS_INTC_0_ADDR XILINX_INTC_BASEADDR + #define CONFIG_SYS_INTC_0_NUM XILINX_INTC_NUM_INTR_INPUTS #endif /* timer */ #ifdef XILINX_TIMER_BASEADDR -#if (XILINX_TIMER_IRQ != -1) -#define CONFIG_SYS_TIMER_0 1 -#define CONFIG_SYS_TIMER_0_ADDR XILINX_TIMER_BASEADDR -#define CONFIG_SYS_TIMER_0_IRQ XILINX_TIMER_IRQ -#define FREQUENCE XILINX_CLOCK_FREQ -#define CONFIG_SYS_TIMER_0_PRELOAD ( FREQUENCE/1000 ) -#endif -#else -#ifdef XILINX_CLOCK_FREQ -#define CONFIG_XILINX_CLOCK_FREQ XILINX_CLOCK_FREQ + #if (XILINX_TIMER_IRQ != -1) + #define CONFIG_SYS_TIMER_0 1 + #define CONFIG_SYS_TIMER_0_ADDR XILINX_TIMER_BASEADDR + #define CONFIG_SYS_TIMER_0_IRQ XILINX_TIMER_IRQ + #define FREQUENCE XILINX_CLOCK_FREQ + #define CONFIG_SYS_TIMER_0_PRELOAD ( FREQUENCE/1000 ) + #endif +#elif XILINX_CLOCK_FREQ + #define CONFIG_XILINX_CLOCK_FREQ XILINX_CLOCK_FREQ #else -#error BAD CLOCK FREQ -#endif + #error BAD CLOCK FREQ #endif /* FSL */ /* #define CONFIG_SYS_FSL_2 */ @@ -160,7 +161,7 @@ #define CONFIG_FLASH_CFI_DRIVER 1 #define CONFIG_SYS_FLASH_EMPTY_INFO 1 /* ?empty sector */ #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ - #define CONFIG_SYS_MAX_FLASH_SECT 128 /* max number of sectors on one chip */ + #define CONFIG_SYS_MAX_FLASH_SECT 512 /* max number of sectors on one chip */ #define CONFIG_SYS_FLASH_PROTECTION /* hardware flash protection */ #ifdef RAMENV @@ -170,9 +171,9 @@ #else /* !RAMENV */ #define CONFIG_ENV_IS_IN_FLASH 1 - #define CONFIG_ENV_SECT_SIZE 0x40000 /* 256K(one sector) for env */ + #define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K(one sector) for env */ #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + (2 * CONFIG_ENV_SECT_SIZE)) - #define CONFIG_ENV_SIZE 0x40000 + #define CONFIG_ENV_SIZE 0x20000 #endif /* !RAMBOOT */ #else /* !FLASH */ /* ENV in RAM */ @@ -193,6 +194,18 @@ #define CONFIG_DOS_PARTITION #endif +#if defined(XILINX_USE_ICACHE) + #define CONFIG_ICACHE +#else + #undef CONFIG_ICACHE +#endif + +#if defined(XILINX_USE_DCACHE) + #define CONFIG_DCACHE +#else + #undef CONFIG_DCACHE +#endif + /* * BOOTP options */ @@ -207,9 +220,15 @@ #include <config_cmd_default.h> #define CONFIG_CMD_ASKENV -#define CONFIG_CMD_CACHE #define CONFIG_CMD_IRQ #define CONFIG_CMD_MFSL +#define CONFIG_CMD_ECHO + +#if defined(CONFIG_DCACHE) || defined(CONFIG_ICACHE) + #define CONFIG_CMD_CACHE +#else + #undef CONFIG_CMD_CACHE +#endif #ifndef CONFIG_SYS_ENET #undef CONFIG_CMD_NET @@ -233,7 +252,9 @@ #define CONFIG_CMD_SAVES #endif #else + #undef CONFIG_CMD_IMLS #undef CONFIG_CMD_FLASH + #undef CONFIG_CMD_JFFS2 #endif #if defined(CONFIG_CMD_JFFS2) @@ -253,11 +274,11 @@ #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) /* print buffer size */ #define CONFIG_SYS_MAXARGS 15 /* max number of command args */ #define CONFIG_SYS_LONGHELP -#define CONFIG_SYS_LOAD_ADDR 0x12000000 /* default load address */ +#define CONFIG_SYS_LOAD_ADDR XILINX_RAM_START /* default load address */ -#define CONFIG_BOOTDELAY 30 +#define CONFIG_BOOTDELAY -1 /* -1 disables auto-boot */ #define CONFIG_BOOTARGS "root=romfs" -#define CONFIG_HOSTNAME "ml401" +#define CONFIG_HOSTNAME XILINX_BOARD_NAME #define CONFIG_BOOTCOMMAND "base 0;tftp 11000000 image.img;bootm" #define CONFIG_IPADDR 192.168.0.3 #define CONFIG_SERVERIP 192.168.0.5 @@ -268,7 +289,7 @@ #define CONFIG_SYS_USR_EXCEP /* user exception */ #define CONFIG_SYS_HZ 1000 -#define CONFIG_PREBOOT "echo U-BOOT for ML401;setenv preboot;echo" +#define CONFIG_PREBOOT "echo U-BOOT for $(hostname);setenv preboot;echo" #define CONFIG_EXTRA_ENV_SETTINGS "unlock=yes\0" /* hardware flash protection */\ "nor0=ml401-0\0"\ diff --git a/lib_microblaze/board.c b/lib_microblaze/board.c index 4f48341..30d7641 100644 --- a/lib_microblaze/board.c +++ b/lib_microblaze/board.c @@ -112,6 +112,10 @@ void board_init (void) #if defined(CONFIG_CMD_FLASH) ulong flash_size = 0; #endif +#if defined(CONFIG_CMD_NET) + char *s, *e; + int i; +#endif asm ("nop"); /* FIXME gd is not initialize - wait */ memset ((void *)gd, 0, CONFIG_SYS_GBL_DATA_SIZE); gd->bd = (bd_t *) (gd + 1); /* At end of global data */ @@ -132,11 +136,34 @@ void board_init (void) } } + puts ("SDRAM :\n"); + printf ("\t\tIcache:%s\n", icache_status() ? "OK" : "FAIL"); + printf ("\t\tDcache:%s\n", dcache_status() ? "OK" : "FAIL"); + printf ("\tU-Boot Start:0x%08x\n", TEXT_BASE); + #if defined(CONFIG_CMD_FLASH) + puts ("FLASH: "); bd->bi_flashstart = CONFIG_SYS_FLASH_BASE; if (0 < (flash_size = flash_init ())) { bd->bi_flashsize = flash_size; bd->bi_flashoffset = CONFIG_SYS_FLASH_BASE + flash_size; +# ifdef CONFIG_SYS_FLASH_CHECKSUM + print_size (flash_size, ""); + /* + * Compute and print flash CRC if flashchecksum is set to 'y' + * + * NOTE: Maybe we should add some WATCHDOG_RESET()? XXX + */ + s = getenv ("flashchecksum"); + if (s && (*s == 'y')) { + printf (" CRC: %08X", + crc32 (0, (const unsigned char *) CONFIG_SYS_FLASH_BASE, flash_size) + ); + } + putc ('\n'); +# else /* !CONFIG_SYS_FLASH_CHECKSUM */ + print_size (flash_size, "\n"); +# endif /* CONFIG_SYS_FLASH_CHECKSUM */ } else { puts ("Flash init FAILED"); bd->bi_flashstart = 0; @@ -146,10 +173,9 @@ void board_init (void) #endif #if defined(CONFIG_CMD_NET) - char *s, *e; - int i; /* board MAC address */ s = getenv ("ethaddr"); + printf ("MAC:%s\n",s); for (i = 0; i < 6; ++i) { bd->bi_enetaddr[i] = s ? simple_strtoul (s, &e, 16) : 0; if (s) diff --git a/lib_microblaze/cache.c b/lib_microblaze/cache.c index a2f7493..4b2e8e3 100644 --- a/lib_microblaze/cache.c +++ b/lib_microblaze/cache.c @@ -26,6 +26,18 @@ void flush_cache (ulong addr, ulong size) { - /* MicroBlaze have write thruough cache. nothing to do. */ - return; + int i; + for (i = 0; i < size; i += 4) + asm volatile ( +#ifdef CONFIG_ICACHE + "wic %0, r0;" +#endif + "nop;" +#ifdef CONFIG_DCACHE + "wdc %0, r0;" +#endif + "nop;" + : + : "r" (addr + i) + : "memory"); } |