diff options
| -rw-r--r-- | board/actux4/actux4.c | 103 | ||||
| -rw-r--r-- | board/actux4/config.mk | 4 | ||||
| -rw-r--r-- | include/configs/actux4.h | 39 |
3 files changed, 86 insertions, 60 deletions
diff --git a/board/actux4/actux4.c b/board/actux4/actux4.c index f373b58..d20d881 100644 --- a/board/actux4/actux4.c +++ b/board/actux4/actux4.c @@ -35,92 +35,107 @@ #include <command.h> #include <malloc.h> #include <asm/arch/ixp425.h> - +#include <asm/io.h> #include <miiphy.h> +#ifdef CONFIG_PCI +#include <pci.h> +#include <asm/arch/ixp425pci.h> +#endif #include "actux4_hw.h" DECLARE_GLOBAL_DATA_PTR; -int board_init (void) +int board_early_init_f(void) +{ + writel(0xbd113c42, IXP425_EXP_CS1); + return 0; +} + +int board_init(void) { gd->bd->bi_arch_number = MACH_TYPE_ACTUX4; /* adress of boot parameters */ gd->bd->bi_boot_params = 0x00000100; - GPIO_OUTPUT_CLEAR (CONFIG_SYS_GPIO_nPWRON); - GPIO_OUTPUT_ENABLE (CONFIG_SYS_GPIO_nPWRON); + GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_nPWRON); + GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_nPWRON); - GPIO_OUTPUT_CLEAR (CONFIG_SYS_GPIO_IORST); - GPIO_OUTPUT_ENABLE (CONFIG_SYS_GPIO_IORST); + GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_IORST); + GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_IORST); /* led not populated on board*/ - GPIO_OUTPUT_ENABLE (CONFIG_SYS_GPIO_LED3); - GPIO_OUTPUT_SET (CONFIG_SYS_GPIO_LED3); + GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_LED3); + GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_LED3); /* middle LED */ - GPIO_OUTPUT_ENABLE (CONFIG_SYS_GPIO_LED2); - GPIO_OUTPUT_SET (CONFIG_SYS_GPIO_LED2); + GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_LED2); + GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_LED2); /* right LED */ /* weak pulldown = LED weak on */ - GPIO_OUTPUT_DISABLE (CONFIG_SYS_GPIO_LED1); - GPIO_OUTPUT_SET (CONFIG_SYS_GPIO_LED1); + GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_LED1); + GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_LED1); /* Setup GPIO's for Interrupt inputs */ - GPIO_OUTPUT_DISABLE (CONFIG_SYS_GPIO_USBINTA); - GPIO_OUTPUT_DISABLE (CONFIG_SYS_GPIO_USBINTB); - GPIO_OUTPUT_DISABLE (CONFIG_SYS_GPIO_USBINTC); - GPIO_OUTPUT_DISABLE (CONFIG_SYS_GPIO_RTCINT); - GPIO_OUTPUT_DISABLE (CONFIG_SYS_GPIO_PCI_INTA); - GPIO_OUTPUT_DISABLE (CONFIG_SYS_GPIO_PCI_INTB); - - GPIO_INT_ACT_LOW_SET (CONFIG_SYS_GPIO_USBINTA); - GPIO_INT_ACT_LOW_SET (CONFIG_SYS_GPIO_USBINTB); - GPIO_INT_ACT_LOW_SET (CONFIG_SYS_GPIO_USBINTC); - GPIO_INT_ACT_LOW_SET (CONFIG_SYS_GPIO_RTCINT); - GPIO_INT_ACT_LOW_SET (CONFIG_SYS_GPIO_PCI_INTA); - GPIO_INT_ACT_LOW_SET (CONFIG_SYS_GPIO_PCI_INTB); + GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_USBINTA); + GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_USBINTB); + GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_USBINTC); + GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_RTCINT); + GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_PCI_INTA); + GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_PCI_INTB); + + GPIO_INT_ACT_LOW_SET(CONFIG_SYS_GPIO_USBINTA); + GPIO_INT_ACT_LOW_SET(CONFIG_SYS_GPIO_USBINTB); + GPIO_INT_ACT_LOW_SET(CONFIG_SYS_GPIO_USBINTC); + GPIO_INT_ACT_LOW_SET(CONFIG_SYS_GPIO_RTCINT); + GPIO_INT_ACT_LOW_SET(CONFIG_SYS_GPIO_PCI_INTA); + GPIO_INT_ACT_LOW_SET(CONFIG_SYS_GPIO_PCI_INTB); /* Setup GPIO's for 33MHz clock output */ - *IXP425_GPIO_GPCLKR = 0x011001FF; - GPIO_OUTPUT_ENABLE (CONFIG_SYS_GPIO_EXTBUS_CLK); - GPIO_OUTPUT_ENABLE (CONFIG_SYS_GPIO_PCI_CLK); - - *IXP425_EXP_CS1 = 0xbd113c42; + writel(0x011001FF, IXP425_GPIO_GPCLKR); + GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_EXTBUS_CLK); + GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_PCI_CLK); - udelay (10000); - GPIO_OUTPUT_SET (CONFIG_SYS_GPIO_IORST); - udelay (10000); - GPIO_OUTPUT_CLEAR (CONFIG_SYS_GPIO_IORST); - udelay (10000); - GPIO_OUTPUT_SET (CONFIG_SYS_GPIO_IORST); + udelay(10000); + GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_IORST); + udelay(10000); + GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_IORST); + udelay(10000); + GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_IORST); return 0; } /* Check Board Identity */ -int checkboard (void) +int checkboard(void) { - puts ("Board: AcTux-4\n"); - return (0); + puts("Board: AcTux-4\n"); + return 0; } -int dram_init (void) +int dram_init(void) { - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; - gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; + gd->ram_size = get_ram_size(CONFIG_SYS_SDRAM_BASE, 128<<20); + return 0; +} - return (0); +#ifdef CONFIG_PCI +struct pci_controller hose; + +void pci_init_board(void) +{ + pci_ixp_init(&hose); } +#endif /* * Hardcoded flash setup: * Flash 0 is a non-CFI SST 39VF020 flash, 8 bit flash / 8 bit bus. * Flash 1 is an Intel *16 flash using the CFI driver. */ -ulong board_flash_get_legacy (ulong base, int banknum, flash_info_t * info) +ulong board_flash_get_legacy(ulong base, int banknum, flash_info_t *info) { if (banknum == 0) { /* non-CFI boot flash */ info->portwidth = 1; diff --git a/board/actux4/config.mk b/board/actux4/config.mk deleted file mode 100644 index 9cb838b..0000000 --- a/board/actux4/config.mk +++ /dev/null @@ -1,4 +0,0 @@ -CONFIG_SYS_TEXT_BASE = 0x00e00000 - -# include NPE ethernet driver -BOARDLIBS = arch/arm/cpu/ixp/npe/libnpe.o diff --git a/include/configs/actux4.h b/include/configs/actux4.h index 6718921..190de5a 100644 --- a/include/configs/actux4.h +++ b/include/configs/actux4.h @@ -37,12 +37,11 @@ #define CONFIG_BAUDRATE 115200 #define CONFIG_BOOTDELAY 3 #define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */ +#define CONFIG_BOARD_EARLY_INIT_F 1 /*************************************************************** * U-boot generic defines start here. ***************************************************************/ -#undef CONFIG_USE_IRQ - /* Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) @@ -54,6 +53,15 @@ #define CONFIG_CMD_ELF +#define CONFIG_PCI +#ifdef CONFIG_PCI +#define CONFIG_CMD_PCI +#define CONFIG_PCI_PNP +#define CONFIG_IXP_PCI +#define CONFIG_PCI_SCAN_SHOW +#define CONFIG_CMD_PCI_ENUM +#endif + #define CONFIG_BOOTCOMMAND "run boot_flash" /* enable passing of ATAGs */ #define CONFIG_CMDLINE_TAG 1 @@ -81,8 +89,9 @@ #define CONFIG_SYS_MEMTEST_START 0x00400000 #define CONFIG_SYS_MEMTEST_END 0x00800000 -/* spec says 66.666 MHz, but it appears to be 33 */ -#define CONFIG_SYS_HZ 3333333 +/* timer clock - 2* OSC_IN system clock */ +#define CONFIG_IXP425_TIMER_CLK 66000000 +#define CONFIG_SYS_HZ 1000 /* default load address */ #define CONFIG_SYS_LOAD_ADDR 0x00010000 @@ -97,10 +106,6 @@ * The stack sizes are set up in start.S using the settings below */ #define CONFIG_STACKSIZE (128*1024) /* regular stack */ -#ifdef CONFIG_USE_IRQ -# define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */ -# define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */ -#endif /* Expansion bus settings */ #define CONFIG_SYS_EXP_CS0 0xbd113003 @@ -108,7 +113,7 @@ /* SDRAM settings */ #define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM_1 0x00000000 -#define CONFIG_SYS_DRAM_BASE 0x00000000 +#define CONFIG_SYS_SDRAM_BASE 0x00000000 /* 32MB SDRAM */ #define CONFIG_SYS_SDR_CONFIG 0x18 @@ -118,6 +123,7 @@ #define CONFIG_SYS_DRAM_SIZE 0x02000000 /* FLASH organization */ +#define CONFIG_SYS_TEXT_BASE 0x50000000 #define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max # of sectors per chip */ #define CONFIG_SYS_MAX_FLASH_SECT 70 @@ -128,6 +134,7 @@ #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 #define CONFIG_SYS_MONITOR_BASE PHYS_FLASH_1 #define CONFIG_SYS_MONITOR_LEN (252 << 10) +#define CONFIG_BOARD_SIZE_LIMIT 258048 /* Use common CFI driver */ #define CONFIG_SYS_FLASH_CFI @@ -152,6 +159,7 @@ #define CONFIG_PHY_ADDR 0x1C /* MII PHY management */ #define CONFIG_MII 1 + /* Number of ethernet rx buffers & descriptors */ #define CONFIG_SYS_RX_ETH_BUFFER 16 @@ -180,19 +188,22 @@ "mtd=IXP4XX-Flash.0:252k(uboot),4k(uboot_env);" \ "IXP4XX-Flash.1:128k(ucode),1280k(linux),-(root)\0" \ "kerneladdr=51020000\0" \ + "kernelfile=actux4/uImage\0" \ + "rootfile=actux4/rootfs\0" \ "rootaddr=51160000\0" \ "loadaddr=10000\0" \ "updateboot_ser=mw.b 10000 ff 40000;" \ " loady ${loadaddr};" \ " run eraseboot writeboot\0" \ "updateboot_net=mw.b 10000 ff 40000;" \ - " tftp ${loadaddr} u-boot.bin;" \ + " tftp ${loadaddr} actux4/u-boot.bin;" \ " run eraseboot writeboot\0" \ "eraseboot=protect off 50000000 5003efff;" \ " erase 50000000 +${filesize}\0" \ "writeboot=cp.b 10000 50000000 ${filesize}\0" \ - "eraseenv=protect off 5003f000 5003ffff;" \ - " erase 5003f000 5003ffff\0" \ + "updateucode=loady;" \ + " era ${npe_ucode} +${filesize};" \ + " cp.b ${loadaddr} ${npe_ucode} ${filesize}\0" \ "updateroot=tftp ${loadaddr} ${rootfile};" \ " era ${rootaddr} +${filesize};" \ " cp.b ${loadaddr} ${rootaddr} ${filesize}\0" \ @@ -211,4 +222,8 @@ " tftpboot ${loadaddr} ${kernelfile};" \ " bootm\0" +/* additions for new relocation code, must be added to all boards */ +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE) + #endif /* __CONFIG_H */ |