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-rw-r--r--blackfin_config.mk6
-rw-r--r--board/bf561-ezkit/u-boot.lds.S9
-rw-r--r--cpu/blackfin/cpu.c10
-rw-r--r--cpu/blackfin/initcode.c2
-rw-r--r--include/asm-blackfin/blackfin-config-pre.h8
5 files changed, 32 insertions, 3 deletions
diff --git a/blackfin_config.mk b/blackfin_config.mk
index 04a7529..05077c8 100644
--- a/blackfin_config.mk
+++ b/blackfin_config.mk
@@ -36,7 +36,9 @@ endif
SYM_PREFIX = _
-LDR_FLAGS += -J
+LDR_FLAGS-y :=
+LDR_FLAGS-$(CONFIG_BFIN_BOOTROM_USES_EVT1) += -J
+
LDR_FLAGS += --bmode $(subst BFIN_BOOT_,,$(CONFIG_BFIN_BOOT_MODE))
LDR_FLAGS += --use-vmas
ifneq ($(CONFIG_BFIN_BOOT_MODE),BFIN_BOOT_BYPASS)
@@ -45,3 +47,5 @@ endif
ifneq (,$(findstring s,$(MAKEFLAGS)))
LDR_FLAGS += --quiet
endif
+
+LDR_FLAGS += $(LDR_FLAGS-y)
diff --git a/board/bf561-ezkit/u-boot.lds.S b/board/bf561-ezkit/u-boot.lds.S
index 4220e81..e6d3ddc 100644
--- a/board/bf561-ezkit/u-boot.lds.S
+++ b/board/bf561-ezkit/u-boot.lds.S
@@ -42,12 +42,19 @@
# define L1_DATA_B_SRAM_SIZE 0
#endif
+/* The 0xC offset is so we don't clobber the tiny LDR jump block. */
+#ifdef CONFIG_BFIN_BOOTROM_USES_EVT1
+# define L1_CODE_ORIGIN L1_INST_SRAM
+#else
+# define L1_CODE_ORIGIN L1_INST_SRAM + 0xC
+#endif
+
OUTPUT_ARCH(bfin)
MEMORY
{
ram : ORIGIN = CONFIG_SYS_MONITOR_BASE, LENGTH = CONFIG_SYS_MONITOR_LEN
- l1_code : ORIGIN = L1_INST_SRAM, LENGTH = L1_INST_SRAM_SIZE
+ l1_code : ORIGIN = L1_CODE_ORIGIN, LENGTH = L1_INST_SRAM_SIZE
l1_data : ORIGIN = L1_DATA_B_SRAM, LENGTH = L1_DATA_B_SRAM_SIZE
}
diff --git a/cpu/blackfin/cpu.c b/cpu/blackfin/cpu.c
index c2ff8cd..9bb6407 100644
--- a/cpu/blackfin/cpu.c
+++ b/cpu/blackfin/cpu.c
@@ -25,12 +25,20 @@ ulong bfin_poweron_retx;
__attribute__ ((__noreturn__))
void cpu_init_f(ulong bootflag, ulong loaded_from_ldr)
{
+ extern char _stext_l1;
+#ifndef CONFIG_BFIN_BOOTROM_USES_EVT1
+ /* Build a NOP slide over the LDR jump block. Whee! */
+ char nops[0xC];
+ serial_early_puts("NOP Slide\n");
+ memset(nops, 0x00, sizeof(nops));
+ memcpy(&_stext_l1 - sizeof(nops), nops, sizeof(nops));
+#endif
+
if (!loaded_from_ldr) {
/* Relocate sections into L1 if the LDR didn't do it -- don't
* check length because the linker script does the size
* checking at build time.
*/
- extern char _stext_l1;
serial_early_puts("L1 Relocate\n");
extern char _stext_l1, _etext_l1, _stext_l1_lma;
memcpy(&_stext_l1, &_stext_l1_lma, (&_etext_l1 - &_stext_l1));
diff --git a/cpu/blackfin/initcode.c b/cpu/blackfin/initcode.c
index c0fe2c6..a039cbb 100644
--- a/cpu/blackfin/initcode.c
+++ b/cpu/blackfin/initcode.c
@@ -543,9 +543,11 @@ void initcode(ADI_BOOT_DATA *bootstruct)
serial_putc('T');
+#ifdef CONFIG_BFIN_BOOTROM_USES_EVT1
/* tell the bootrom where our entry point is */
if (CONFIG_BFIN_BOOT_MODE != BFIN_BOOT_BYPASS)
bfin_write_EVT1(CONFIG_SYS_MONITOR_BASE);
+#endif
serial_putc('>');
serial_putc('\n');
diff --git a/include/asm-blackfin/blackfin-config-pre.h b/include/asm-blackfin/blackfin-config-pre.h
index e973de7..a3db362 100644
--- a/include/asm-blackfin/blackfin-config-pre.h
+++ b/include/asm-blackfin/blackfin-config-pre.h
@@ -54,6 +54,14 @@ static inline const char *get_bfin_boot_mode(int bfin_boot)
}
#endif
+/* Most bootroms allow for EVT1 redirection */
+#if (defined(__ADSPBF531__) || defined(__ADSPBF532__) || defined(__ADSPBF533__) \
+ && __SILICON_REVISION__ < 3) || defined(__ADSPBF561__)
+# undef CONFIG_BFIN_BOOTROM_USES_EVT1
+#else
+# define CONFIG_BFIN_BOOTROM_USES_EVT1
+#endif
+
/* Define the default SPI CS used when booting out of SPI */
#if defined(__ADSPBF531__) || defined(__ADSPBF532__) || defined(__ADSPBF533__) || \
defined(__ADSPBF538__) || defined(__ADSPBF539__) || defined(__ADSPBF561__) || \