diff options
| -rw-r--r-- | board/armadeus/apf27/fpga.c | 2 | ||||
| -rw-r--r-- | board/astro/mcf5373l/fpga.c | 2 | ||||
| -rw-r--r-- | board/balloon3/balloon3.c | 2 | ||||
| -rw-r--r-- | board/esd/pmc440/fpga.c | 2 | ||||
| -rw-r--r-- | board/gen860t/fpga.c | 2 | ||||
| -rw-r--r-- | board/matrix_vision/mvsmr/fpga.c | 2 | ||||
| -rw-r--r-- | board/spear/x600/fpga.c | 2 | ||||
| -rw-r--r-- | board/teejet/mt_ventoux/mt_ventoux.c | 2 | ||||
| -rw-r--r-- | board/xilinx/zynq/board.c | 14 | ||||
| -rw-r--r-- | drivers/fpga/spartan2.c | 26 | ||||
| -rw-r--r-- | drivers/fpga/spartan3.c | 26 | ||||
| -rw-r--r-- | drivers/fpga/virtex2.c | 22 | ||||
| -rw-r--r-- | drivers/fpga/xilinx.c | 14 | ||||
| -rw-r--r-- | drivers/fpga/zynqpl.c | 6 | ||||
| -rw-r--r-- | include/spartan2.h | 6 | ||||
| -rw-r--r-- | include/spartan3.h | 6 | ||||
| -rw-r--r-- | include/virtex2.h | 6 | ||||
| -rw-r--r-- | include/xilinx.h | 10 | ||||
| -rw-r--r-- | include/zynqpl.h | 6 |
19 files changed, 79 insertions, 79 deletions
diff --git a/board/armadeus/apf27/fpga.c b/board/armadeus/apf27/fpga.c index 56fde20..7d6e1e4 100644 --- a/board/armadeus/apf27/fpga.c +++ b/board/armadeus/apf27/fpga.c @@ -42,7 +42,7 @@ xilinx_spartan3_slave_parallel_fns fpga_fns = { fpga_post_fn, }; -Xilinx_desc fpga[CONFIG_FPGA_COUNT] = { +xilinx_desc fpga[CONFIG_FPGA_COUNT] = { {xilinx_spartan3, slave_parallel, 1196128l/8, diff --git a/board/astro/mcf5373l/fpga.c b/board/astro/mcf5373l/fpga.c index 152ff1f..9dc82c5 100644 --- a/board/astro/mcf5373l/fpga.c +++ b/board/astro/mcf5373l/fpga.c @@ -374,7 +374,7 @@ xilinx_spartan3_slave_serial_fns xilinx_fns = { xilinx_fastwr_fn }; -Xilinx_desc xilinx_fpga[CONFIG_FPGA_COUNT] = { +xilinx_desc xilinx_fpga[CONFIG_FPGA_COUNT] = { {xilinx_spartan3, slave_serial, XILINX_XC3S4000_SIZE, diff --git a/board/balloon3/balloon3.c b/board/balloon3/balloon3.c index 4aa6605..aa108ca 100644 --- a/board/balloon3/balloon3.c +++ b/board/balloon3/balloon3.c @@ -207,7 +207,7 @@ xilinx_spartan3_slave_parallel_fns balloon3_fpga_fns = { fpga_post_config_fn, }; -Xilinx_desc fpga = XILINX_XC3S1000_DESC(slave_parallel, +xilinx_desc fpga = XILINX_XC3S1000_DESC(slave_parallel, (void *)&balloon3_fpga_fns, 0); /* Initialize the FPGA */ diff --git a/board/esd/pmc440/fpga.c b/board/esd/pmc440/fpga.c index 18a1b63..f876da8 100644 --- a/board/esd/pmc440/fpga.c +++ b/board/esd/pmc440/fpga.c @@ -57,7 +57,7 @@ xilinx_spartan2_slave_serial_fns ngcc_fpga_fns = { ngcc_fpga_post_config_fn }; -Xilinx_desc fpga[CONFIG_FPGA_COUNT] = { +xilinx_desc fpga[CONFIG_FPGA_COUNT] = { XILINX_XC3S1200E_DESC( #ifdef USE_SP_CODE slave_parallel, diff --git a/board/gen860t/fpga.c b/board/gen860t/fpga.c index 48a4222..dd0ef70 100644 --- a/board/gen860t/fpga.c +++ b/board/gen860t/fpga.c @@ -56,7 +56,7 @@ xilinx_virtex2_slave_selectmap_fns fpga_fns = { fpga_post_config_fn }; -Xilinx_desc fpga[CONFIG_FPGA_COUNT] = { +xilinx_desc fpga[CONFIG_FPGA_COUNT] = { {xilinx_virtex2, slave_selectmap, XILINX_XC2V3000_SIZE, diff --git a/board/matrix_vision/mvsmr/fpga.c b/board/matrix_vision/mvsmr/fpga.c index b207455..5189925 100644 --- a/board/matrix_vision/mvsmr/fpga.c +++ b/board/matrix_vision/mvsmr/fpga.c @@ -26,7 +26,7 @@ xilinx_spartan3_slave_serial_fns fpga_fns = { 0 }; -Xilinx_desc spartan3 = { +xilinx_desc spartan3 = { xilinx_spartan2, slave_serial, XILINX_XC3S200_SIZE, diff --git a/board/spear/x600/fpga.c b/board/spear/x600/fpga.c index c26eba4..b256222 100644 --- a/board/spear/x600/fpga.c +++ b/board/spear/x600/fpga.c @@ -173,7 +173,7 @@ static xilinx_spartan3_slave_serial_fns x600_fpga_fns = { fpga_post_config_fn, }; -static Xilinx_desc fpga[CONFIG_FPGA_COUNT] = { +static xilinx_desc fpga[CONFIG_FPGA_COUNT] = { XILINX_XC3S1200E_DESC(slave_serial, &x600_fpga_fns, 0) }; diff --git a/board/teejet/mt_ventoux/mt_ventoux.c b/board/teejet/mt_ventoux/mt_ventoux.c index a361764..b4a0a72 100644 --- a/board/teejet/mt_ventoux/mt_ventoux.c +++ b/board/teejet/mt_ventoux/mt_ventoux.c @@ -200,7 +200,7 @@ xilinx_spartan3_slave_serial_fns mt_ventoux_fpga_fns = { fpga_post_config_fn, }; -Xilinx_desc fpga = XILINX_XC6SLX4_DESC(slave_serial, +xilinx_desc fpga = XILINX_XC6SLX4_DESC(slave_serial, (void *)&mt_ventoux_fpga_fns, 0); /* Initialize the FPGA */ diff --git a/board/xilinx/zynq/board.c b/board/xilinx/zynq/board.c index 485a5e4..c8cc2bc 100644 --- a/board/xilinx/zynq/board.c +++ b/board/xilinx/zynq/board.c @@ -14,15 +14,15 @@ DECLARE_GLOBAL_DATA_PTR; #ifdef CONFIG_FPGA -Xilinx_desc fpga; +xilinx_desc fpga; /* It can be done differently */ -Xilinx_desc fpga010 = XILINX_XC7Z010_DESC(0x10); -Xilinx_desc fpga015 = XILINX_XC7Z015_DESC(0x15); -Xilinx_desc fpga020 = XILINX_XC7Z020_DESC(0x20); -Xilinx_desc fpga030 = XILINX_XC7Z030_DESC(0x30); -Xilinx_desc fpga045 = XILINX_XC7Z045_DESC(0x45); -Xilinx_desc fpga100 = XILINX_XC7Z100_DESC(0x100); +xilinx_desc fpga010 = XILINX_XC7Z010_DESC(0x10); +xilinx_desc fpga015 = XILINX_XC7Z015_DESC(0x15); +xilinx_desc fpga020 = XILINX_XC7Z020_DESC(0x20); +xilinx_desc fpga030 = XILINX_XC7Z030_DESC(0x30); +xilinx_desc fpga045 = XILINX_XC7Z045_DESC(0x45); +xilinx_desc fpga100 = XILINX_XC7Z100_DESC(0x100); #endif int board_init(void) diff --git a/drivers/fpga/spartan2.c b/drivers/fpga/spartan2.c index bd31709..0796729 100644 --- a/drivers/fpga/spartan2.c +++ b/drivers/fpga/spartan2.c @@ -31,17 +31,17 @@ #define CONFIG_SYS_FPGA_WAIT CONFIG_SYS_HZ/100 /* 10 ms */ #endif -static int spartan2_sp_load(Xilinx_desc *desc, const void *buf, size_t bsize); -static int spartan2_sp_dump(Xilinx_desc *desc, const void *buf, size_t bsize); -/* static int spartan2_sp_info(Xilinx_desc *desc ); */ +static int spartan2_sp_load(xilinx_desc *desc, const void *buf, size_t bsize); +static int spartan2_sp_dump(xilinx_desc *desc, const void *buf, size_t bsize); +/* static int spartan2_sp_info(xilinx_desc *desc ); */ -static int spartan2_ss_load(Xilinx_desc *desc, const void *buf, size_t bsize); -static int spartan2_ss_dump(Xilinx_desc *desc, const void *buf, size_t bsize); -/* static int spartan2_ss_info(Xilinx_desc *desc ); */ +static int spartan2_ss_load(xilinx_desc *desc, const void *buf, size_t bsize); +static int spartan2_ss_dump(xilinx_desc *desc, const void *buf, size_t bsize); +/* static int spartan2_ss_info(xilinx_desc *desc ); */ /* ------------------------------------------------------------------------- */ /* Spartan-II Generic Implementation */ -int spartan2_load(Xilinx_desc *desc, const void *buf, size_t bsize) +int spartan2_load(xilinx_desc *desc, const void *buf, size_t bsize) { int ret_val = FPGA_FAIL; @@ -64,7 +64,7 @@ int spartan2_load(Xilinx_desc *desc, const void *buf, size_t bsize) return ret_val; } -int spartan2_dump(Xilinx_desc *desc, const void *buf, size_t bsize) +int spartan2_dump(xilinx_desc *desc, const void *buf, size_t bsize) { int ret_val = FPGA_FAIL; @@ -87,7 +87,7 @@ int spartan2_dump(Xilinx_desc *desc, const void *buf, size_t bsize) return ret_val; } -int spartan2_info(Xilinx_desc *desc) +int spartan2_info(xilinx_desc *desc) { return FPGA_SUCCESS; } @@ -96,7 +96,7 @@ int spartan2_info(Xilinx_desc *desc) /* ------------------------------------------------------------------------- */ /* Spartan-II Slave Parallel Generic Implementation */ -static int spartan2_sp_load(Xilinx_desc *desc, const void *buf, size_t bsize) +static int spartan2_sp_load(xilinx_desc *desc, const void *buf, size_t bsize) { int ret_val = FPGA_FAIL; /* assume the worst */ xilinx_spartan2_slave_parallel_fns *fn = desc->iface_fns; @@ -248,7 +248,7 @@ static int spartan2_sp_load(Xilinx_desc *desc, const void *buf, size_t bsize) return ret_val; } -static int spartan2_sp_dump(Xilinx_desc *desc, const void *buf, size_t bsize) +static int spartan2_sp_dump(xilinx_desc *desc, const void *buf, size_t bsize) { int ret_val = FPGA_FAIL; /* assume the worst */ xilinx_spartan2_slave_parallel_fns *fn = desc->iface_fns; @@ -296,7 +296,7 @@ static int spartan2_sp_dump(Xilinx_desc *desc, const void *buf, size_t bsize) /* ------------------------------------------------------------------------- */ -static int spartan2_ss_load(Xilinx_desc *desc, const void *buf, size_t bsize) +static int spartan2_ss_load(xilinx_desc *desc, const void *buf, size_t bsize) { int ret_val = FPGA_FAIL; /* assume the worst */ xilinx_spartan2_slave_serial_fns *fn = desc->iface_fns; @@ -439,7 +439,7 @@ static int spartan2_ss_load(Xilinx_desc *desc, const void *buf, size_t bsize) return ret_val; } -static int spartan2_ss_dump(Xilinx_desc *desc, const void *buf, size_t bsize) +static int spartan2_ss_dump(xilinx_desc *desc, const void *buf, size_t bsize) { /* Readback is only available through the Slave Parallel and */ /* boundary-scan interfaces. */ diff --git a/drivers/fpga/spartan3.c b/drivers/fpga/spartan3.c index e40abbf..1304b4c 100644 --- a/drivers/fpga/spartan3.c +++ b/drivers/fpga/spartan3.c @@ -35,17 +35,17 @@ #define CONFIG_SYS_FPGA_WAIT CONFIG_SYS_HZ/100 /* 10 ms */ #endif -static int spartan3_sp_load(Xilinx_desc *desc, const void *buf, size_t bsize); -static int spartan3_sp_dump(Xilinx_desc *desc, const void *buf, size_t bsize); -/* static int spartan3_sp_info(Xilinx_desc *desc ); */ +static int spartan3_sp_load(xilinx_desc *desc, const void *buf, size_t bsize); +static int spartan3_sp_dump(xilinx_desc *desc, const void *buf, size_t bsize); +/* static int spartan3_sp_info(xilinx_desc *desc ); */ -static int spartan3_ss_load(Xilinx_desc *desc, const void *buf, size_t bsize); -static int spartan3_ss_dump(Xilinx_desc *desc, const void *buf, size_t bsize); -/* static int spartan3_ss_info(Xilinx_desc *desc); */ +static int spartan3_ss_load(xilinx_desc *desc, const void *buf, size_t bsize); +static int spartan3_ss_dump(xilinx_desc *desc, const void *buf, size_t bsize); +/* static int spartan3_ss_info(xilinx_desc *desc); */ /* ------------------------------------------------------------------------- */ /* Spartan-II Generic Implementation */ -int spartan3_load(Xilinx_desc *desc, const void *buf, size_t bsize) +int spartan3_load(xilinx_desc *desc, const void *buf, size_t bsize) { int ret_val = FPGA_FAIL; @@ -68,7 +68,7 @@ int spartan3_load(Xilinx_desc *desc, const void *buf, size_t bsize) return ret_val; } -int spartan3_dump(Xilinx_desc *desc, const void *buf, size_t bsize) +int spartan3_dump(xilinx_desc *desc, const void *buf, size_t bsize) { int ret_val = FPGA_FAIL; @@ -91,7 +91,7 @@ int spartan3_dump(Xilinx_desc *desc, const void *buf, size_t bsize) return ret_val; } -int spartan3_info(Xilinx_desc *desc) +int spartan3_info(xilinx_desc *desc) { return FPGA_SUCCESS; } @@ -100,7 +100,7 @@ int spartan3_info(Xilinx_desc *desc) /* ------------------------------------------------------------------------- */ /* Spartan-II Slave Parallel Generic Implementation */ -static int spartan3_sp_load(Xilinx_desc *desc, const void *buf, size_t bsize) +static int spartan3_sp_load(xilinx_desc *desc, const void *buf, size_t bsize) { int ret_val = FPGA_FAIL; /* assume the worst */ xilinx_spartan3_slave_parallel_fns *fn = desc->iface_fns; @@ -254,7 +254,7 @@ static int spartan3_sp_load(Xilinx_desc *desc, const void *buf, size_t bsize) return ret_val; } -static int spartan3_sp_dump(Xilinx_desc *desc, const void *buf, size_t bsize) +static int spartan3_sp_dump(xilinx_desc *desc, const void *buf, size_t bsize) { int ret_val = FPGA_FAIL; /* assume the worst */ xilinx_spartan3_slave_parallel_fns *fn = desc->iface_fns; @@ -302,7 +302,7 @@ static int spartan3_sp_dump(Xilinx_desc *desc, const void *buf, size_t bsize) /* ------------------------------------------------------------------------- */ -static int spartan3_ss_load(Xilinx_desc *desc, const void *buf, size_t bsize) +static int spartan3_ss_load(xilinx_desc *desc, const void *buf, size_t bsize) { int ret_val = FPGA_FAIL; /* assume the worst */ xilinx_spartan3_slave_serial_fns *fn = desc->iface_fns; @@ -457,7 +457,7 @@ static int spartan3_ss_load(Xilinx_desc *desc, const void *buf, size_t bsize) return ret_val; } -static int spartan3_ss_dump(Xilinx_desc *desc, const void *buf, size_t bsize) +static int spartan3_ss_dump(xilinx_desc *desc, const void *buf, size_t bsize) { /* Readback is only available through the Slave Parallel and */ /* boundary-scan interfaces. */ diff --git a/drivers/fpga/virtex2.c b/drivers/fpga/virtex2.c index 1cd9046..a582bf2 100644 --- a/drivers/fpga/virtex2.c +++ b/drivers/fpga/virtex2.c @@ -84,13 +84,13 @@ #define CONFIG_SYS_FPGA_WAIT_CONFIG CONFIG_SYS_HZ/5 /* 200 ms */ #endif -static int virtex2_ssm_load(Xilinx_desc *desc, const void *buf, size_t bsize); -static int virtex2_ssm_dump(Xilinx_desc *desc, const void *buf, size_t bsize); +static int virtex2_ssm_load(xilinx_desc *desc, const void *buf, size_t bsize); +static int virtex2_ssm_dump(xilinx_desc *desc, const void *buf, size_t bsize); -static int virtex2_ss_load(Xilinx_desc *desc, const void *buf, size_t bsize); -static int virtex2_ss_dump(Xilinx_desc *desc, const void *buf, size_t bsize); +static int virtex2_ss_load(xilinx_desc *desc, const void *buf, size_t bsize); +static int virtex2_ss_dump(xilinx_desc *desc, const void *buf, size_t bsize); -int virtex2_load(Xilinx_desc *desc, const void *buf, size_t bsize) +int virtex2_load(xilinx_desc *desc, const void *buf, size_t bsize) { int ret_val = FPGA_FAIL; @@ -112,7 +112,7 @@ int virtex2_load(Xilinx_desc *desc, const void *buf, size_t bsize) return ret_val; } -int virtex2_dump(Xilinx_desc *desc, const void *buf, size_t bsize) +int virtex2_dump(xilinx_desc *desc, const void *buf, size_t bsize) { int ret_val = FPGA_FAIL; @@ -134,7 +134,7 @@ int virtex2_dump(Xilinx_desc *desc, const void *buf, size_t bsize) return ret_val; } -int virtex2_info(Xilinx_desc *desc) +int virtex2_info(xilinx_desc *desc) { return FPGA_SUCCESS; } @@ -153,7 +153,7 @@ int virtex2_info(Xilinx_desc *desc) * INIT_B and DONE lines. If both are high, configuration has * succeeded. Congratulations! */ -static int virtex2_ssm_load(Xilinx_desc *desc, const void *buf, size_t bsize) +static int virtex2_ssm_load(xilinx_desc *desc, const void *buf, size_t bsize) { int ret_val = FPGA_FAIL; xilinx_virtex2_slave_selectmap_fns *fn = desc->iface_fns; @@ -352,7 +352,7 @@ static int virtex2_ssm_load(Xilinx_desc *desc, const void *buf, size_t bsize) /* * Read the FPGA configuration data */ -static int virtex2_ssm_dump(Xilinx_desc *desc, const void *buf, size_t bsize) +static int virtex2_ssm_dump(xilinx_desc *desc, const void *buf, size_t bsize) { int ret_val = FPGA_FAIL; xilinx_virtex2_slave_selectmap_fns *fn = desc->iface_fns; @@ -404,13 +404,13 @@ static int virtex2_ssm_dump(Xilinx_desc *desc, const void *buf, size_t bsize) return ret_val; } -static int virtex2_ss_load(Xilinx_desc *desc, const void *buf, size_t bsize) +static int virtex2_ss_load(xilinx_desc *desc, const void *buf, size_t bsize) { printf ("%s: Slave Serial Loading is unsupported\n", __FUNCTION__); return FPGA_FAIL; } -static int virtex2_ss_dump(Xilinx_desc *desc, const void *buf, size_t bsize) +static int virtex2_ss_dump(xilinx_desc *desc, const void *buf, size_t bsize) { printf ("%s: Slave Serial Dumping is unsupported\n", __FUNCTION__); return FPGA_FAIL; diff --git a/drivers/fpga/xilinx.c b/drivers/fpga/xilinx.c index 6953535..b0e9cb3 100644 --- a/drivers/fpga/xilinx.c +++ b/drivers/fpga/xilinx.c @@ -31,7 +31,7 @@ #endif /* Local Static Functions */ -static int xilinx_validate (Xilinx_desc * desc, char *fn); +static int xilinx_validate(xilinx_desc *desc, char *fn); /* ------------------------------------------------------------------------- */ @@ -43,7 +43,7 @@ int fpga_loadbitstream(int devnum, char *fpgadata, size_t size) unsigned char *dataptr; unsigned int i; const fpga_desc *desc; - Xilinx_desc *xdesc; + xilinx_desc *xdesc; dataptr = (unsigned char *)fpgadata; /* Find out fpga_description */ @@ -94,7 +94,7 @@ int fpga_loadbitstream(int devnum, char *fpgadata, size_t size) return FPGA_FAIL; } } else { - printf("%s: Please fill correct device ID to Xilinx_desc\n", + printf("%s: Please fill correct device ID to xilinx_desc\n", __func__); } printf(" part number = \"%s\"\n", buffer); @@ -141,7 +141,7 @@ int fpga_loadbitstream(int devnum, char *fpgadata, size_t size) return fpga_load(devnum, dataptr, swapsize); } -int xilinx_load(Xilinx_desc *desc, const void *buf, size_t bsize) +int xilinx_load(xilinx_desc *desc, const void *buf, size_t bsize) { int ret_val = FPGA_FAIL; /* assume a failure */ @@ -198,7 +198,7 @@ int xilinx_load(Xilinx_desc *desc, const void *buf, size_t bsize) return ret_val; } -int xilinx_dump(Xilinx_desc *desc, const void *buf, size_t bsize) +int xilinx_dump(xilinx_desc *desc, const void *buf, size_t bsize) { int ret_val = FPGA_FAIL; /* assume a failure */ @@ -255,7 +255,7 @@ int xilinx_dump(Xilinx_desc *desc, const void *buf, size_t bsize) return ret_val; } -int xilinx_info (Xilinx_desc * desc) +int xilinx_info(xilinx_desc *desc) { int ret_val = FPGA_FAIL; @@ -369,7 +369,7 @@ int xilinx_info (Xilinx_desc * desc) /* ------------------------------------------------------------------------- */ -static int xilinx_validate (Xilinx_desc * desc, char *fn) +static int xilinx_validate(xilinx_desc *desc, char *fn) { int ret_val = false; diff --git a/drivers/fpga/zynqpl.c b/drivers/fpga/zynqpl.c index 923a158..b4d0e22 100644 --- a/drivers/fpga/zynqpl.c +++ b/drivers/fpga/zynqpl.c @@ -36,7 +36,7 @@ #define CONFIG_SYS_FPGA_PROG_TIME (CONFIG_SYS_HZ * 4) /* 4 s */ #endif -int zynq_info(Xilinx_desc *desc) +int zynq_info(xilinx_desc *desc) { return FPGA_SUCCESS; } @@ -153,7 +153,7 @@ static void *check_data(u8 *buf, size_t bsize, u32 *swap) } -int zynq_load(Xilinx_desc *desc, const void *buf, size_t bsize) +int zynq_load(xilinx_desc *desc, const void *buf, size_t bsize) { unsigned long ts; /* Timestamp */ u32 partialbit = 0; @@ -358,7 +358,7 @@ int zynq_load(Xilinx_desc *desc, const void *buf, size_t bsize) return FPGA_SUCCESS; } -int zynq_dump(Xilinx_desc *desc, const void *buf, size_t bsize) +int zynq_dump(xilinx_desc *desc, const void *buf, size_t bsize) { return FPGA_FAIL; } diff --git a/include/spartan2.h b/include/spartan2.h index a9fc68a..33b25e6 100644 --- a/include/spartan2.h +++ b/include/spartan2.h @@ -10,9 +10,9 @@ #include <xilinx.h> -int spartan2_load(Xilinx_desc *desc, const void *image, size_t size); -int spartan2_dump(Xilinx_desc *desc, const void *buf, size_t bsize); -int spartan2_info(Xilinx_desc *desc); +int spartan2_load(xilinx_desc *desc, const void *image, size_t size); +int spartan2_dump(xilinx_desc *desc, const void *buf, size_t bsize); +int spartan2_info(xilinx_desc *desc); /* Slave Parallel Implementation function table */ typedef struct { diff --git a/include/spartan3.h b/include/spartan3.h index 93ca8a4..e06b99b 100644 --- a/include/spartan3.h +++ b/include/spartan3.h @@ -10,9 +10,9 @@ #include <xilinx.h> -int spartan3_load(Xilinx_desc *desc, const void *image, size_t size); -int spartan3_dump(Xilinx_desc *desc, const void *buf, size_t bsize); -int spartan3_info(Xilinx_desc *desc); +int spartan3_load(xilinx_desc *desc, const void *image, size_t size); +int spartan3_dump(xilinx_desc *desc, const void *buf, size_t bsize); +int spartan3_info(xilinx_desc *desc); /* Slave Parallel Implementation function table */ typedef struct { diff --git a/include/virtex2.h b/include/virtex2.h index 1e6624c..dd47965 100644 --- a/include/virtex2.h +++ b/include/virtex2.h @@ -11,9 +11,9 @@ #include <xilinx.h> -int virtex2_load(Xilinx_desc *desc, const void *image, size_t size); -int virtex2_dump(Xilinx_desc *desc, const void *buf, size_t bsize); -int virtex2_info(Xilinx_desc *desc); +int virtex2_load(xilinx_desc *desc, const void *image, size_t size); +int virtex2_dump(xilinx_desc *desc, const void *buf, size_t bsize); +int virtex2_info(xilinx_desc *desc); /* * Slave SelectMap Implementation function table. diff --git a/include/xilinx.h b/include/xilinx.h index fa89fb6..5900c83 100644 --- a/include/xilinx.h +++ b/include/xilinx.h @@ -34,20 +34,20 @@ typedef enum { /* typedef Xilinx_Family */ max_xilinx_type /* insert all new types before this */ } Xilinx_Family; /* end, typedef Xilinx_Family */ -typedef struct { /* typedef Xilinx_desc */ +typedef struct { /* typedef xilinx_desc */ Xilinx_Family family; /* part type */ Xilinx_iface iface; /* interface type */ size_t size; /* bytes of data part can accept */ void *iface_fns; /* interface function table */ int cookie; /* implementation specific cookie */ char *name; /* device name in bitstream */ -} Xilinx_desc; /* end, typedef Xilinx_desc */ +} xilinx_desc; /* end, typedef xilinx_desc */ /* Generic Xilinx Functions *********************************************************************/ -extern int xilinx_load(Xilinx_desc *desc, const void *image, size_t size); -extern int xilinx_dump(Xilinx_desc *desc, const void *buf, size_t bsize); -extern int xilinx_info(Xilinx_desc *desc); +int xilinx_load(xilinx_desc *desc, const void *image, size_t size); +int xilinx_dump(xilinx_desc *desc, const void *buf, size_t bsize); +int xilinx_info(xilinx_desc *desc); /* Board specific implementation specific function types *********************************************************************/ diff --git a/include/zynqpl.h b/include/zynqpl.h index c81446e..fdee691 100644 --- a/include/zynqpl.h +++ b/include/zynqpl.h @@ -12,9 +12,9 @@ #include <xilinx.h> -extern int zynq_load(Xilinx_desc *desc, const void *image, size_t size); -extern int zynq_dump(Xilinx_desc *desc, const void *buf, size_t bsize); -extern int zynq_info(Xilinx_desc *desc); +int zynq_load(xilinx_desc *desc, const void *image, size_t size); +int zynq_dump(xilinx_desc *desc, const void *buf, size_t bsize); +int zynq_info(xilinx_desc *desc); #define XILINX_ZYNQ_7010 0x2 #define XILINX_ZYNQ_7015 0x1b |