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-rw-r--r--drivers/mmc/mmc.c16
-rw-r--r--drivers/mmc/mv_sdhci.c5
-rw-r--r--include/sdhci.h1
3 files changed, 7 insertions, 15 deletions
diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index 37ce6e8..21665ec 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -1190,7 +1190,7 @@ block_dev_desc_t *mmc_get_dev(int dev)
int mmc_init(struct mmc *mmc)
{
- int err, retry = 3;
+ int err;
if (mmc->has_init)
return 0;
@@ -1213,19 +1213,7 @@ int mmc_init(struct mmc *mmc)
mmc->part_num = 0;
/* Test for SD version 2 */
- /*
- * retry here for 3 times, as for some controller it has dynamic
- * clock gating, and only toggle out clk when the first cmd0 send
- * out, while some card strictly obey the 74 clocks rule, the interval
- * may not be sufficient between the cmd0 and this cmd8, retry to
- * fulfil the clock requirement
- */
- do {
- err = mmc_send_if_cond(mmc);
- } while (--retry > 0 && err);
-
- if (err)
- return err;
+ err = mmc_send_if_cond(mmc);
/* Now try to get the SD card's operating condition */
err = sd_send_op_cond(mmc);
diff --git a/drivers/mmc/mv_sdhci.c b/drivers/mmc/mv_sdhci.c
index f92caeb..1501974 100644
--- a/drivers/mmc/mv_sdhci.c
+++ b/drivers/mmc/mv_sdhci.c
@@ -48,7 +48,10 @@ int mv_sdh_init(u32 regbase, u32 max_clk, u32 min_clk, u32 quirks)
mv_ops.write_b = mv_sdhci_writeb;
host->ops = &mv_ops;
#endif
- host->version = sdhci_readw(host, SDHCI_HOST_VERSION);
+ if (quirks & SDHCI_QUIRK_REG32_RW)
+ host->version = sdhci_readl(host, SDHCI_HOST_VERSION - 2) >> 16;
+ else
+ host->version = sdhci_readw(host, SDHCI_HOST_VERSION);
add_sdhci(host, max_clk, min_clk);
return 0;
}
diff --git a/include/sdhci.h b/include/sdhci.h
index 0690938..800f9d9 100644
--- a/include/sdhci.h
+++ b/include/sdhci.h
@@ -215,6 +215,7 @@
* quirks
*/
#define SDHCI_QUIRK_32BIT_DMA_ADDR (1 << 0)
+#define SDHCI_QUIRK_REG32_RW (1 << 1)
/* to make gcc happy */
struct sdhci_host;