diff options
| -rw-r--r-- | MAINTAINERS | 1 | ||||
| -rwxr-xr-x | MAKEALL | 4 | ||||
| -rw-r--r-- | arch/mips/cpu/mips32/Makefile (renamed from arch/mips/cpu/Makefile) | 5 | ||||
| -rw-r--r-- | arch/mips/cpu/mips32/au1x00/Makefile | 45 | ||||
| -rw-r--r-- | arch/mips/cpu/mips32/au1x00/au1x00_eth.c (renamed from arch/mips/cpu/au1x00_eth.c) | 0 | ||||
| -rw-r--r-- | arch/mips/cpu/mips32/au1x00/au1x00_serial.c (renamed from arch/mips/cpu/au1x00_serial.c) | 0 | ||||
| -rw-r--r-- | arch/mips/cpu/mips32/au1x00/au1x00_usb_ohci.c (renamed from arch/mips/cpu/au1x00_usb_ohci.c) | 0 | ||||
| -rw-r--r-- | arch/mips/cpu/mips32/au1x00/au1x00_usb_ohci.h (renamed from arch/mips/cpu/au1x00_usb_ohci.h) | 0 | ||||
| -rw-r--r-- | arch/mips/cpu/mips32/au1x00/config.mk (renamed from board/purple/config.mk) | 12 | ||||
| -rw-r--r-- | arch/mips/cpu/mips32/cache.S (renamed from arch/mips/cpu/cache.S) | 4 | ||||
| -rw-r--r-- | arch/mips/cpu/mips32/config.mk (renamed from arch/mips/cpu/config.mk) | 15 | ||||
| -rw-r--r-- | arch/mips/cpu/mips32/cpu.c (renamed from arch/mips/cpu/cpu.c) | 0 | ||||
| -rw-r--r-- | arch/mips/cpu/mips32/incaip/Makefile (renamed from board/purple/Makefile) | 16 | ||||
| -rw-r--r-- | arch/mips/cpu/mips32/incaip/asc_serial.c (renamed from arch/mips/cpu/asc_serial.c) | 83 | ||||
| -rw-r--r-- | arch/mips/cpu/mips32/incaip/asc_serial.h (renamed from arch/mips/cpu/asc_serial.h) | 0 | ||||
| -rw-r--r-- | arch/mips/cpu/mips32/incaip/config.mk | 24 | ||||
| -rw-r--r-- | arch/mips/cpu/mips32/incaip/incaip_clock.c (renamed from arch/mips/cpu/incaip_clock.c) | 0 | ||||
| -rw-r--r-- | arch/mips/cpu/mips32/incaip/incaip_wdt.S (renamed from arch/mips/cpu/incaip_wdt.S) | 0 | ||||
| -rw-r--r-- | arch/mips/cpu/mips32/interrupts.c (renamed from arch/mips/cpu/interrupts.c) | 0 | ||||
| -rw-r--r-- | arch/mips/cpu/mips32/start.S (renamed from arch/mips/cpu/start.S) | 32 | ||||
| -rw-r--r-- | arch/mips/include/asm/inca-ip.h | 10 | ||||
| -rw-r--r-- | arch/mips/lib/board.c | 10 | ||||
| -rw-r--r-- | board/purple/flash.c | 595 | ||||
| -rw-r--r-- | board/purple/lowlevel_init.S | 36 | ||||
| -rw-r--r-- | board/purple/purple.c | 284 | ||||
| -rw-r--r-- | board/purple/sconsole.c | 125 | ||||
| -rw-r--r-- | board/purple/sconsole.h | 46 | ||||
| -rw-r--r-- | board/purple/u-boot.lds | 75 | ||||
| -rw-r--r-- | boards.cfg | 51 | ||||
| -rw-r--r-- | doc/README.Purple | 84 | ||||
| -rw-r--r-- | include/configs/purple.h | 173 |
31 files changed, 113 insertions, 1617 deletions
diff --git a/MAINTAINERS b/MAINTAINERS index 4756f14d..1d7e1f4 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -919,7 +919,6 @@ Daniel Engström <daniel@omicron.se> Wolfgang Denk <wd@denx.de> incaip MIPS32 4Kc - purple MIPS64 5Kc Thomas Lange <thomas@corelatus.se> dbau1x00 MIPS32 Au1000 @@ -507,9 +507,7 @@ LIST_mips4kc=" \ vct_premium_onenand_small \ " -LIST_mips5kc=" \ - purple \ -" +LIST_mips5kc="" LIST_au1xx0=" \ dbau1000 \ diff --git a/arch/mips/cpu/Makefile b/arch/mips/cpu/mips32/Makefile index 06df8d1..e315c1b 100644 --- a/arch/mips/cpu/Makefile +++ b/arch/mips/cpu/mips32/Makefile @@ -29,11 +29,6 @@ START = start.o SOBJS-y = cache.o COBJS-y = cpu.o interrupts.o -SOBJS-$(CONFIG_INCA_IP) += incaip_wdt.o -COBJS-$(CONFIG_INCA_IP) += asc_serial.o incaip_clock.o -COBJS-$(CONFIG_PURPLE) += asc_serial.o -COBJS-$(CONFIG_SOC_AU1X00) += au1x00_eth.o au1x00_serial.o au1x00_usb_ohci.o - SRCS := $(START:.o=.S) $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c) OBJS := $(addprefix $(obj),$(SOBJS-y) $(COBJS-y)) START := $(addprefix $(obj),$(START)) diff --git a/arch/mips/cpu/mips32/au1x00/Makefile b/arch/mips/cpu/mips32/au1x00/Makefile new file mode 100644 index 0000000..dc58475 --- /dev/null +++ b/arch/mips/cpu/mips32/au1x00/Makefile @@ -0,0 +1,45 @@ +# +# (C) Copyright 2011 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(SOC).o + +COBJS = au1x00_eth.o au1x00_serial.o au1x00_usb_ohci.o + +SRCS := $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) + +all: $(obj).depend $(LIB) + +$(LIB): $(OBJS) + $(call cmd_link_o_target, $(OBJS)) + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/arch/mips/cpu/au1x00_eth.c b/arch/mips/cpu/mips32/au1x00/au1x00_eth.c index c510799..c510799 100644 --- a/arch/mips/cpu/au1x00_eth.c +++ b/arch/mips/cpu/mips32/au1x00/au1x00_eth.c diff --git a/arch/mips/cpu/au1x00_serial.c b/arch/mips/cpu/mips32/au1x00/au1x00_serial.c index c25ba5a..c25ba5a 100644 --- a/arch/mips/cpu/au1x00_serial.c +++ b/arch/mips/cpu/mips32/au1x00/au1x00_serial.c diff --git a/arch/mips/cpu/au1x00_usb_ohci.c b/arch/mips/cpu/mips32/au1x00/au1x00_usb_ohci.c index 0bc2305..0bc2305 100644 --- a/arch/mips/cpu/au1x00_usb_ohci.c +++ b/arch/mips/cpu/mips32/au1x00/au1x00_usb_ohci.c diff --git a/arch/mips/cpu/au1x00_usb_ohci.h b/arch/mips/cpu/mips32/au1x00/au1x00_usb_ohci.h index bb9f351..bb9f351 100644 --- a/arch/mips/cpu/au1x00_usb_ohci.h +++ b/arch/mips/cpu/mips32/au1x00/au1x00_usb_ohci.h diff --git a/board/purple/config.mk b/arch/mips/cpu/mips32/au1x00/config.mk index 404c3fb..568f333 100644 --- a/board/purple/config.mk +++ b/arch/mips/cpu/mips32/au1x00/config.mk @@ -1,5 +1,5 @@ # -# (C) Copyright 2003 +# (C) Copyright 2011 # Wolfgang Denk, DENX Software Engineering, wd@denx.de. # # See file CREDITS for list of people who contributed to this @@ -21,12 +21,4 @@ # MA 02111-1307 USA # -# -# Purple board with MIPS 5Kc CPU core -# - -# ROM version -CONFIG_SYS_TEXT_BASE = 0xB0000000 - -# RAM version -#CONFIG_SYS_TEXT_BASE = 0x80100000 +PLATFORM_CPPFLAGS += -mtune=4kc diff --git a/arch/mips/cpu/cache.S b/arch/mips/cpu/mips32/cache.S index 4b30c89..2965938 100644 --- a/arch/mips/cpu/cache.S +++ b/arch/mips/cpu/mips32/cache.S @@ -311,11 +311,7 @@ LEAF(dcache_enable) * RETURNS: N/A * */ -#if defined(CONFIG_PURPLE) -# define CACHE_LOCK_SIZE (CONFIG_SYS_DCACHE_SIZE/2) -#else # define CACHE_LOCK_SIZE (CONFIG_SYS_DCACHE_SIZE) -#endif .globl mips_cache_lock .ent mips_cache_lock mips_cache_lock: diff --git a/arch/mips/cpu/config.mk b/arch/mips/cpu/mips32/config.mk index a173c54..4d1b273 100644 --- a/arch/mips/cpu/config.mk +++ b/arch/mips/cpu/mips32/config.mk @@ -20,13 +20,14 @@ # Foundation, Inc., 59 Temple Place, Suite 330, Boston, # MA 02111-1307 USA # -v=$(shell $(AS) --version | grep 'GNU assembler' | egrep -o '2\.[0-9\.]+' | cut -d. -f2) -MIPSFLAGS:=$(shell \ -if [ "$v" -lt "14" ]; then \ - echo "-mcpu=4kc"; \ -else \ - echo "-march=4kc -mtune=4kc"; \ -fi) + +# +# Default optimization level for MIPS32 +# +# Note: Toolchains with binutils prior to v2.16 +# are no longer supported by U-Boot MIPS tree! +# +MIPSFLAGS = -march=mips32r2 ifneq (,$(findstring 4KCle,$(CROSS_COMPILE))) ENDIANNESS = -EL diff --git a/arch/mips/cpu/cpu.c b/arch/mips/cpu/mips32/cpu.c index 3ae397c..3ae397c 100644 --- a/arch/mips/cpu/cpu.c +++ b/arch/mips/cpu/mips32/cpu.c diff --git a/board/purple/Makefile b/arch/mips/cpu/mips32/incaip/Makefile index 10e566d..9c2b1aa 100644 --- a/board/purple/Makefile +++ b/arch/mips/cpu/mips32/incaip/Makefile @@ -1,6 +1,5 @@ - # -# (C) Copyright 2003-2006 +# (C) Copyright 2011 # Wolfgang Denk, DENX Software Engineering, wd@denx.de. # # See file CREDITS for list of people who contributed to this @@ -24,16 +23,17 @@ include $(TOPDIR)/config.mk -LIB = $(obj)lib$(BOARD).o +LIB = $(obj)lib$(SOC).o -COBJS = $(BOARD).o flash.o sconsole.o -SOBJS = lowlevel_init.o +SOBJS = incaip_wdt.o +COBJS = incaip_clock.o asc_serial.o SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) -OBJS := $(addprefix $(obj),$(COBJS)) -SOBJS := $(addprefix $(obj),$(SOBJS)) +OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) + +all: $(obj).depend $(LIB) -$(LIB): $(obj).depend $(OBJS) $(SOBJS) +$(LIB): $(OBJS) $(call cmd_link_o_target, $(OBJS)) ######################################################################### diff --git a/arch/mips/cpu/asc_serial.c b/arch/mips/cpu/mips32/incaip/asc_serial.c index be686c2..7239804 100644 --- a/arch/mips/cpu/asc_serial.c +++ b/arch/mips/cpu/mips32/incaip/asc_serial.c @@ -3,47 +3,10 @@ */ #include <config.h> - -#ifdef CONFIG_PURPLE -#define serial_init asc_serial_init -#define serial_putc asc_serial_putc -#define serial_puts asc_serial_puts -#define serial_getc asc_serial_getc -#define serial_tstc asc_serial_tstc -#define serial_setbrg asc_serial_setbrg -#endif - #include <common.h> #include <asm/inca-ip.h> #include "asc_serial.h" -#ifdef CONFIG_PURPLE - -#undef ASC_FIFO_PRESENT -#define TOUT_LOOP 100000 - -/* Set base address for second FPI interrupt control register bank */ -#define SFPI_INTCON_BASEADDR 0xBF0F0000 - -/* Register offset from base address */ -#define FBS_ISR 0x00000000 /* Interrupt status register */ -#define FBS_IMR 0x00000008 /* Interrupt mask register */ -#define FBS_IDIS 0x00000010 /* Interrupt disable register */ - -/* Interrupt status register bits */ -#define FBS_ISR_AT 0x00000040 /* ASC transmit interrupt */ -#define FBS_ISR_AR 0x00000020 /* ASC receive interrupt */ -#define FBS_ISR_AE 0x00000010 /* ASC error interrupt */ -#define FBS_ISR_AB 0x00000008 /* ASC transmit buffer interrupt */ -#define FBS_ISR_AS 0x00000004 /* ASC start of autobaud detection interrupt */ -#define FBS_ISR_AF 0x00000002 /* ASC end of autobaud detection interrupt */ - -#else - -#define ASC_FIFO_PRESENT - -#endif - #define SET_BIT(reg, mask) reg |= (mask) #define CLEAR_BIT(reg, mask) reg &= (~mask) @@ -71,10 +34,8 @@ static volatile incaAsc_t *pAsc = (incaAsc_t *)INCA_IP_ASC; int serial_init (void) { -#ifdef CONFIG_INCA_IP /* we have to set PMU.EN13 bit to enable an ASC device*/ INCAASC_PMU_ENABLE(13); -#endif /* and we have to set CLC register*/ CLEAR_BIT(pAsc->asc_clc, ASCCLC_DISS); @@ -86,7 +47,6 @@ int serial_init (void) /* select input port */ pAsc->asc_pisel = (CONSOLE_TTY & 0x1); -#ifdef ASC_FIFO_PRESENT /* TXFIFO's filling level */ SET_BITFIELD(pAsc->asc_txfcon, ASCTXFCON_TXFITLMASK, ASCTXFCON_TXFITLOFF, INCAASC_TXFIFO_FL); @@ -98,25 +58,20 @@ int serial_init (void) ASCRXFCON_RXFITLOFF, INCAASC_RXFIFO_FL); /* enable RXFIFO */ SET_BIT(pAsc->asc_rxfcon, ASCRXFCON_RXFEN); -#endif /* enable error signals */ SET_BIT(pAsc->asc_con, ASCCON_FEN); SET_BIT(pAsc->asc_con, ASCCON_OEN); -#ifdef CONFIG_INCA_IP /* acknowledge ASC interrupts */ ASC_INTERRUPTS_CLEAR(INCAASC_IRQ_LINE_ALL); /* disable ASC interrupts */ ASC_INTERRUPTS_DISABLE(INCAASC_IRQ_LINE_ALL); -#endif -#ifdef ASC_FIFO_PRESENT /* set FIFOs into the transparent mode */ SET_BIT(pAsc->asc_txfcon, ASCTXFCON_TXTMEN); SET_BIT(pAsc->asc_rxfcon, ASCRXFCON_RXTMEN); -#endif /* set baud rate */ serial_setbrg(); @@ -132,11 +87,7 @@ void serial_setbrg (void) ulong uiReloadValue, fdv; ulong f_ASC; -#ifdef CONFIG_INCA_IP f_ASC = incaip_get_fpiclk(); -#else - f_ASC = ASC_CLOCK_RATE; -#endif #ifndef INCAASC_USE_FDV fdv = 2; @@ -261,15 +212,10 @@ static int serial_setopt (void) void serial_putc (const char c) { -#ifdef ASC_FIFO_PRESENT uint txFl = 0; -#else - uint timeout = 0; -#endif if (c == '\n') serial_putc ('\r'); -#ifdef ASC_FIFO_PRESENT /* check do we have a free space in the TX FIFO */ /* get current filling level */ do @@ -277,25 +223,9 @@ void serial_putc (const char c) txFl = ( pAsc->asc_fstat & ASCFSTAT_TXFFLMASK ) >> ASCFSTAT_TXFFLOFF; } while ( txFl == INCAASC_TXFIFO_FULL ); -#else - - while(!(*(volatile unsigned long*)(SFPI_INTCON_BASEADDR + FBS_ISR) & - FBS_ISR_AB)) - { - if (timeout++ > TOUT_LOOP) - { - break; - } - } -#endif pAsc->asc_tbuf = c; /* write char to Transmit Buffer Register */ -#ifndef ASC_FIFO_PRESENT - *(volatile unsigned long*)(SFPI_INTCON_BASEADDR + FBS_ISR) = FBS_ISR_AB | - FBS_ISR_AT; -#endif - /* check for errors */ if ( pAsc->asc_con & ASCCON_OE ) { @@ -324,10 +254,6 @@ int serial_getc (void) c = (char)(pAsc->asc_rbuf & symbol_mask); -#ifndef ASC_FIFO_PRESENT - *(volatile unsigned long*)(SFPI_INTCON_BASEADDR + FBS_ISR) = FBS_ISR_AR; -#endif - return c; } @@ -335,19 +261,10 @@ int serial_tstc (void) { int res = 1; -#ifdef ASC_FIFO_PRESENT if ( (pAsc->asc_fstat & ASCFSTAT_RXFFLMASK) == 0 ) { res = 0; } -#else - if (!(*(volatile unsigned long*)(SFPI_INTCON_BASEADDR + FBS_ISR) & - FBS_ISR_AR)) - - { - res = 0; - } -#endif else if ( pAsc->asc_con & ASCCON_FE ) { SET_BIT(pAsc->asc_whbcon, ASCWHBCON_CLRFE); diff --git a/arch/mips/cpu/asc_serial.h b/arch/mips/cpu/mips32/incaip/asc_serial.h index 7ffdcfa..7ffdcfa 100644 --- a/arch/mips/cpu/asc_serial.h +++ b/arch/mips/cpu/mips32/incaip/asc_serial.h diff --git a/arch/mips/cpu/mips32/incaip/config.mk b/arch/mips/cpu/mips32/incaip/config.mk new file mode 100644 index 0000000..568f333 --- /dev/null +++ b/arch/mips/cpu/mips32/incaip/config.mk @@ -0,0 +1,24 @@ +# +# (C) Copyright 2011 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +PLATFORM_CPPFLAGS += -mtune=4kc diff --git a/arch/mips/cpu/incaip_clock.c b/arch/mips/cpu/mips32/incaip/incaip_clock.c index b65dfe0..b65dfe0 100644 --- a/arch/mips/cpu/incaip_clock.c +++ b/arch/mips/cpu/mips32/incaip/incaip_clock.c diff --git a/arch/mips/cpu/incaip_wdt.S b/arch/mips/cpu/mips32/incaip/incaip_wdt.S index 3ade3cd..3ade3cd 100644 --- a/arch/mips/cpu/incaip_wdt.S +++ b/arch/mips/cpu/mips32/incaip/incaip_wdt.S diff --git a/arch/mips/cpu/interrupts.c b/arch/mips/cpu/mips32/interrupts.c index 87f7a9f..87f7a9f 100644 --- a/arch/mips/cpu/interrupts.c +++ b/arch/mips/cpu/mips32/interrupts.c diff --git a/arch/mips/cpu/start.S b/arch/mips/cpu/mips32/start.S index d6bcef6..e661d46 100644 --- a/arch/mips/cpu/start.S +++ b/arch/mips/cpu/mips32/start.S @@ -67,9 +67,6 @@ _start: #if defined(CONFIG_INCA_IP) .word INFINEON_EBU_BOOTCFG /* EBU init code, fetched during booting */ .word 0x00000000 /* phase of the flash */ -#elif defined(CONFIG_PURPLE) - .word INFINEON_EBU_BOOTCFG /* EBU init code, fetched during booting */ - .word INFINEON_EBU_BOOTCFG /* EBU init code, fetched during booting */ #else RVECENT(romReserved,2) #endif @@ -203,30 +200,6 @@ _start: * 128 * 8 == 1024 == 0x400 * so this is address R_VEC+0x400 == 0xbfc00400 */ -#ifdef CONFIG_PURPLE -/* 0xbfc00400 */ - .word 0xdc870000 - .word 0xfca70000 - .word 0x20840008 - .word 0x20a50008 - .word 0x20c6ffff - .word 0x14c0fffa - .word 0x00000000 - .word 0x03e00008 - .word 0x00000000 - .word 0x00000000 -/* 0xbfc00428 */ - .word 0xdc870000 - .word 0xfca70000 - .word 0x20840008 - .word 0x20a50008 - .word 0x20c6ffff - .word 0x14c0fffa - .word 0x00000000 - .word 0x03e00008 - .word 0x00000000 - .word 0x00000000 -#endif /* CONFIG_PURPLE */ .align 4 reset: @@ -337,17 +310,12 @@ relocate_code: move a0, t1 /* a0 <-- destination addr */ sub a1, t2, t0 /* a1 <-- size */ - /* On the purple board we copy the code earlier in a special way - * in order to solve flash problems - */ -#ifndef CONFIG_PURPLE 1: lw t3, 0(t0) sw t3, 0(t1) addu t0, 4 ble t0, t2, 1b addu t1, 4 /* delay slot */ -#endif /* If caches were enabled, we would have to flush them here. */ diff --git a/arch/mips/include/asm/inca-ip.h b/arch/mips/include/asm/inca-ip.h index e787a1d..26f1002 100644 --- a/arch/mips/include/asm/inca-ip.h +++ b/arch/mips/include/asm/inca-ip.h @@ -894,12 +894,7 @@ /* Module : EBU register address and bits */ /***********************************************************************/ -#if defined(CONFIG_INCA_IP) #define INCA_IP_EBU (0xB8000200) -#elif defined(CONFIG_PURPLE) -#define INCA_IP_EBU (0xB800D800) -#endif - /***********************************************************************/ @@ -1495,12 +1490,7 @@ If set and clear bit are written concurrently with 1, the associated bit is not /* Module : ASC register address and bits */ /***********************************************************************/ -#if defined(CONFIG_INCA_IP) #define INCA_IP_ASC (0xB8000400) -#elif defined(CONFIG_PURPLE) -#define INCA_IP_ASC (0xBE500000) -#endif - /***********************************************************************/ diff --git a/arch/mips/lib/board.c b/arch/mips/lib/board.c index f317124..623c4d7 100644 --- a/arch/mips/lib/board.c +++ b/arch/mips/lib/board.c @@ -162,9 +162,6 @@ void board_init_f(ulong bootflag) init_fnc_t **init_fnc_ptr; ulong addr, addr_sp, len = (ulong)&uboot_end - CONFIG_SYS_MONITOR_BASE; ulong *s; -#ifdef CONFIG_PURPLE - void copy_code (ulong); -#endif /* Pointer is writable since we allocated a register for it. */ @@ -253,13 +250,6 @@ void board_init_f(ulong bootflag) memcpy (id, (void *)gd, sizeof (gd_t)); - /* On the purple board we copy the code in a special way - * in order to solve flash problems - */ -#ifdef CONFIG_PURPLE - copy_code(addr); -#endif - relocate_code (addr_sp, id, addr); /* NOTREACHED - relocate_code() does not return */ diff --git a/board/purple/flash.c b/board/purple/flash.c deleted file mode 100644 index 5cee35e..0000000 --- a/board/purple/flash.c +++ /dev/null @@ -1,595 +0,0 @@ -/* - * (C) Copyright 2003 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <common.h> -#include <asm/inca-ip.h> - -flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */ - -typedef unsigned long FLASH_PORT_WIDTH; -typedef volatile unsigned long FLASH_PORT_WIDTHV; - -#define FLASH_ID_MASK 0xFFFFFFFF - -#define FPW FLASH_PORT_WIDTH -#define FPWV FLASH_PORT_WIDTHV - -#define ORMASK(size) ((-size) & OR_AM_MSK) - -#define FLASH29_REG_ADRS(reg) ((FPWV *)PHYS_FLASH_1 + (reg)) - -/* FLASH29 command register addresses */ - -#define FLASH29_REG_FIRST_CYCLE FLASH29_REG_ADRS (0x1555) -#define FLASH29_REG_SECOND_CYCLE FLASH29_REG_ADRS (0x2aaa) -#define FLASH29_REG_THIRD_CYCLE FLASH29_REG_ADRS (0x3555) -#define FLASH29_REG_FOURTH_CYCLE FLASH29_REG_ADRS (0x4555) -#define FLASH29_REG_FIFTH_CYCLE FLASH29_REG_ADRS (0x5aaa) -#define FLASH29_REG_SIXTH_CYCLE FLASH29_REG_ADRS (0x6555) - -/* FLASH29 command definitions */ - -#define FLASH29_CMD_FIRST 0xaaaaaaaa -#define FLASH29_CMD_SECOND 0x55555555 -#define FLASH29_CMD_FOURTH 0xaaaaaaaa -#define FLASH29_CMD_FIFTH 0x55555555 -#define FLASH29_CMD_SIXTH 0x10101010 - -#define FLASH29_CMD_SECTOR 0x30303030 -#define FLASH29_CMD_PROGRAM 0xa0a0a0a0 -#define FLASH29_CMD_CHIP_ERASE 0x80808080 -#define FLASH29_CMD_READ_RESET 0xf0f0f0f0 -#define FLASH29_CMD_AUTOSELECT 0x90909090 -#define FLASH29_CMD_READ 0x70707070 - -#define IN_RAM_CMD_READ 0x1 -#define IN_RAM_CMD_WRITE 0x2 - -#define FLASH_WRITE_CMD ((ulong)(flash_write_cmd) & 0x7)+0xbf008000 -#define FLASH_READ_CMD ((ulong)(flash_read_cmd) & 0x7)+0xbf008000 - -typedef void (*FUNCPTR_CP)(ulong *source, ulong *destination, ulong nlongs); -typedef void (*FUNCPTR_RD)(int cmd, FPWV * pFA, char * string, int strLen); -typedef void (*FUNCPTR_WR)(int cmd, FPWV * pFA, FPW value); - -static ulong flash_get_size(FPWV *addr, flash_info_t *info); -static int write_word(flash_info_t *info, FPWV *dest, FPW data); -static void flash_get_offsets(ulong base, flash_info_t *info); -static flash_info_t *flash_get_info(ulong base); - -static void load_cmd(ulong cmd); -static ulong in_ram_cmd = 0; - - -/****************************************************************************** -* -* Don't change the program architecture -* This architecture assure the program -* can be relocated to scratch ram -*/ -static void flash_read_cmd(int cmd, FPWV * pFA, char * string, int strLen) -{ - int i,j; - FPW temp,temp1; - FPWV *str; - - str = (FPWV *)string; - - j= strLen/4; - - if(cmd == FLASH29_CMD_AUTOSELECT) - { - *(FLASH29_REG_FIRST_CYCLE) = FLASH29_CMD_FIRST; - *(FLASH29_REG_SECOND_CYCLE) = FLASH29_CMD_SECOND; - *(FLASH29_REG_THIRD_CYCLE) = FLASH29_CMD_AUTOSELECT; - } - - if(cmd == FLASH29_CMD_READ) - { - i = 0; - while(i<j) - { - temp = *pFA++; - temp1 = *(int *)0xa0000000; - *(int *)0xbf0081f8 = temp1 + temp; - *str++ = temp; - i++; - } - } - - if(cmd == FLASH29_CMD_READ_RESET) - { - *(FLASH29_REG_FIRST_CYCLE) = FLASH29_CMD_FIRST; - *(FLASH29_REG_SECOND_CYCLE) = FLASH29_CMD_SECOND; - *(FLASH29_REG_THIRD_CYCLE) = FLASH29_CMD_READ_RESET; - } - - *(int *)0xbf0081f8 = *(int *)0xa0000000; /* dummy read switch back to sdram interface */ -} - -/****************************************************************************** -* -* Don't change the program architecture -* This architecture assure the program -* can be relocated to scratch ram -*/ -static void flash_write_cmd(int cmd, FPWV * pFA, FPW value) -{ - *(FLASH29_REG_FIRST_CYCLE) = FLASH29_CMD_FIRST; - *(FLASH29_REG_SECOND_CYCLE) = FLASH29_CMD_SECOND; - - if (cmd == FLASH29_CMD_SECTOR) - { - *(FLASH29_REG_THIRD_CYCLE) = FLASH29_CMD_CHIP_ERASE; - *(FLASH29_REG_FOURTH_CYCLE) = FLASH29_CMD_FOURTH; - *(FLASH29_REG_FIFTH_CYCLE) = FLASH29_CMD_FIFTH; - *pFA = FLASH29_CMD_SECTOR; - } - - if (cmd == FLASH29_CMD_SIXTH) - { - *(FLASH29_REG_THIRD_CYCLE) = FLASH29_CMD_CHIP_ERASE; - *(FLASH29_REG_FOURTH_CYCLE) = FLASH29_CMD_FOURTH; - *(FLASH29_REG_FIFTH_CYCLE) = FLASH29_CMD_FIFTH; - *(FLASH29_REG_SIXTH_CYCLE) = FLASH29_CMD_SIXTH; - } - - if (cmd == FLASH29_CMD_PROGRAM) - { - *(FLASH29_REG_THIRD_CYCLE) = FLASH29_CMD_PROGRAM; - *pFA = value; - } - - if (cmd == FLASH29_CMD_READ_RESET) - { - *(FLASH29_REG_THIRD_CYCLE) = FLASH29_CMD_READ_RESET; - } - - *(int *)0xbf0081f8 = *(int *)0xa0000000; /* dummy read switch back to sdram interface */ -} - -static void load_cmd(ulong cmd) -{ - ulong *src; - ulong *dst; - FUNCPTR_CP absEntry; - ulong func; - - if (in_ram_cmd & cmd) return; - - if (cmd == IN_RAM_CMD_READ) - { - func = (ulong)flash_read_cmd; - } - else - { - func = (ulong)flash_write_cmd; - } - - src = (ulong *)(func & 0xfffffff8); - dst = (ulong *)0xbf008000; - absEntry = (FUNCPTR_CP)(0xbf0081d0); - absEntry(src,dst,0x38); - - in_ram_cmd = cmd; -} - -/*----------------------------------------------------------------------- - * flash_init() - * - * sets up flash_info and returns size of FLASH (bytes) - */ -unsigned long flash_init (void) -{ - unsigned long size = 0; - int i; - - load_cmd(IN_RAM_CMD_READ); - - /* Init: no FLASHes known */ - for (i=0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) { - ulong flashbase = PHYS_FLASH_1; - ulong * buscon = (ulong *) INCA_IP_EBU_EBU_BUSCON0; - - /* Disable write protection */ - *buscon &= ~INCA_IP_EBU_EBU_BUSCON1_WRDIS; - -#if 1 - memset(&flash_info[i], 0, sizeof(flash_info_t)); -#endif - - flash_info[i].size = - flash_get_size((FPW *)flashbase, &flash_info[i]); - - if (flash_info[i].flash_id == FLASH_UNKNOWN) { - printf ("## Unknown FLASH on Bank %d - Size = 0x%08lx\n", - i, flash_info[i].size); - } - - size += flash_info[i].size; - } - -#if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE - /* monitor protection ON by default */ - flash_protect(FLAG_PROTECT_SET, - CONFIG_SYS_MONITOR_BASE, - CONFIG_SYS_MONITOR_BASE+monitor_flash_len-1, - flash_get_info(CONFIG_SYS_MONITOR_BASE)); -#endif - -#ifdef CONFIG_ENV_IS_IN_FLASH - /* ENV protection ON by default */ - flash_protect(FLAG_PROTECT_SET, - CONFIG_ENV_ADDR, - CONFIG_ENV_ADDR+CONFIG_ENV_SIZE-1, - flash_get_info(CONFIG_ENV_ADDR)); -#endif - - return size; -} - -/*----------------------------------------------------------------------- - */ -static void flash_get_offsets (ulong base, flash_info_t *info) -{ - int i; - - if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_AMD - && (info->flash_id & FLASH_TYPEMASK) == FLASH_AM160B) { - - int bootsect_size[4]; /* number of bytes/boot sector */ - int sect_size; /* number of bytes/regular sector */ - - bootsect_size[0] = 0x00008000; - bootsect_size[1] = 0x00004000; - bootsect_size[2] = 0x00004000; - bootsect_size[3] = 0x00010000; - sect_size = 0x00020000; - - /* set sector offsets for bottom boot block type */ - for (i = 0; i < info->sector_count; i++) { - info->start[i] = base; - base += i < 4 ? bootsect_size[i] : sect_size; - } - } -} - -/*----------------------------------------------------------------------- - */ - -static flash_info_t *flash_get_info(ulong base) -{ - int i; - flash_info_t * info; - - for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i ++) { - info = & flash_info[i]; - if (info->start[0] <= base && base < info->start[0] + info->size) - break; - } - - return i == CONFIG_SYS_MAX_FLASH_BANKS ? 0 : info; -} - -/*----------------------------------------------------------------------- - */ - -void flash_print_info (flash_info_t *info) -{ - int i; - uchar *boottype; - uchar *bootletter; - char *fmt; - uchar botbootletter[] = "B"; - uchar topbootletter[] = "T"; - uchar botboottype[] = "bottom boot sector"; - uchar topboottype[] = "top boot sector"; - - if (info->flash_id == FLASH_UNKNOWN) { - printf ("missing or unknown FLASH type\n"); - return; - } - - switch (info->flash_id & FLASH_VENDMASK) { - case FLASH_MAN_AMD: printf ("AMD "); break; - case FLASH_MAN_BM: printf ("BRIGHT MICRO "); break; - case FLASH_MAN_FUJ: printf ("FUJITSU "); break; - case FLASH_MAN_SST: printf ("SST "); break; - case FLASH_MAN_STM: printf ("STM "); break; - case FLASH_MAN_INTEL: printf ("INTEL "); break; - default: printf ("Unknown Vendor "); break; - } - - /* check for top or bottom boot, if it applies */ - if (info->flash_id & FLASH_BTYPE) { - boottype = botboottype; - bootletter = botbootletter; - } - else { - boottype = topboottype; - bootletter = topbootletter; - } - - switch (info->flash_id & FLASH_TYPEMASK) { - case FLASH_AM160B: - fmt = "29LV160B%s (16 Mbit, %s)\n"; - break; - case FLASH_28F800C3B: - case FLASH_28F800C3T: - fmt = "28F800C3%s (8 Mbit, %s)\n"; - break; - case FLASH_INTEL800B: - case FLASH_INTEL800T: - fmt = "28F800B3%s (8 Mbit, %s)\n"; - break; - case FLASH_28F160C3B: - case FLASH_28F160C3T: - fmt = "28F160C3%s (16 Mbit, %s)\n"; - break; - case FLASH_INTEL160B: - case FLASH_INTEL160T: - fmt = "28F160B3%s (16 Mbit, %s)\n"; - break; - case FLASH_28F320C3B: - case FLASH_28F320C3T: - fmt = "28F320C3%s (32 Mbit, %s)\n"; - break; - case FLASH_INTEL320B: - case FLASH_INTEL320T: - fmt = "28F320B3%s (32 Mbit, %s)\n"; - break; - case FLASH_28F640C3B: - case FLASH_28F640C3T: - fmt = "28F640C3%s (64 Mbit, %s)\n"; - break; - case FLASH_INTEL640B: - case FLASH_INTEL640T: - fmt = "28F640B3%s (64 Mbit, %s)\n"; - break; - default: - fmt = "Unknown Chip Type\n"; - break; - } - - printf (fmt, bootletter, boottype); - - printf (" Size: %ld MB in %d Sectors\n", - info->size >> 20, - info->sector_count); - - printf (" Sector Start Addresses:"); - - for (i=0; i<info->sector_count; ++i) { - if ((i % 5) == 0) { - printf ("\n "); - } - - printf (" %08lX%s", info->start[i], - info->protect[i] ? " (RO)" : " "); - } - - printf ("\n"); -} - -/*----------------------------------------------------------------------- - */ - -/* - * The following code cannot be run from FLASH! - */ - -ulong flash_get_size (FPWV *addr, flash_info_t *info) -{ - FUNCPTR_RD absEntry; - FPW retValue; - int flag; - - load_cmd(IN_RAM_CMD_READ); - absEntry = (FUNCPTR_RD)FLASH_READ_CMD; - - flag = disable_interrupts(); - absEntry(FLASH29_CMD_AUTOSELECT,0,0,0); - if (flag) enable_interrupts(); - - udelay(100); - - flag = disable_interrupts(); - absEntry(FLASH29_CMD_READ, addr + 1, (char *)&retValue, sizeof(retValue)); - absEntry(FLASH29_CMD_READ_RESET,0,0,0); - if (flag) enable_interrupts(); - - udelay(100); - - switch (retValue) { - - case (FPW)AMD_ID_LV160B: - info->flash_id += FLASH_AM160B; - info->sector_count = 35; - info->size = 0x00400000; - break; /* => 8 or 16 MB */ - - default: - info->flash_id = FLASH_UNKNOWN; - info->sector_count = 0; - info->size = 0; - return (0); /* => no or unknown flash */ - } - - flash_get_offsets((ulong)addr, info); - - return (info->size); -} - -/*----------------------------------------------------------------------- - */ - -int flash_erase (flash_info_t *info, int s_first, int s_last) -{ - FPWV *addr; - int flag, prot, sect; - ulong start, now, last; - FUNCPTR_WR absEntry; - - load_cmd(IN_RAM_CMD_WRITE); - absEntry = (FUNCPTR_WR)FLASH_WRITE_CMD; - - if ((s_first < 0) || (s_first > s_last)) { - if (info->flash_id == FLASH_UNKNOWN) { - printf ("- missing\n"); - } else { - printf ("- no sectors to erase\n"); - } - return 1; - } - - switch (info->flash_id & FLASH_TYPEMASK) { - case FLASH_AM160B: - break; - case FLASH_UNKNOWN: - default: - printf ("Can't erase unknown flash type %08lx - aborted\n", - info->flash_id); - return 1; - } - - prot = 0; - for (sect=s_first; sect<=s_last; ++sect) { - if (info->protect[sect]) { - prot++; - } - } - - if (prot) { - printf ("- Warning: %d protected sectors will not be erased!\n", - prot); - } else { - printf ("\n"); - } - - last = get_timer(0); - - /* Start erase on unprotected sectors */ - for (sect = s_first; sect<=s_last; sect++) { - - if (info->protect[sect] != 0) /* protected, skip it */ - continue; - - /* Disable interrupts which might cause a timeout here */ - flag = disable_interrupts(); - - addr = (FPWV *)(info->start[sect]); - absEntry(FLASH29_CMD_SECTOR, addr, 0); - - /* re-enable interrupts if necessary */ - if (flag) - enable_interrupts(); - - start = get_timer(0); - - while ((now = get_timer(start)) <= CONFIG_SYS_FLASH_ERASE_TOUT) { - - /* show that we're waiting */ - if ((get_timer(last)) > CONFIG_SYS_HZ) {/* every second */ - putc ('.'); - last = get_timer(0); - } - } - - flag = disable_interrupts(); - absEntry(FLASH29_CMD_READ_RESET,0,0); - if (flag) - enable_interrupts(); - } - - printf (" done\n"); - return 0; -} - -/*----------------------------------------------------------------------- - * Copy memory to flash, returns: - * 0 - OK - * 1 - write timeout - * 2 - Flash not erased - */ -int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) -{ - FPW data = 0; /* 16 or 32 bit word, matches flash bus width on MPC8XX */ - int bytes; /* number of bytes to program in current word */ - int left; /* number of bytes left to program */ - int i, res; - - for (left = cnt, res = 0; - left > 0 && res == 0; - addr += sizeof(data), left -= sizeof(data) - bytes) { - - bytes = addr & (sizeof(data) - 1); - addr &= ~(sizeof(data) - 1); - - /* combine source and destination data so can program - * an entire word of 16 or 32 bits - */ - for (i = 0; i < sizeof(data); i++) { - data <<= 8; - if (i < bytes || i - bytes >= left ) - data += *((uchar *)addr + i); - else - data += *src++; - } - - res = write_word(info, (FPWV *)addr, data); - } - - return (res); -} - -static int write_word (flash_info_t *info, FPWV *dest, FPW data) -{ - int res = 0; /* result, assume success */ - FUNCPTR_WR absEntry; - int flag; - - /* Check if Flash is (sufficiently) erased */ - if ((*dest & data) != data) { - return (2); - } - - if (info->start[0] != PHYS_FLASH_1) - { - return (3); - } - - load_cmd(IN_RAM_CMD_WRITE); - absEntry = (FUNCPTR_WR)FLASH_WRITE_CMD; - - flag = disable_interrupts(); - absEntry(FLASH29_CMD_PROGRAM,dest,data); - if (flag) enable_interrupts(); - - udelay(100); - - flag = disable_interrupts(); - absEntry(FLASH29_CMD_READ_RESET,0,0); - if (flag) enable_interrupts(); - - return (res); -} diff --git a/board/purple/lowlevel_init.S b/board/purple/lowlevel_init.S deleted file mode 100644 index 1bd3edb..0000000 --- a/board/purple/lowlevel_init.S +++ /dev/null @@ -1,36 +0,0 @@ -/* - * Memory sub-system initialization code for PURPLE development board. - * - * Copyright (c) 2003 Wolfgang Denk <wd@denx.de> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <config.h> -#include <asm/regdef.h> - -#define MC_IOGP 0xBF800800 - - .globl lowlevel_init -lowlevel_init: - li t0, MC_IOGP - li t1, 0xf24 - sw t1, 0(t0) - jr ra - nop diff --git a/board/purple/purple.c b/board/purple/purple.c deleted file mode 100644 index 4e9e700..0000000 --- a/board/purple/purple.c +++ /dev/null @@ -1,284 +0,0 @@ -/* - * (C) Copyright 2003 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <common.h> -#include <command.h> -#include <netdev.h> -#include <asm/inca-ip.h> -#include <asm/regdef.h> -#include <asm/mipsregs.h> -#include <asm/io.h> -#include <asm/addrspace.h> -#include <asm/cacheops.h> -#include <asm/reboot.h> - -#include "sconsole.h" - -#define cache_unroll(base,op) \ - __asm__ __volatile__(" \ - .set noreorder; \ - .set mips3; \ - cache %1, (%0); \ - .set mips0; \ - .set reorder" \ - : \ - : "r" (base), \ - "i" (op)); - -typedef void (*FUNCPTR)(ulong *source, ulong *destination, ulong nlongs); - -extern void asc_serial_init (void); -extern void asc_serial_putc (char); -extern void asc_serial_puts (const char *); -extern int asc_serial_getc (void); -extern int asc_serial_tstc (void); -extern void asc_serial_setbrg (void); - -void _machine_restart(void) -{ - void (*f)(void) = (void *) 0xbfc00000; - - f(); -} - -static void sdram_timing_init (ulong size) -{ - register uint pass; - register uint done; - register uint count; - register uint p0, p1, p2, p3, p4; - register uint addr; - -#define WRITE_MC_IOGP_1 *(uint *)0xbf800800 = (p1<<14)+(p2<<13)+(p4<<8)+(p0<<4)+p3; -#define WRITE_MC_IOGP_2 *(uint *)0xbf800800 = (p1<<14)+(p2<<13)+((p4-16)<<8)+(p0<<4)+p3; - - done = 0; - p0 = 2; - while (p0 < 4 && done == 0) { - p1 = 0; - while (p1 < 2 && done == 0) { - p2 = 0; - while (p2 < 2 && done == 0) { - p3 = 0; - while (p3 < 16 && done == 0) { - count = 0; - p4 = 0; - while (p4 < 32 && done == 0) { - WRITE_MC_IOGP_1; - - for (addr = CKSEG1 + 0x4000; - addr < CKSEG1ADDR (size); - addr = addr + 4) { - *(uint *) addr = 0xaa55aa55; - } - - pass = 1; - - for (addr = CKSEG1 + 0x4000; - addr < CKSEG1ADDR (size) && pass == 1; - addr = addr + 4) { - if (*(uint *) addr != 0xaa55aa55) - pass = 0; - } - - if (pass == 1) { - count++; - } else { - count = 0; - } - - if (count == 32) { - WRITE_MC_IOGP_2; - done = 1; - } - p4++; - } - p3++; - } - p2++; - } - p1++; - } - p0++; - if (p0 == 1) - p0++; - } -} - -phys_size_t initdram(int board_type) -{ - /* The only supported number of SDRAM banks is 4. - */ -#define CONFIG_SYS_NB 4 - - ulong cfgpb0 = *INCA_IP_SDRAM_MC_CFGPB0; - ulong cfgdw = *INCA_IP_SDRAM_MC_CFGDW; - int cols = cfgpb0 & 0xF; - int rows = (cfgpb0 & 0xF0) >> 4; - int dw = cfgdw & 0xF; - ulong size = (1 << (rows + cols)) * (1 << (dw - 1)) * CONFIG_SYS_NB; - void (* sdram_init) (ulong); - - sdram_init = (void (*)(ulong)) CKSEG0ADDR(&sdram_timing_init); - - sdram_init(0x10000); - - return size; -} - -int checkboard (void) -{ - - unsigned long chipid = *(unsigned long *)0xB800C800; - - printf ("Board: Purple PLB 2800 chip version %ld, ", chipid & 0xF); - - printf("CPU Speed %d MHz\n", CPU_CLOCK_RATE/1000000); - - set_io_port_base(0); - - return 0; -} - -int misc_init_r (void) -{ - asc_serial_init (); - - sconsole_putc = asc_serial_putc; - sconsole_puts = asc_serial_puts; - sconsole_getc = asc_serial_getc; - sconsole_tstc = asc_serial_tstc; - sconsole_setbrg = asc_serial_setbrg; - - sconsole_flush (); - return (0); -} - -/******************************************************************************* -* -* copydwords - copy one buffer to another a long at a time -* -* This routine copies the first <nlongs> longs from <source> to <destination>. -*/ -static void copydwords (ulong *source, ulong *destination, ulong nlongs) -{ - ulong temp,temp1; - ulong *dstend = destination + nlongs; - - while (destination < dstend) { - temp = *source++; - /* dummy read from sdram */ - temp1 = *(ulong *)0xa0000000; - /* avoid optimization from compliler */ - *(ulong *)0xbf0081f8 = temp1 + temp; - *destination++ = temp; - - } -} - -/******************************************************************************* -* -* copyLongs - copy one buffer to another a long at a time -* -* This routine copies the first <nlongs> longs from <source> to <destination>. -*/ -static void copyLongs (ulong *source, ulong *destination, ulong nlongs) -{ - FUNCPTR absEntry; - - absEntry = (FUNCPTR)(0xbf008000+((ulong)copydwords & 0x7)); - absEntry(source, destination, nlongs); -} - -/******************************************************************************* -* -* programLoad - load program into ram -* -* This routine load copydwords into ram -* -*/ -static void programLoad(void) -{ - FUNCPTR absEntry; - ulong *src,*dst; - - src = (ulong *)(CONFIG_SYS_TEXT_BASE + 0x428); - dst = (ulong *)0xbf0081d0; - - absEntry = (FUNCPTR)(CONFIG_SYS_TEXT_BASE + 0x400); - absEntry(src,dst,0x6); - - src = (ulong *)((ulong)copydwords & 0xfffffff8); - dst = (ulong *)0xbf008000; - - absEntry(src,dst,0x38); -} - -/******************************************************************************* -* -* copy_code - copy u-boot image from flash to RAM -* -* This routine is needed to solve flash problems on this board -* -*/ -void copy_code (ulong dest_addr) -{ - extern long uboot_end_data; - unsigned long start; - unsigned long end; - - /* load copydwords into ram - */ - programLoad(); - - /* copy u-boot code - */ - copyLongs((ulong *)CONFIG_SYS_MONITOR_BASE, - (ulong *)dest_addr, - ((ulong)&uboot_end_data - CONFIG_SYS_MONITOR_BASE + 3) / 4); - - - /* flush caches - */ - - start = CKSEG0; - end = start + CONFIG_SYS_DCACHE_SIZE; - while(start < end) { - cache_unroll(start,Index_Writeback_Inv_D); - start += CONFIG_SYS_CACHELINE_SIZE; - } - - start = CKSEG0; - end = start + CONFIG_SYS_ICACHE_SIZE; - while(start < end) { - cache_unroll(start,Index_Invalidate_I); - start += CONFIG_SYS_CACHELINE_SIZE; - } -} - -#ifdef CONFIG_PLB2800_ETHER -int board_eth_init(bd_t *bis) -{ - return plb2800_eth_initialize(bis); -} -#endif diff --git a/board/purple/sconsole.c b/board/purple/sconsole.c deleted file mode 100644 index cd9d871..0000000 --- a/board/purple/sconsole.c +++ /dev/null @@ -1,125 +0,0 @@ -/* - * (C) Copyright 2002 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <config.h> -#include <common.h> - -#include "sconsole.h" - -void (*sconsole_putc) (char) = 0; -void (*sconsole_puts) (const char *) = 0; -int (*sconsole_getc) (void) = 0; -int (*sconsole_tstc) (void) = 0; -void (*sconsole_setbrg) (void) = 0; - -int serial_init (void) -{ - sconsole_buffer_t *sb = SCONSOLE_BUFFER; - - sb->pos = 0; - sb->size = 0; - sb->max_size = CONFIG_SYS_SCONSOLE_SIZE - sizeof (sconsole_buffer_t); - - return (0); -} - -void serial_putc (char c) -{ - if (sconsole_putc) { - (*sconsole_putc) (c); - } else { - sconsole_buffer_t *sb = SCONSOLE_BUFFER; - - if (c) { - sb->data[sb->pos++] = c; - if (sb->pos == sb->max_size) { - sb->pos = 0; - } - if (sb->size < sb->max_size) { - sb->size++; - } - } - } -} - -void serial_puts (const char *s) -{ - if (sconsole_puts) { - (*sconsole_puts) (s); - } else { - sconsole_buffer_t *sb = SCONSOLE_BUFFER; - - while (*s) { - sb->data[sb->pos++] = *s++; - if (sb->pos == sb->max_size) { - sb->pos = 0; - } - if (sb->size < sb->max_size) { - sb->size++; - } - } - } -} - -int serial_getc (void) -{ - if (sconsole_getc) { - return (*sconsole_getc) (); - } else { - return 0; - } -} - -int serial_tstc (void) -{ - if (sconsole_tstc) { - return (*sconsole_tstc) (); - } else { - return 0; - } -} - -void serial_setbrg (void) -{ - if (sconsole_setbrg) { - (*sconsole_setbrg) (); - } -} - -void sconsole_flush (void) -{ - if (sconsole_putc) { - sconsole_buffer_t *sb = SCONSOLE_BUFFER; - unsigned int end = sb->pos < sb->size - ? sb->pos + sb->max_size - sb->size - : sb->pos - sb->size; - - while (sb->size) { - (*sconsole_putc) (sb->data[end++]); - if (end == sb->max_size) { - end = 0; - } - sb->size--; - } - } -} diff --git a/board/purple/sconsole.h b/board/purple/sconsole.h deleted file mode 100644 index baed5fb..0000000 --- a/board/purple/sconsole.h +++ /dev/null @@ -1,46 +0,0 @@ -/* - * (C) Copyright 2002 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef _SCONSOLE_H_ -#define _SCONSOLE_H_ - -#include <config.h> - -typedef struct sconsole_buffer_s { - unsigned long size; - unsigned long max_size; - unsigned long pos; - char data[1]; -} sconsole_buffer_t; - -#define SCONSOLE_BUFFER ((sconsole_buffer_t *) CONFIG_SYS_SCONSOLE_ADDR) - -extern void (* sconsole_putc) (char); -extern void (* sconsole_puts) (const char *); -extern int (* sconsole_getc) (void); -extern int (* sconsole_tstc) (void); -extern void (* sconsole_setbrg) (void); - -extern void sconsole_flush (void); - -#endif diff --git a/board/purple/u-boot.lds b/board/purple/u-boot.lds deleted file mode 100644 index 719f268..0000000 --- a/board/purple/u-boot.lds +++ /dev/null @@ -1,75 +0,0 @@ -/* - * (C) Copyright 2003 - * Wolfgang Denk Engineering, <wd@denx.de> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -/* -OUTPUT_FORMAT("elf32-bigmips", "elf32-bigmips", "elf32-bigmips") -*/ -OUTPUT_FORMAT("elf32-tradbigmips", "elf32-tradbigmips", "elf32-tradlittlemips") -OUTPUT_ARCH(mips) -ENTRY(_start) -SECTIONS -{ - . = 0x00000000; - - . = ALIGN(4); - .text : - { - arch/mips/cpu/start.o (.text) - board/purple/lowlevel_init.o (.text) - . = DEFINED(env_offset) ? env_offset : .; - common/env_embedded.o (.ppcenv) - - *(.text) - } - - . = ALIGN(4); - .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } - - . = ALIGN(4); - .data : { *(.data) } - - . = .; - _gp = ALIGN(16) + 0x7ff0; - - .got : { - __got_start = .; - *(.got) - __got_end = .; - } - - .sdata : { *(.sdata) } - - .u_boot_cmd : { - __u_boot_cmd_start = .; - *(.u_boot_cmd) - __u_boot_cmd_end = .; - } - - uboot_end_data = .; - num_got_entries = (__got_end - __got_start) >> 2; - - . = ALIGN(4); - .sbss (NOLOAD) : { *(.sbss) } - .bss (NOLOAD) : { *(.bss) . = ALIGN(4); } - uboot_end = .; -} @@ -217,32 +217,31 @@ M5282EVB m68k mcf52x2 m5282evb freesca M53017EVB m68k mcf52x2 m53017evb freescale EP2500 m68k mcf52x2 ep2500 Mercury microblaze-generic microblaze microblaze microblaze-generic xilinx -dbau1000 mips mips dbau1x00 - - dbau1x00:DBAU1000 -dbau1100 mips mips dbau1x00 - - dbau1x00:DBAU1100 -dbau1500 mips mips dbau1x00 - - dbau1x00:DBAU1500 -dbau1550 mips mips dbau1x00 - - dbau1x00:DBAU1550 -dbau1550_el mips mips dbau1x00 - - dbau1x00:DBAU1550 -gth2 mips mips -incaip mips mips -incaip_100MHz mips mips incaip - - incaip:CPU_CLOCK_RATE=100000000 -incaip_133MHz mips mips incaip - - incaip:CPU_CLOCK_RATE=133000000 -incaip_150MHz mips mips incaip - - incaip:CPU_CLOCK_RATE=150000000 -pb1000 mips mips pb1x00 - - pb1x00:PB1000 -purple mips mips -qemu_mips mips mips qemu-mips - - qemu-mips -tb0229 mips mips -vct_premium mips mips vct micronas - vct:VCT_PREMIUM -vct_premium_small mips mips vct micronas - vct:VCT_PREMIUM,VCT_SMALL_IMAGE -vct_premium_onenand mips mips vct micronas - vct:VCT_PREMIUM,VCT_ONENAND -vct_premium_onenand_small mips mips vct micronas - vct:VCT_PREMIUM,VCT_ONENAND,VCT_SMALL_IMAGE -vct_platinum mips mips vct micronas - vct:VCT_PLATINUM -vct_platinum_small mips mips vct micronas - vct:VCT_PLATINUM,VCT_SMALL_IMAGE -vct_platinum_onenand mips mips vct micronas - vct:VCT_PLATINUM,VCT_ONENAND -vct_platinum_onenand_small mips mips vct micronas - vct:VCT_PLATINUM,VCT_ONENAND,VCT_SMALL_IMAGE -vct_platinumavc mips mips vct micronas - vct:VCT_PLATINUMAVC -vct_platinumavc_small mips mips vct micronas - vct:VCT_PLATINUMAVC,VCT_SMALL_IMAGE -vct_platinumavc_onenand mips mips vct micronas - vct:VCT_PLATINUMAVC,VCT_ONENAND -vct_platinumavc_onenand_small mips mips vct micronas - vct:VCT_PLATINUMAVC,VCT_ONENAND,VCT_SMALL_IMAGE +dbau1000 mips mips32 dbau1x00 - au1x00 dbau1x00:DBAU1000 +dbau1100 mips mips32 dbau1x00 - au1x00 dbau1x00:DBAU1100 +dbau1500 mips mips32 dbau1x00 - au1x00 dbau1x00:DBAU1500 +dbau1550 mips mips32 dbau1x00 - au1x00 dbau1x00:DBAU1550 +dbau1550_el mips mips32 dbau1x00 - au1x00 dbau1x00:DBAU1550 +gth2 mips mips32 - - au1x00 +incaip mips mips32 incaip - incaip +incaip_100MHz mips mips32 incaip - incaip incaip:CPU_CLOCK_RATE=100000000 +incaip_133MHz mips mips32 incaip - incaip incaip:CPU_CLOCK_RATE=133000000 +incaip_150MHz mips mips32 incaip - incaip incaip:CPU_CLOCK_RATE=150000000 +pb1000 mips mips32 pb1x00 - au1x00 pb1x00:PB1000 +qemu_mips mips mips32 qemu-mips - - qemu-mips +tb0229 mips mips32 +vct_premium mips mips32 vct micronas - vct:VCT_PREMIUM +vct_premium_small mips mips32 vct micronas - vct:VCT_PREMIUM,VCT_SMALL_IMAGE +vct_premium_onenand mips mips32 vct micronas - vct:VCT_PREMIUM,VCT_ONENAND +vct_premium_onenand_small mips mips32 vct micronas - vct:VCT_PREMIUM,VCT_ONENAND,VCT_SMALL_IMAGE +vct_platinum mips mips32 vct micronas - vct:VCT_PLATINUM +vct_platinum_small mips mips32 vct micronas - vct:VCT_PLATINUM,VCT_SMALL_IMAGE +vct_platinum_onenand mips mips32 vct micronas - vct:VCT_PLATINUM,VCT_ONENAND +vct_platinum_onenand_small mips mips32 vct micronas - vct:VCT_PLATINUM,VCT_ONENAND,VCT_SMALL_IMAGE +vct_platinumavc mips mips32 vct micronas - vct:VCT_PLATINUMAVC +vct_platinumavc_small mips mips32 vct micronas - vct:VCT_PLATINUMAVC,VCT_SMALL_IMAGE +vct_platinumavc_onenand mips mips32 vct micronas - vct:VCT_PLATINUMAVC,VCT_ONENAND +vct_platinumavc_onenand_small mips mips32 vct micronas - vct:VCT_PLATINUMAVC,VCT_ONENAND,VCT_SMALL_IMAGE PCI5441 nios2 nios2 pci5441 psyent PK1C20 nios2 nios2 pk1c20 psyent EVB64260 powerpc 74xx_7xx evb64260 - - EVB64260 diff --git a/doc/README.Purple b/doc/README.Purple deleted file mode 100644 index 0098e26..0000000 --- a/doc/README.Purple +++ /dev/null @@ -1,84 +0,0 @@ -Installation Instructions: --------------------------- - -1. Put the s2 switch into the following position: - - Off On - ------ - |x | - | x| - |x | - | X| - ------ - - Put the s3 switch into the following position: - - Off On - ------ - | x | - | x | - | x| - | x| - ------ - - Put the s4 switch into the following position: - - Off On - ------ - |x | - |x | - |x | - |x | - |x | - | x| - | x| - |x | - ------ - -2. Connect to the serial console and to the BDI. Power on. On the - serial line, you should see: - - PURPLE@1.2> - -3. Type '8'. No echo will be displayed. In response, you should get: - - 7A(pass) - -4. From BDI, enter command: - - mmw 0xb800d860 0x0042c7ff - -5. Then, from BDI: - - erase 0xB0000000 - erase 0xB0008000 - erase 0xB000C000 - erase 0xB0010000 - erase 0xB0020000 - - prog 0xB0000000 <u-boot.bin> bin - -6. Power off. Restore the original S2 switch position: - - Off On - ------ - | x| - | x| - |x | - | X| - ------ - - Power on. U-Boot should come up. - - -Implementation Notes: ---------------------- - -Due to the RAM/flash bus arbitration problem the suggested workaround -had to be implemented. It works okay. On the downside is that you -can't really check whether 'erase' is complete by polling flash as it -is usually done. Instead, the flash driver simply waits for a given -time and assumes that erase then has passed. This behaviour is -identical to what the VxWorks driver does; also, the same timeout (6 -seconds) was chosen. Note that this timeout applies for each erase -operation, i. e. per erased sector. diff --git a/include/configs/purple.h b/include/configs/purple.h deleted file mode 100644 index 25d8ebe..0000000 --- a/include/configs/purple.h +++ /dev/null @@ -1,173 +0,0 @@ -/* - * (C) Copyright 2003 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -/* - * This file contains the configuration parameters for the PURPLE board. - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -#define CONFIG_MIPS32 1 /* MIPS 5Kc CPU core */ -#define CONFIG_PURPLE 1 /* on a PURPLE Board */ - -#define CPU_CLOCK_RATE 125000000 /* 125 MHz clock for the MIPS core */ -#define ASC_CLOCK_RATE 62500000 /* 62.5 MHz ASC clock */ - -#define INFINEON_EBU_BOOTCFG 0xE0CC - -#define CONFIG_STACKSIZE (128 * 1024) - -#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */ - -#define CONFIG_BAUDRATE 19200 - -/* valid baudrates */ -#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } - -#define CONFIG_TIMESTAMP /* Print image info with timestamp */ - -#define CONFIG_PREBOOT "echo;" \ - "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \ - "echo" - -#undef CONFIG_BOOTARGS - -#define CONFIG_EXTRA_ENV_SETTINGS \ - "nfsargs=setenv bootargs root=/dev/nfs rw " \ - "nfsroot=${serverip}:${rootpath}\0" \ - "ramargs=setenv bootargs root=/dev/ram rw\0" \ - "addip=setenv bootargs ${bootargs} " \ - "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ - ":${hostname}:${netdev}:off\0" \ - "addmisc=setenv bootargs ${bootargs} " \ - "console=ttyS0,${baudrate} " \ - "ethaddr=${ethaddr} " \ - "panic=1\0" \ - "flash_nfs=run nfsargs addip addmisc;" \ - "bootm ${kernel_addr}\0" \ - "flash_self=run ramargs addip addmisc;" \ - "bootm ${kernel_addr} ${ramdisk_addr}\0" \ - "net_nfs=tftp 80500000 ${bootfile};" \ - "run nfsargs addip addmisc;bootm\0" \ - "rootpath=/opt/eldk/mips_5KC\0" \ - "bootfile=/tftpboot/purple/uImage\0" \ - "kernel_addr=B0040000\0" \ - "ramdisk_addr=B0100000\0" \ - "u-boot=/tftpboot/purple/u-boot.bin\0" \ - "load=tftp 80500000 ${u-boot}\0" \ - "update=protect off 1:0-4;era 1:0-4;" \ - "cp.b 80500000 B0000000 ${filesize}\0" \ - "" -#define CONFIG_BOOTCOMMAND "run flash_self" - - -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME - - -/* - * Command line configuration. - */ -#include <config_cmd_default.h> - -#define CONFIG_CMD_ELF - - -#define CONFIG_SYS_SDRAM_BASE 0x80000000 - -#define CONFIG_SYS_INIT_SP_OFFSET 0x400000 - -#define CONFIG_SYS_MALLOC_LEN 128*1024 - -#define CONFIG_SYS_BOOTPARAMS_LEN 128*1024 - -/* - * Miscellaneous configurable options - */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_SYS_PROMPT "PURPLE # " /* Monitor Command Prompt */ -#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ -#define CONFIG_SYS_MIPS_TIMER_FREQ (CPU_CLOCK_RATE/2) -#define CONFIG_SYS_HZ 1000 -#define CONFIG_SYS_MAXARGS 16 /* max number of command args*/ - -#define CONFIG_SYS_LOAD_ADDR 0x80500000 /* default load address */ - -#define CONFIG_SYS_MEMTEST_START 0x80200000 -#define CONFIG_SYS_MEMTEST_END 0x80800000 - -#define CONFIG_MISC_INIT_R - -/*----------------------------------------------------------------------- - * FLASH and environment organization - */ -#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ -#define CONFIG_SYS_MAX_FLASH_SECT (35) /* max number of sectors on one chip */ - -#define PHYS_FLASH_1 0xb0000000 /* Flash Bank #1 */ - -/* The following #defines are needed to get flash environment right */ -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE -#define CONFIG_SYS_MONITOR_LEN (192 << 10) - -#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 - -/* timeout values are in ticks */ -#define CONFIG_SYS_FLASH_ERASE_TOUT (6 * CONFIG_SYS_HZ) /* Timeout for Flash Erase */ -#define CONFIG_SYS_FLASH_WRITE_TOUT (6 * CONFIG_SYS_HZ) /* Timeout for Flash Write */ - -#define CONFIG_ENV_IS_IN_FLASH 1 - -/* Address and size of Primary Environment Sector */ -#define CONFIG_ENV_ADDR 0xB0008000 -#define CONFIG_ENV_SIZE 0x4000 - -#define CONFIG_FLASH_32BIT -#define CONFIG_NR_DRAM_BANKS 1 - -#define CONFIG_PLB2800_ETHER -#define CONFIG_NET_MULTI - -/*----------------------------------------------------------------------- - * Cache Configuration - */ -#define CONFIG_SYS_DCACHE_SIZE 16384 -#define CONFIG_SYS_ICACHE_SIZE 16384 -#define CONFIG_SYS_CACHELINE_SIZE 32 - -/* - * Temporary buffer for serial data until the real serial driver - * is initialised (memtest will destroy this buffer) - */ -#define CONFIG_SYS_SCONSOLE_ADDR (CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_INIT_SP_OFFSET - \ - CONFIG_SYS_DCACHE_SIZE / 2) -#define CONFIG_SYS_SCONSOLE_SIZE (CONFIG_SYS_DCACHE_SIZE / 4) - -#endif /* __CONFIG_H */ |