diff options
| -rw-r--r-- | CHANGELOG | 3 | ||||
| -rw-r--r-- | include/asm-ppc/processor.h | 8 |
2 files changed, 7 insertions, 4 deletions
@@ -2,6 +2,9 @@ Changes for U-Boot 1.1.4: ====================================================================== +* Correct PPC Timebase register definitions (SPRN_TBRL...) + Patch by Stefan Roese, 07 Nov 2005 + * Adjust bd->bi_flashstart on Yellowstone & Yosemite to correct size Patch by Stefan Roese, 05 Nov 2005 diff --git a/include/asm-ppc/processor.h b/include/asm-ppc/processor.h index 551da35..0b30d2d 100644 --- a/include/asm-ppc/processor.h +++ b/include/asm-ppc/processor.h @@ -310,10 +310,10 @@ #define SPRN_TBHU 0x3CC /* Time Base High User-mode */ #define SPRN_TBLO 0x3DD /* Time Base Low */ #define SPRN_TBLU 0x3CD /* Time Base Low User-mode */ -#define SPRN_TBRL 0x10D /* Time Base Read Lower Register */ -#define SPRN_TBRU 0x10C /* Time Base Read Upper Register */ -#define SPRN_TBWL 0x11D /* Time Base Write Lower Register */ -#define SPRN_TBWU 0x11C /* Time Base Write Upper Register */ +#define SPRN_TBRL 0x10C /* Time Base Read Lower Register */ +#define SPRN_TBRU 0x10D /* Time Base Read Upper Register */ +#define SPRN_TBWL 0x11C /* Time Base Write Lower Register */ +#define SPRN_TBWU 0x11D /* Time Base Write Upper Register */ #ifndef CONFIG_BOOKE #define SPRN_TCR 0x3DA /* Timer Control Register */ #else |