diff options
-rw-r--r-- | include/configs/bubinga.h | 1 | ||||
-rw-r--r-- | include/configs/canyonlands.h | 1 | ||||
-rw-r--r-- | include/configs/intip.h | 1 | ||||
-rw-r--r-- | include/configs/luan.h | 1 | ||||
-rw-r--r-- | include/configs/t3corp.h | 1 |
5 files changed, 5 insertions, 0 deletions
diff --git a/include/configs/bubinga.h b/include/configs/bubinga.h index 627060a..159a265 100644 --- a/include/configs/bubinga.h +++ b/include/configs/bubinga.h @@ -179,6 +179,7 @@ * (Set up by the startup code) */ #define CONFIG_SYS_SRAM_BASE 0xFFF00000 +#define CONFIG_SYS_SRAM_SIZE (256 << 10) #define CONFIG_SYS_FLASH_BASE 0xFFF80000 /*----------------------------------------------------------------------- diff --git a/include/configs/canyonlands.h b/include/configs/canyonlands.h index 6fe7639..e2c58a5 100644 --- a/include/configs/canyonlands.h +++ b/include/configs/canyonlands.h @@ -111,6 +111,7 @@ #define CONFIG_SYS_OCM_BASE 0xE3000000 /* OCM: 64k */ #define CONFIG_SYS_SRAM_BASE 0xE8000000 /* SRAM: 256k */ +#define CONFIG_SYS_SRAM_SIZE (256 << 10) #define CONFIG_SYS_LOCAL_CONF_REGS 0xEF000000 #define CONFIG_SYS_PERIPHERAL_BASE 0xEF600000 /* internal peripherals */ diff --git a/include/configs/intip.h b/include/configs/intip.h index 19f12fa..0c0bb37 100644 --- a/include/configs/intip.h +++ b/include/configs/intip.h @@ -93,6 +93,7 @@ #define CONFIG_SYS_OCM_BASE 0xE3000000 /* OCM: 64k */ #define CONFIG_SYS_SRAM_BASE 0xE8000000 /* SRAM: 256k */ +#define CONFIG_SYS_SRAM_SIZE (256 << 10) #define CONFIG_SYS_LOCAL_CONF_REGS 0xEF000000 #define CONFIG_SYS_PERIPHERAL_BASE 0xEF600000 /* internal periph. */ diff --git a/include/configs/luan.h b/include/configs/luan.h index b158b74..ccd9397 100644 --- a/include/configs/luan.h +++ b/include/configs/luan.h @@ -53,6 +53,7 @@ #define CONFIG_SYS_LARGE_FLASH 0xffc00000 /* 4MB flash address CS0 */ #define CONFIG_SYS_SMALL_FLASH 0xff900000 /* 1MB flash address CS2 */ #define CONFIG_SYS_SRAM_BASE 0xff800000 /* 1MB SRAM address CS2 */ +#define CONFIG_SYS_SRAM_SIZE (1 << 20) #define CONFIG_SYS_EPLD_BASE 0xff000000 /* EPLD and FRAM CS1 */ #define CONFIG_SYS_ISRAM_BASE 0xf8000000 /* internal 8k SRAM (L2 cache) */ diff --git a/include/configs/t3corp.h b/include/configs/t3corp.h index b38886b..41ee15b 100644 --- a/include/configs/t3corp.h +++ b/include/configs/t3corp.h @@ -86,6 +86,7 @@ #define CONFIG_SYS_OCM_BASE 0xE7000000 /* OCM: 64k */ #define CONFIG_SYS_SRAM_BASE 0xE8000000 /* SRAM: 256k */ +#define CONFIG_SYS_SRAM_SIZE (256 << 10) #define CONFIG_SYS_LOCAL_CONF_REGS 0xEF000000 #define CONFIG_SYS_PERIPHERAL_BASE 0xEF600000 /* internal periph. */ |