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-rw-r--r--arch/powerpc/cpu/mpc85xx/cpu_init.c8
-rw-r--r--include/configs/MPC8536DS.h1
-rw-r--r--include/configs/P1022DS.h1
-rw-r--r--include/configs/corenet_ds.h1
4 files changed, 6 insertions, 5 deletions
diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c
index 4b8faa5..4a6cc65 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c
@@ -232,6 +232,12 @@ void cpu_init_f (void)
invalidate_cpc();
}
+/* Implement a dummy function for those platforms w/o SERDES */
+static void __fsl_serdes__init(void)
+{
+ return ;
+}
+__attribute__((weak, alias("__fsl_serdes__init"))) void fsl_serdes_init(void);
/*
* Initialize L2 as cache.
@@ -375,10 +381,8 @@ int cpu_init_r(void)
qe_reset();
#endif
-#if defined(CONFIG_SYS_HAS_SERDES)
/* needs to be in ram since code uses global static vars */
fsl_serdes_init();
-#endif
#if defined(CONFIG_MP)
setup_mp();
diff --git a/include/configs/MPC8536DS.h b/include/configs/MPC8536DS.h
index 5c5be0c..7473834 100644
--- a/include/configs/MPC8536DS.h
+++ b/include/configs/MPC8536DS.h
@@ -78,7 +78,6 @@
#define CONFIG_FSL_PCI_INIT 1 /* Use common FSL init code */
#define CONFIG_FSL_PCIE_RESET 1 /* need PCIe reset errata */
#define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */
-#define CONFIG_SYS_HAS_SERDES /* has SERDES */
#define CONFIG_FSL_LAW 1 /* Use common FSL init code */
#define CONFIG_E1000 1 /* Defind e1000 pci Ethernet card*/
diff --git a/include/configs/P1022DS.h b/include/configs/P1022DS.h
index 7e6c40f..272bd9f 100644
--- a/include/configs/P1022DS.h
+++ b/include/configs/P1022DS.h
@@ -34,7 +34,6 @@
#define CONFIG_FSL_PCI_INIT /* Use common FSL init code */
#define CONFIG_FSL_PCIE_RESET /* need PCIe reset errata */
#define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */
-#define CONFIG_SYS_HAS_SERDES /* has SERDES */
#define CONFIG_PHYS_64BIT
#define CONFIG_ENABLE_36BIT_PHYS
diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h
index 454a30a..e1cd1b0 100644
--- a/include/configs/corenet_ds.h
+++ b/include/configs/corenet_ds.h
@@ -50,7 +50,6 @@
#define CONFIG_PCIE3 /* PCIE controler 3 */
#define CONFIG_FSL_PCI_INIT /* Use common FSL init code */
#define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */
-#define CONFIG_SYS_HAS_SERDES /* has SERDES */
#define CONFIG_SRIO1 /* SRIO port 1 */
#define CONFIG_SRIO2 /* SRIO port 2 */