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-rw-r--r--arch/arm/cpu/armv7/mx6/soc.c8
1 files changed, 0 insertions, 8 deletions
diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c
index 6cf0b51..660e084 100644
--- a/arch/arm/cpu/armv7/mx6/soc.c
+++ b/arch/arm/cpu/armv7/mx6/soc.c
@@ -1091,14 +1091,6 @@ void v7_outer_cache_enable(void)
if (((cache_id & L2X0_CACHE_ID_PART_MASK) == L2X0_CACHE_ID_PART_L310)
&& ((cache_id & L2X0_CACHE_ID_RTL_MASK) < L2X0_CACHE_ID_RTL_R3P2))
val &= ~(1 << 30);
-
- /*
- * To i.MX6DQP, still disable double line fill feature due to system
- * reboot issue
- */
- if (is_mx6dqp())
- val &= ~(1 << 30);
-
writel(val, &pl310->pl310_prefetch_ctrl);
val = readl(&pl310->pl310_power_ctrl);