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-rw-r--r--arch/arm/imx-common/cpu.c12
-rw-r--r--arch/arm/include/asm/arch-mx6/imx-regs.h17
2 files changed, 29 insertions, 0 deletions
diff --git a/arch/arm/imx-common/cpu.c b/arch/arm/imx-common/cpu.c
index 759ae46..c34bed5 100644
--- a/arch/arm/imx-common/cpu.c
+++ b/arch/arm/imx-common/cpu.c
@@ -128,6 +128,10 @@ const char *get_imx_type(u32 imxtype)
int print_cpuinfo(void)
{
u32 cpurev;
+#if defined(CONFIG_DBG_MONITOR)
+ struct dbg_monitor_regs *dbg =
+ (struct dbg_monitor_regs *)DEBUG_MONITOR_BASE_ADDR;
+#endif
cpurev = get_cpu_rev();
@@ -141,6 +145,14 @@ int print_cpuinfo(void)
check_cpu_temperature();
#endif
+#if defined(CONFIG_DBG_MONITOR)
+ if (readl(&dbg->snvs_addr))
+ printf("DBG snvs regs addr 0x%x, data 0x%x, info 0x%x\n",
+ readl(&dbg->snvs_addr),
+ readl(&dbg->snvs_data),
+ readl(&dbg->snvs_info));
+#endif
+
printf("Reset cause: %s\n", get_reset_cause());
return 0;
}
diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h b/arch/arm/include/asm/arch-mx6/imx-regs.h
index 30b750e..9532e5e 100644
--- a/arch/arm/include/asm/arch-mx6/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx6/imx-regs.h
@@ -255,7 +255,11 @@
#define CSU_BASE_ADDR (AIPS2_OFF_BASE_ADDR + 0x40000)
#define IP2APB_PERFMON1_BASE_ADDR (AIPS2_OFF_BASE_ADDR + 0x44000)
#define IP2APB_PERFMON2_BASE_ADDR (AIPS2_OFF_BASE_ADDR + 0x48000)
+#ifdef CONFIG_MX6SX
+#define DEBUG_MONITOR_BASE_ADDR (AIPS2_OFF_BASE_ADDR + 0x4C000)
+#else
#define IP2APB_PERFMON3_BASE_ADDR (AIPS2_OFF_BASE_ADDR + 0x4C000)
+#endif
#define IP2APB_TZASC1_BASE_ADDR (AIPS2_OFF_BASE_ADDR + 0x50000)
#ifdef CONFIG_MX6SX
#define SAI1_BASE_ADDR (AIPS2_OFF_BASE_ADDR + 0x54000)
@@ -808,6 +812,19 @@ struct wdog_regs {
u16 wmcr; /* Miscellaneous Control */
};
+struct dbg_monitor_regs {
+ u32 ctrl[4]; /* Control */
+ u32 master_en[4]; /* Master enable */
+ u32 irq[4]; /* IRQ */
+ u32 trap_addr_low[4]; /* Trap address low */
+ u32 trap_addr_high[4]; /* Trap address high */
+ u32 trap_id[4]; /* Trap ID */
+ u32 snvs_addr[4]; /* SNVS address */
+ u32 snvs_data[4]; /* SNVS data */
+ u32 snvs_info[4]; /* SNVS info */
+ u32 version[4]; /* Version */
+};
+
extern void check_cpu_temperature(void);
/* If ROM fail back to USB recover mode, USBPH0_PWD will be clear to use USB