diff options
-rw-r--r-- | arch/sh/include/asm/mmc.h | 18 | ||||
-rw-r--r-- | arch/sh/lib/board.c | 1 | ||||
-rw-r--r-- | board/renesas/ecovec/Makefile | 8 | ||||
-rw-r--r-- | board/renesas/ecovec/ecovec.c | 1 | ||||
-rw-r--r-- | board/renesas/sh7757lcr/sh7757lcr.c | 6 | ||||
-rw-r--r-- | doc/README.sh7757lcr | 1 | ||||
-rw-r--r-- | drivers/spi/sh_spi.c | 19 | ||||
-rw-r--r-- | drivers/spi/sh_spi.h | 4 | ||||
-rw-r--r-- | include/configs/microblaze-generic.h | 21 | ||||
-rw-r--r-- | include/configs/sh7757lcr.h | 11 |
10 files changed, 83 insertions, 7 deletions
diff --git a/arch/sh/include/asm/mmc.h b/arch/sh/include/asm/mmc.h new file mode 100644 index 0000000..2c2ff21 --- /dev/null +++ b/arch/sh/include/asm/mmc.h @@ -0,0 +1,18 @@ +/* + * Renesas SuperH MMCIF driver. + * + * Copyright (C) 2012 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> + * Copyright (C) 2012 Renesas Solutions Corp. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License. + * + */ +#ifndef _SH_MMC_H_ +#define _SH_MMC_H_ + +int mmcif_mmc_init(void); + +#endif /* _SH_MMC_H_ */ + diff --git a/arch/sh/lib/board.c b/arch/sh/lib/board.c index d9c0c22..eb021e8 100644 --- a/arch/sh/lib/board.c +++ b/arch/sh/lib/board.c @@ -25,6 +25,7 @@ #include <version.h> #include <watchdog.h> #include <net.h> +#include <mmc.h> #include <environment.h> #ifdef CONFIG_BITBANGMII diff --git a/board/renesas/ecovec/Makefile b/board/renesas/ecovec/Makefile index 8fdc0c9..b592a9c 100644 --- a/board/renesas/ecovec/Makefile +++ b/board/renesas/ecovec/Makefile @@ -25,8 +25,12 @@ LIB = $(obj)lib$(BOARD).o COBJS := ecovec.o SOBJS := lowlevel_init.o -$(LIB): $(obj).depend $(COBJS) $(SOBJS) - $(call cmd_link_o_target, $(COBJS) $(SOBJS)) +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(OBJS) $(SOBJS) + $(call cmd_link_o_target, $(OBJS) $(SOBJS)) ######################################################################### diff --git a/board/renesas/ecovec/ecovec.c b/board/renesas/ecovec/ecovec.c index 275b0ba..3bd1a62 100644 --- a/board/renesas/ecovec/ecovec.c +++ b/board/renesas/ecovec/ecovec.c @@ -55,7 +55,6 @@ int board_late_init(void) { u8 mac[6]; char env_mac[17]; - int i; udelay(1000); diff --git a/board/renesas/sh7757lcr/sh7757lcr.c b/board/renesas/sh7757lcr/sh7757lcr.c index a62be24..c8edad8 100644 --- a/board/renesas/sh7757lcr/sh7757lcr.c +++ b/board/renesas/sh7757lcr/sh7757lcr.c @@ -24,6 +24,7 @@ #include <malloc.h> #include <asm/processor.h> #include <asm/io.h> +#include <asm/mmc.h> #include <spi_flash.h> int checkboard(void) @@ -263,6 +264,11 @@ int dram_init(void) return 0; } +int board_mmc_init(bd_t *bis) +{ + return mmcif_mmc_init(); +} + static int get_sh_eth_mac_raw(unsigned char *buf, int size) { struct spi_flash *spi; diff --git a/doc/README.sh7757lcr b/doc/README.sh7757lcr index 37c1a7a..3e9c1c1 100644 --- a/doc/README.sh7757lcr +++ b/doc/README.sh7757lcr @@ -12,6 +12,7 @@ The R0P7757LC0030RL(board config name:sh7757lcr) has the following device: - SPI ROM 8MB - 2D Graphic controller - Ethernet controller + - eMMC 2GB configuration for This board: diff --git a/drivers/spi/sh_spi.c b/drivers/spi/sh_spi.c index 78c7f1a..e944b23 100644 --- a/drivers/spi/sh_spi.c +++ b/drivers/spi/sh_spi.c @@ -1,7 +1,7 @@ /* * SH SPI driver * - * Copyright (C) 2011 Renesas Solutions Corp. + * Copyright (C) 2011-2012 Renesas Solutions Corp. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -82,6 +82,19 @@ void spi_init(void) { } +static void sh_spi_set_cs(struct sh_spi *ss, unsigned int cs) +{ + unsigned long val = 0; + + if (cs & 0x01) + val |= SH_SPI_SSS0; + if (cs & 0x02) + val |= SH_SPI_SSS1; + + sh_spi_clear_bit(SH_SPI_SSS0 | SH_SPI_SSS1, &ss->regs->cr4); + sh_spi_set_bit(val, &ss->regs->cr4); +} + struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, unsigned int max_hz, unsigned int mode) { @@ -104,6 +117,7 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, sh_spi_write(0x00, &ss->regs->cr1); /* CR3 init */ sh_spi_write(0x00, &ss->regs->cr3); + sh_spi_set_cs(ss, cs); clear_fifo(ss); @@ -242,8 +256,7 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout, int spi_cs_is_valid(unsigned int bus, unsigned int cs) { - /* This driver supports "bus = 0" and "cs = 0" only. */ - if (!bus && !cs) + if (!bus && cs < SH_SPI_NUM_CS) return 1; else return 0; diff --git a/drivers/spi/sh_spi.h b/drivers/spi/sh_spi.h index dd8f937..96b4b68 100644 --- a/drivers/spi/sh_spi.h +++ b/drivers/spi/sh_spi.h @@ -60,10 +60,12 @@ struct sh_spi_regs { #define SH_SPI_TBFI 0x40 #define SH_SPI_RBEI 0x20 #define SH_SPI_RBFI 0x10 +#define SH_SPI_SSS1 0x08 #define SH_SPI_WPABRT 0x04 -#define SH_SPI_SSS 0x01 +#define SH_SPI_SSS0 0x01 #define SH_SPI_FIFO_SIZE 32 +#define SH_SPI_NUM_CS 4 struct sh_spi { struct spi_slave slave; diff --git a/include/configs/microblaze-generic.h b/include/configs/microblaze-generic.h index 1f4aefd..9f66fbf 100644 --- a/include/configs/microblaze-generic.h +++ b/include/configs/microblaze-generic.h @@ -339,4 +339,25 @@ #define CONFIG_FIT 1 #define CONFIG_OF_LIBFDT 1 +#if defined(CONFIG_XILINX_AXIEMAC) +# define CONFIG_MII 1 +# define CONFIG_CMD_MII 1 +# define CONFIG_PHY_GIGE 1 +# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN 1 +# define CONFIG_PHYLIB 1 +# define CONFIG_PHY_ATHEROS 1 +# define CONFIG_PHY_BROADCOM 1 +# define CONFIG_PHY_DAVICOM 1 +# define CONFIG_PHY_LXT 1 +# define CONFIG_PHY_MARVELL 1 +# define CONFIG_PHY_MICREL 1 +# define CONFIG_PHY_NATSEMI 1 +# define CONFIG_PHY_REALTEK 1 +# define CONFIG_PHY_VITESSE 1 +#else +# undef CONFIG_MII +# undef CONFIG_CMD_MII +# undef CONFIG_PHYLIB +#endif + #endif /* __CONFIG_H */ diff --git a/include/configs/sh7757lcr.h b/include/configs/sh7757lcr.h index c1f9ce8..73d2a87 100644 --- a/include/configs/sh7757lcr.h +++ b/include/configs/sh7757lcr.h @@ -49,6 +49,10 @@ #define CONFIG_CMD_MD5SUM #define CONFIG_MD5 #define CONFIG_CMD_LOADS +#define CONFIG_CMD_MMC +#define CONFIG_CMD_EXT2 +#define CONFIG_DOS_PARTITION +#define CONFIG_MAC_PARTITION #define CONFIG_BAUDRATE 115200 #define CONFIG_BOOTDELAY 3 @@ -123,6 +127,13 @@ #define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_STMICRO 1 +/* MMCIF */ +#define CONFIG_MMC 1 +#define CONFIG_GENERIC_MMC 1 +#define CONFIG_SH_MMCIF 1 +#define CONFIG_SH_MMCIF_ADDR 0xffcb0000 +#define CONFIG_SH_MMCIF_CLK 48000000 + /* SH7757 board */ #define SH7757LCR_SDRAM_PHYS_TOP 0x40000000 #define SH7757LCR_GRA_OFFSET 0x1f000000 |