diff options
33 files changed, 300 insertions, 168 deletions
diff --git a/arch/arm/include/asm/arch-exynos/mmc.h b/arch/arm/include/asm/arch-exynos/mmc.h index 0f701c9..afdfcf0 100644 --- a/arch/arm/include/asm/arch-exynos/mmc.h +++ b/arch/arm/include/asm/arch-exynos/mmc.h @@ -64,11 +64,11 @@ #define SDHCI_CTRL4_DRIVE_MASK(_x) ((_x) << 16) #define SDHCI_CTRL4_DRIVE_SHIFT (16) -int s5p_sdhci_init(u32 regbase, u32 max_clk, u32 min_clk, u32 quirks); +int s5p_sdhci_init(u32 regbase, int index, int bus_width); static inline unsigned int s5p_mmc_init(int index, int bus_width) { unsigned int base = samsung_get_base_mmc() + (0x10000 * index); - return s5p_sdhci_init(base, 52000000, 400000, index); + return s5p_sdhci_init(base, index, bus_width); } #endif diff --git a/arch/arm/include/asm/arch-s5pc1xx/mmc.h b/arch/arm/include/asm/arch-s5pc1xx/mmc.h index 0f701c9..afdfcf0 100644 --- a/arch/arm/include/asm/arch-s5pc1xx/mmc.h +++ b/arch/arm/include/asm/arch-s5pc1xx/mmc.h @@ -64,11 +64,11 @@ #define SDHCI_CTRL4_DRIVE_MASK(_x) ((_x) << 16) #define SDHCI_CTRL4_DRIVE_SHIFT (16) -int s5p_sdhci_init(u32 regbase, u32 max_clk, u32 min_clk, u32 quirks); +int s5p_sdhci_init(u32 regbase, int index, int bus_width); static inline unsigned int s5p_mmc_init(int index, int bus_width) { unsigned int base = samsung_get_base_mmc() + (0x10000 * index); - return s5p_sdhci_init(base, 52000000, 400000, index); + return s5p_sdhci_init(base, index, bus_width); } #endif diff --git a/arch/microblaze/config.mk b/arch/microblaze/config.mk index aca79e2..b4935f0 100644 --- a/arch/microblaze/config.mk +++ b/arch/microblaze/config.mk @@ -31,3 +31,5 @@ CONFIG_STANDALONE_LOAD_ADDR ?= 0x80F00000 PLATFORM_CPPFLAGS += -ffixed-r31 -D__microblaze__ LDSCRIPT ?= $(SRCTREE)/$(CPUDIR)/u-boot.lds + +CONFIG_ARCH_DEVICE_TREE := microblaze diff --git a/arch/microblaze/cpu/interrupts.c b/arch/microblaze/cpu/interrupts.c index ee67082..7f2ee64 100644 --- a/arch/microblaze/cpu/interrupts.c +++ b/arch/microblaze/cpu/interrupts.c @@ -32,15 +32,12 @@ #undef DEBUG_INT -extern void microblaze_disable_interrupts (void); -extern void microblaze_enable_interrupts (void); - -void enable_interrupts (void) +void enable_interrupts(void) { MSRSET(0x2); } -int disable_interrupts (void) +int disable_interrupts(void) { unsigned int msr; @@ -58,20 +55,21 @@ microblaze_intc_t *intc; /* default handler */ static void def_hdlr(void) { - puts ("def_hdlr\n"); + puts("def_hdlr\n"); } static void enable_one_interrupt(int irq) { int mask; int offset = 1; + offset <<= irq; mask = intc->ier; intc->ier = (mask | offset); #ifdef DEBUG_INT - printf ("Enable one interrupt irq %x - mask %x,ier %x\n", offset, mask, + printf("Enable one interrupt irq %x - mask %x,ier %x\n", offset, mask, intc->ier); - printf ("INTC isr %x, ier %x, iar %x, mer %x\n", intc->isr, intc->ier, + printf("INTC isr %x, ier %x, iar %x, mer %x\n", intc->isr, intc->ier, intc->iar, intc->mer); #endif } @@ -80,25 +78,26 @@ static void disable_one_interrupt(int irq) { int mask; int offset = 1; + offset <<= irq; mask = intc->ier; intc->ier = (mask & ~offset); #ifdef DEBUG_INT - printf ("Disable one interrupt irq %x - mask %x,ier %x\n", irq, mask, + printf("Disable one interrupt irq %x - mask %x,ier %x\n", irq, mask, intc->ier); - printf ("INTC isr %x, ier %x, iar %x, mer %x\n", intc->isr, intc->ier, + printf("INTC isr %x, ier %x, iar %x, mer %x\n", intc->isr, intc->ier, intc->iar, intc->mer); #endif } -/* adding new handler for interrupt */ -void install_interrupt_handler (int irq, interrupt_handler_t * hdlr, void *arg) +int install_interrupt_handler(int irq, interrupt_handler_t *hdlr, void *arg) { struct irq_action *act; + /* irq out of range */ if ((irq < 0) || (irq > irq_no)) { - puts ("IRQ out of range\n"); - return; + puts("IRQ out of range\n"); + return -1; } act = &vecs[irq]; if (hdlr) { /* enable */ @@ -106,11 +105,14 @@ void install_interrupt_handler (int irq, interrupt_handler_t * hdlr, void *arg) act->arg = arg; act->count = 0; enable_one_interrupt (irq); - } else { /* disable */ - act->handler = (interrupt_handler_t *) def_hdlr; - act->arg = (void *)irq; - disable_one_interrupt (irq); + return 0; } + + /* Disable */ + act->handler = (interrupt_handler_t *) def_hdlr; + act->arg = (void *)irq; + disable_one_interrupt(irq); + return 1; } /* initialization interrupt controller - hardware */ @@ -122,7 +124,7 @@ static void intc_init(void) /* XIntc_Start - hw_interrupt enable and all interrupt enable */ intc->mer = 0x3; #ifdef DEBUG_INT - printf ("INTC isr %x, ier %x, iar %x, mer %x\n", intc->isr, intc->ier, + printf("INTC isr %x, ier %x, iar %x, mer %x\n", intc->isr, intc->ier, intc->iar, intc->mer); #endif } @@ -157,7 +159,7 @@ int interrupts_init(void) return 0; } -void interrupt_handler (void) +void interrupt_handler(void) { int irqs = intc->ivr; /* find active interrupt */ int mask = 1; diff --git a/arch/microblaze/cpu/start.S b/arch/microblaze/cpu/start.S index 8a2f634..8564c4e 100644 --- a/arch/microblaze/cpu/start.S +++ b/arch/microblaze/cpu/start.S @@ -149,7 +149,7 @@ clear_bss: cmp r6, r5, r4 /* check if we have reach the end */ bnei r6, 2b 3: /* jumping to board_init */ - brai board_init + brai board_init_f 1: bri 1b /* diff --git a/arch/microblaze/cpu/timer.c b/arch/microblaze/cpu/timer.c index cc6b897..1330401 100644 --- a/arch/microblaze/cpu/timer.c +++ b/arch/microblaze/cpu/timer.c @@ -27,42 +27,30 @@ #include <asm/microblaze_intc.h> volatile int timestamp = 0; +microblaze_timer_t *tmr; -#ifdef CONFIG_SYS_TIMER_0 ulong get_timer (ulong base) { - return (timestamp - base); + if (tmr) + return timestamp - base; + return timestamp++ - base; } -#else -ulong get_timer (ulong base) -{ - return (timestamp++ - base); -} -#endif -#ifdef CONFIG_SYS_TIMER_0 void __udelay(unsigned long usec) { - int i; + u32 i; - i = get_timer(0); - while ((get_timer(0) - i) < (usec / 1000)) - ; + if (tmr) { + i = get_timer(0); + while ((get_timer(0) - i) < (usec / 1000)) + ; + } else { + for (i = 0; i < (usec * XILINX_CLOCK_FREQ / 10000000); i++) + ; + } } -#else -void __udelay(unsigned long usec) -{ - unsigned int i; - for (i = 0; i < (usec * CONFIG_XILINX_CLOCK_FREQ / 10000000); i++) - ; -} -#endif - -#ifdef CONFIG_SYS_TIMER_0 -microblaze_timer_t *tmr = (microblaze_timer_t *) (CONFIG_SYS_TIMER_0_ADDR); - -void timer_isr (void *arg) +static void timer_isr(void *arg) { timestamp++; tmr->control = tmr->control | TIMER_INTERRUPT; @@ -70,15 +58,30 @@ void timer_isr (void *arg) int timer_init (void) { - tmr->loadreg = CONFIG_SYS_TIMER_0_PRELOAD; - tmr->control = TIMER_INTERRUPT | TIMER_RESET; - tmr->control = - TIMER_ENABLE | TIMER_ENABLE_INTR | TIMER_RELOAD | TIMER_DOWN_COUNT; - timestamp = 0; - install_interrupt_handler (CONFIG_SYS_TIMER_0_IRQ, timer_isr, (void *)tmr); + int irq = -1; + u32 preload = 0; + u32 ret = 0; + +#if defined(CONFIG_SYS_TIMER_0_ADDR) && defined(CONFIG_SYS_INTC_0_NUM) + preload = XILINX_CLOCK_FREQ / CONFIG_SYS_HZ; + irq = CONFIG_SYS_TIMER_0_IRQ; + tmr = (microblaze_timer_t *) (CONFIG_SYS_TIMER_0_ADDR); +#endif + + if (tmr && preload && irq >= 0) { + tmr->loadreg = preload; + tmr->control = TIMER_INTERRUPT | TIMER_RESET; + tmr->control = TIMER_ENABLE | TIMER_ENABLE_INTR |\ + TIMER_RELOAD | TIMER_DOWN_COUNT; + timestamp = 0; + ret = install_interrupt_handler (irq, timer_isr, (void *)tmr); + if (ret) + tmr = NULL; + } + + /* No problem if timer is not found/initialized */ return 0; } -#endif /* * This function is derived from PowerPC code (read timebase as long long). diff --git a/arch/microblaze/cpu/u-boot.lds b/arch/microblaze/cpu/u-boot.lds index ee41145..d033a28 100644 --- a/arch/microblaze/cpu/u-boot.lds +++ b/arch/microblaze/cpu/u-boot.lds @@ -45,6 +45,7 @@ SECTIONS .data ALIGN(0x4): { __data_start = .; + dts/libdts.o (.data) *(.data) __data_end = .; } diff --git a/arch/microblaze/include/asm/global_data.h b/arch/microblaze/include/asm/global_data.h index 0dc4ce9..de3b8db 100644 --- a/arch/microblaze/include/asm/global_data.h +++ b/arch/microblaze/include/asm/global_data.h @@ -41,6 +41,7 @@ typedef struct global_data { unsigned long precon_buf_idx; /* Pre-Console buffer index */ #endif unsigned long env_addr; /* Address of Environment struct */ + const void *fdt_blob; /* Our device tree, NULL if none */ unsigned long env_valid; /* Checksum of Environment valid? */ unsigned long fb_base; /* base address of frame buffer */ void **jt; /* jump table */ diff --git a/arch/microblaze/include/asm/microblaze_intc.h b/arch/microblaze/include/asm/microblaze_intc.h index 6142b9c..e9640f5 100644 --- a/arch/microblaze/include/asm/microblaze_intc.h +++ b/arch/microblaze/include/asm/microblaze_intc.h @@ -39,7 +39,16 @@ struct irq_action { int count; /* number of interrupt */ }; -void install_interrupt_handler (int irq, interrupt_handler_t * hdlr, +/** + * Register and unregister interrupt handler rutines + * + * @param irq IRQ number + * @param hdlr Interrupt handler rutine + * @param arg Pointer to argument which is passed to int. handler rutine + * @return 0 if registration pass, 1 if unregistration pass, + * or an error code < 0 otherwise + */ +int install_interrupt_handler(int irq, interrupt_handler_t *hdlr, void *arg); int interrupts_init(void); diff --git a/arch/microblaze/include/asm/microblaze_timer.h b/arch/microblaze/include/asm/microblaze_timer.h index 844c8db..28e8b02 100644 --- a/arch/microblaze/include/asm/microblaze_timer.h +++ b/arch/microblaze/include/asm/microblaze_timer.h @@ -39,3 +39,6 @@ typedef volatile struct microblaze_timer_t { int loadreg; /* load register TLR */ int counter; /* timer/counter register */ } microblaze_timer_t; + +int timer_init(void); + diff --git a/arch/microblaze/include/asm/processor.h b/arch/microblaze/include/asm/processor.h index 2295d0a..2c4d5ff 100644 --- a/arch/microblaze/include/asm/processor.h +++ b/arch/microblaze/include/asm/processor.h @@ -28,4 +28,7 @@ extern char __end[]; extern char __text_start[]; +/* Microblaze board initialization function */ +void board_init(void); + #endif /* __ASM_MICROBLAZE_PROCESSOR_H */ diff --git a/arch/microblaze/lib/board.c b/arch/microblaze/lib/board.c index b80250a..674b573 100644 --- a/arch/microblaze/lib/board.c +++ b/arch/microblaze/lib/board.c @@ -32,21 +32,13 @@ #include <stdio_dev.h> #include <serial.h> #include <net.h> +#include <linux/compiler.h> #include <asm/processor.h> #include <asm/microblaze_intc.h> +#include <fdtdec.h> DECLARE_GLOBAL_DATA_PTR; -#ifdef CONFIG_SYS_GPIO_0 -extern int gpio_init (void); -#endif -#ifdef CONFIG_SYS_TIMER_0 -extern int timer_init (void); -#endif -#ifdef CONFIG_SYS_FSL_2 -extern void fsl_init2 (void); -#endif - /* * All attempts to come up with a "common" initialization sequence * that works for all boards and architectures failed: some of the @@ -63,31 +55,26 @@ typedef int (init_fnc_t) (void); init_fnc_t *init_sequence[] = { env_init, +#ifdef CONFIG_OF_CONTROL + fdtdec_check_fdt, +#endif serial_init, console_init_f, -#ifdef CONFIG_SYS_GPIO_0 - gpio_init, -#endif interrupts_init, -#ifdef CONFIG_SYS_TIMER_0 timer_init, -#endif -#ifdef CONFIG_SYS_FSL_2 - fsl_init2, -#endif NULL, }; unsigned long monitor_flash_len; -void board_init (void) +void board_init_f(ulong not_used) { bd_t *bd; init_fnc_t **init_fnc_ptr; gd = (gd_t *) (CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_GBL_DATA_OFFSET); bd = (bd_t *) (CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_GBL_DATA_OFFSET \ - GENERATED_BD_INFO_SIZE); - char *s; + __maybe_unused char *s; #if defined(CONFIG_CMD_FLASH) ulong flash_size = 0; #endif @@ -103,6 +90,17 @@ void board_init (void) monitor_flash_len = __end - __text_start; +#ifdef CONFIG_OF_EMBED + /* Get a pointer to the FDT */ + gd->fdt_blob = _binary_dt_dtb_start; +#elif defined CONFIG_OF_SEPARATE + /* FDT is at end of image */ + gd->fdt_blob = (void *)__end; +#endif + /* Allow the early environment to override the fdt address */ + gd->fdt_blob = (void *)getenv_ulong("fdtcontroladdr", 16, + (uintptr_t)gd->fdt_blob); + /* * The Malloc area is immediately below the monitor copy in DRAM * aka CONFIG_SYS_MONITOR_BASE - Note there is no need for reloc_off @@ -121,6 +119,15 @@ void board_init (void) } } +#ifdef CONFIG_OF_CONTROL + /* For now, put this check after the console is ready */ + if (fdtdec_prepare_fdt()) { + panic("** CONFIG_OF_CONTROL defined but no FDT - please see " + "doc/README.fdt-control"); + } else + printf("DTB: 0x%x\n", (u32)gd->fdt_blob); +#endif + puts ("SDRAM :\n"); printf ("\t\tIcache:%s\n", icache_status() ? "ON" : "OFF"); printf ("\t\tDcache:%s\n", dcache_status() ? "ON" : "OFF"); @@ -129,9 +136,8 @@ void board_init (void) #if defined(CONFIG_CMD_FLASH) puts ("Flash: "); bd->bi_flashstart = CONFIG_SYS_FLASH_BASE; - if (0 < (flash_size = flash_init ())) { - bd->bi_flashsize = flash_size; - bd->bi_flashoffset = CONFIG_SYS_FLASH_BASE + flash_size; + flash_size = flash_init(); + if (bd->bi_flashstart && flash_size > 0) { # ifdef CONFIG_SYS_FLASH_CHECKSUM print_size (flash_size, ""); /* @@ -142,13 +148,16 @@ void board_init (void) s = getenv ("flashchecksum"); if (s && (*s == 'y')) { printf (" CRC: %08X", - crc32 (0, (const unsigned char *) CONFIG_SYS_FLASH_BASE, flash_size) + crc32(0, (const u8 *)bd->bi_flashstart, + flash_size) ); } putc ('\n'); # else /* !CONFIG_SYS_FLASH_CHECKSUM */ print_size (flash_size, "\n"); # endif /* CONFIG_SYS_FLASH_CHECKSUM */ + bd->bi_flashsize = flash_size; + bd->bi_flashoffset = bd->bi_flashstart + flash_size; } else { puts ("Flash init FAILED"); bd->bi_flashstart = 0; @@ -169,6 +178,8 @@ void board_init (void) /* Initialize the console (after the relocation and devices init) */ console_init_r(); + board_init(); + /* Initialize from environment */ load_addr = getenv_ulong("loadaddr", 16, load_addr); diff --git a/board/xilinx/microblaze-generic/microblaze-generic.c b/board/xilinx/microblaze-generic/microblaze-generic.c index a1e2bfe..b75e62c 100644 --- a/board/xilinx/microblaze-generic/microblaze-generic.c +++ b/board/xilinx/microblaze-generic/microblaze-generic.c @@ -28,6 +28,7 @@ #include <common.h> #include <config.h> #include <netdev.h> +#include <asm/processor.h> #include <asm/microblaze_intc.h> #include <asm/asm.h> @@ -69,6 +70,14 @@ int fsl_init2 (void) { } #endif +void board_init(void) +{ + gpio_init(); +#ifdef CONFIG_SYS_FSL_2 + fsl_init2(); +#endif +} + int board_eth_init(bd_t *bis) { int ret = 0; diff --git a/common/cmd_mmc.c b/common/cmd_mmc.c index 750509d..79a1088 100644 --- a/common/cmd_mmc.c +++ b/common/cmd_mmc.c @@ -144,8 +144,7 @@ int do_mmcinfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) U_BOOT_CMD( mmcinfo, 1, 0, do_mmcinfo, "display MMC info", - " - device number of the device to dislay info of\n" - "" + "- dislay info of the current MMC device" ); int do_mmcops(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) diff --git a/common/env_mmc.c b/common/env_mmc.c index be2f2be..a2ff90b 100644 --- a/common/env_mmc.c +++ b/common/env_mmc.c @@ -75,9 +75,28 @@ static int init_mmc_for_env(struct mmc *mmc) return -1; } +#ifdef CONFIG_SYS_MMC_ENV_PART + if (CONFIG_SYS_MMC_ENV_PART != mmc->part_num) { + if (mmc_switch_part(CONFIG_SYS_MMC_ENV_DEV, + CONFIG_SYS_MMC_ENV_PART)) { + puts("MMC partition switch failed\n"); + return -1; + } + } +#endif + return 0; } +static void fini_mmc_for_env(struct mmc *mmc) +{ +#ifdef CONFIG_SYS_MMC_ENV_PART + if (CONFIG_SYS_MMC_ENV_PART != mmc->part_num) + mmc_switch_part(CONFIG_SYS_MMC_ENV_DEV, + mmc->part_num); +#endif +} + #ifdef CONFIG_CMD_SAVEENV static inline int write_env(struct mmc *mmc, unsigned long size, unsigned long offset, const void *buffer) @@ -100,26 +119,38 @@ int saveenv(void) char *res; struct mmc *mmc = find_mmc_device(CONFIG_SYS_MMC_ENV_DEV); u32 offset; + int ret; - if (init_mmc_for_env(mmc) || mmc_get_env_addr(mmc, &offset)) + if (init_mmc_for_env(mmc)) return 1; + if (mmc_get_env_addr(mmc, &offset)) { + ret = 1; + goto fini; + } + res = (char *)&env_new->data; len = hexport_r(&env_htab, '\0', &res, ENV_SIZE, 0, NULL); if (len < 0) { error("Cannot export environment: errno = %d\n", errno); - return 1; + ret = 1; + goto fini; } env_new->crc = crc32(0, &env_new->data[0], ENV_SIZE); printf("Writing to MMC(%d)... ", CONFIG_SYS_MMC_ENV_DEV); if (write_env(mmc, CONFIG_ENV_SIZE, offset, (u_char *)env_new)) { puts("failed\n"); - return 1; + ret = 1; + goto fini; } puts("done\n"); - return 0; + ret = 0; + +fini: + fini_mmc_for_env(mmc); + return ret; } #endif /* CONFIG_CMD_SAVEENV */ @@ -143,13 +174,30 @@ void env_relocate_spec(void) ALLOC_CACHE_ALIGN_BUFFER(char, buf, CONFIG_ENV_SIZE); struct mmc *mmc = find_mmc_device(CONFIG_SYS_MMC_ENV_DEV); u32 offset; + int ret; - if (init_mmc_for_env(mmc) || mmc_get_env_addr(mmc, &offset)) - return set_default_env(NULL); + if (init_mmc_for_env(mmc)) { + ret = 1; + goto err; + } - if (read_env(mmc, CONFIG_ENV_SIZE, offset, buf)) - return set_default_env(NULL); + if (mmc_get_env_addr(mmc, &offset)) { + ret = 1; + goto fini; + } + + if (read_env(mmc, CONFIG_ENV_SIZE, offset, buf)) { + ret = 1; + goto fini; + } env_import(buf, 1); + ret = 0; + +fini: + fini_mmc_for_env(mmc); +err: + if (ret) + set_default_env(NULL); #endif } diff --git a/drivers/block/systemace.c b/drivers/block/systemace.c index 58402b9..247cf06 100644 --- a/drivers/block/systemace.c +++ b/drivers/block/systemace.c @@ -51,24 +51,36 @@ * to be the base address for the chip, usually in the local * peripheral bus. */ -#if (CONFIG_SYS_SYSTEMACE_WIDTH == 8) + +static u32 base = CONFIG_SYS_SYSTEMACE_BASE; +static u32 width = CONFIG_SYS_SYSTEMACE_WIDTH; + +static void ace_writew(u16 val, unsigned off) +{ + if (width == 8) { #if !defined(__BIG_ENDIAN) -#define ace_readw(off) ((readb(CONFIG_SYS_SYSTEMACE_BASE+off)<<8) | \ - (readb(CONFIG_SYS_SYSTEMACE_BASE+off+1))) -#define ace_writew(val, off) {writeb(val>>8, CONFIG_SYS_SYSTEMACE_BASE+off); \ - writeb(val, CONFIG_SYS_SYSTEMACE_BASE+off+1);} + writeb(val >> 8, base + off); + writeb(val, base + off + 1); #else -#define ace_readw(off) ((readb(CONFIG_SYS_SYSTEMACE_BASE+off)) | \ - (readb(CONFIG_SYS_SYSTEMACE_BASE+off+1)<<8)) -#define ace_writew(val, off) {writeb(val, CONFIG_SYS_SYSTEMACE_BASE+off); \ - writeb(val>>8, CONFIG_SYS_SYSTEMACE_BASE+off+1);} + writeb(val, base + off); + writeb(val >> 8, base + off + 1); #endif + } + out16(base + off, val); +} + +static u16 ace_readw(unsigned off) +{ + if (width == 8) { +#if !defined(__BIG_ENDIAN) + return (readb(base + off) << 8) | readb(base + off + 1); #else -#define ace_readw(off) (in16(CONFIG_SYS_SYSTEMACE_BASE+off)) -#define ace_writew(val, off) (out16(CONFIG_SYS_SYSTEMACE_BASE+off,val)) + return readb(base + off) | (readb(base + off + 1) << 8); #endif + } -/* */ + return in16(base + off); +} static unsigned long systemace_read(int dev, unsigned long start, unsigned long blkcnt, void *buffer); @@ -121,7 +133,7 @@ block_dev_desc_t *systemace_get_dev(int dev) /* * Ensure the correct bus mode (8/16 bits) gets enabled */ - ace_writew(CONFIG_SYS_SYSTEMACE_WIDTH == 8 ? 0 : 0x0001, 0); + ace_writew(width == 8 ? 0 : 0x0001, 0); init_part(&systemace_dev); diff --git a/drivers/mmc/arm_pl180_mmci.c b/drivers/mmc/arm_pl180_mmci.c index db2c7ab..af1380a 100644 --- a/drivers/mmc/arm_pl180_mmci.c +++ b/drivers/mmc/arm_pl180_mmci.c @@ -52,7 +52,7 @@ static int wait_for_command_end(struct mmc *dev, struct mmc_cmd *cmd) debug("CMD%d time out\n", cmd->cmdidx); return TIMEOUT; } else if ((hoststatus & SDI_STA_CCRCFAIL) && - (cmd->flags & MMC_RSP_CRC)) { + (cmd->resp_type & MMC_RSP_CRC)) { printf("CMD%d CRC error\n", cmd->cmdidx); return -EILSEQ; } diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c index fa673cf..a60cfe1 100644 --- a/drivers/mmc/mmc.c +++ b/drivers/mmc/mmc.c @@ -236,7 +236,7 @@ int mmc_send_status(struct mmc *mmc, int timeout) status = (cmd.response[0] & MMC_STATUS_CURR_STATE) >> 9; printf("CURR STATE:%d\n", status); #endif - if (!timeout) { + if (timeout <= 0) { printf("Timeout waiting card ready\n"); return TIMEOUT; } @@ -658,7 +658,7 @@ int mmc_send_op_cond(struct mmc *mmc) } -int mmc_send_ext_csd(struct mmc *mmc, char *ext_csd) +int mmc_send_ext_csd(struct mmc *mmc, u8 *ext_csd) { struct mmc_cmd cmd; struct mmc_data data; @@ -669,7 +669,7 @@ int mmc_send_ext_csd(struct mmc *mmc, char *ext_csd) cmd.resp_type = MMC_RSP_R1; cmd.cmdarg = 0; - data.dest = ext_csd; + data.dest = (char *)ext_csd; data.blocks = 1; data.blocksize = 512; data.flags = MMC_DATA_READ; @@ -704,7 +704,7 @@ int mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value) int mmc_change_freq(struct mmc *mmc) { - ALLOC_CACHE_ALIGN_BUFFER(char, ext_csd, 512); + ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, 512); char cardtype; int err; @@ -963,8 +963,8 @@ int mmc_startup(struct mmc *mmc) uint mult, freq; u64 cmult, csize, capacity; struct mmc_cmd cmd; - ALLOC_CACHE_ALIGN_BUFFER(char, ext_csd, 512); - ALLOC_CACHE_ALIGN_BUFFER(char, test_csd, 512); + ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, 512); + ALLOC_CACHE_ALIGN_BUFFER(u8, test_csd, 512); int timeout = 1000; #ifdef CONFIG_MMC_SPI_CRC_ON @@ -1137,7 +1137,8 @@ int mmc_startup(struct mmc *mmc) } /* store the partition info of emmc */ - if (ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) + if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) || + ext_csd[EXT_CSD_BOOT_MULT]) mmc->part_config = ext_csd[EXT_CSD_PART_CONF]; } @@ -1232,7 +1233,9 @@ int mmc_startup(struct mmc *mmc) (mmc->cid[1] >> 8) & 0xff, mmc->cid[1] & 0xff); sprintf(mmc->block_dev.revision, "%d.%d", mmc->cid[2] >> 28, (mmc->cid[2] >> 24) & 0xf); +#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBDISK_SUPPORT) init_part(&mmc->block_dev); +#endif return 0; } @@ -1283,10 +1286,9 @@ int mmc_register(struct mmc *mmc) block_dev_desc_t *mmc_get_dev(int dev) { struct mmc *mmc = find_mmc_device(dev); - if (!mmc) + if (!mmc || mmc_init(mmc)) return NULL; - mmc_init(mmc); return &mmc->block_dev; } #endif diff --git a/drivers/mmc/pxa_mmc_gen.c b/drivers/mmc/pxa_mmc_gen.c index 2c5bf17..b3ec441 100644 --- a/drivers/mmc/pxa_mmc_gen.c +++ b/drivers/mmc/pxa_mmc_gen.c @@ -118,7 +118,7 @@ static int pxa_mmc_start_cmd(struct mmc *mmc, struct mmc_cmd *cmd, int ret; /* The card can send a "busy" response */ - if (cmd->flags & MMC_RSP_BUSY) + if (cmd->resp_type & MMC_RSP_BUSY) cmdat |= MMC_CMDAT_BUSY; /* Inform the controller about response type */ @@ -181,9 +181,11 @@ static int pxa_mmc_cmd_done(struct mmc *mmc, struct mmc_cmd *cmd) /* The command response didn't arrive */ if (stat & MMC_STAT_TIME_OUT_RESPONSE) return -ETIMEDOUT; - else if (stat & MMC_STAT_RES_CRC_ERROR && cmd->flags & MMC_RSP_CRC) { + else if (stat & MMC_STAT_RES_CRC_ERROR + && cmd->resp_type & MMC_RSP_CRC) { #ifdef PXAMMC_CRC_SKIP - if (cmd->flags & MMC_RSP_136 && cmd->response[0] & (1 << 31)) + if (cmd->resp_type & MMC_RSP_136 + && cmd->response[0] & (1 << 31)) printf("Ignoring CRC, this may be dangerous!\n"); else #endif diff --git a/drivers/mmc/s5p_sdhci.c b/drivers/mmc/s5p_sdhci.c index 1d4481b..b978236 100644 --- a/drivers/mmc/s5p_sdhci.c +++ b/drivers/mmc/s5p_sdhci.c @@ -21,6 +21,7 @@ #include <malloc.h> #include <sdhci.h> #include <asm/arch/mmc.h> +#include <asm/arch/clk.h> static char *S5P_NAME = "SAMSUNG SDHCI"; static void s5p_sdhci_set_control_reg(struct sdhci_host *host) @@ -54,7 +55,7 @@ static void s5p_sdhci_set_control_reg(struct sdhci_host *host) * 00 = Delay3 (inverter delay) * 10 = Delay4 (inverter delay + 2ns) */ - val = SDHCI_CTRL3_FCSEL3 | SDHCI_CTRL3_FCSEL1; + val = SDHCI_CTRL3_FCSEL0 | SDHCI_CTRL3_FCSEL1; sdhci_writel(host, val, SDHCI_CONTROL3); /* @@ -69,7 +70,7 @@ static void s5p_sdhci_set_control_reg(struct sdhci_host *host) sdhci_writel(host, ctrl, SDHCI_CONTROL2); } -int s5p_sdhci_init(u32 regbase, u32 max_clk, u32 min_clk, u32 quirks) +int s5p_sdhci_init(u32 regbase, int index, int bus_width) { struct sdhci_host *host = NULL; host = (struct sdhci_host *)malloc(sizeof(struct sdhci_host)); @@ -80,19 +81,18 @@ int s5p_sdhci_init(u32 regbase, u32 max_clk, u32 min_clk, u32 quirks) host->name = S5P_NAME; host->ioaddr = (void *)regbase; - host->quirks = quirks; - host->quirks |= SDHCI_QUIRK_NO_HISPD_BIT | SDHCI_QUIRK_BROKEN_VOLTAGE; + host->quirks = SDHCI_QUIRK_NO_HISPD_BIT | SDHCI_QUIRK_BROKEN_VOLTAGE | + SDHCI_QUIRK_BROKEN_R1B | SDHCI_QUIRK_32BIT_DMA_ADDR; host->voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195; - if (quirks & SDHCI_QUIRK_REG32_RW) - host->version = sdhci_readl(host, SDHCI_HOST_VERSION - 2) >> 16; - else - host->version = sdhci_readw(host, SDHCI_HOST_VERSION); + host->version = sdhci_readw(host, SDHCI_HOST_VERSION); host->set_control_reg = &s5p_sdhci_set_control_reg; + host->set_clock = set_mmc_clk; + host->index = index; host->host_caps = MMC_MODE_HC; - add_sdhci(host, max_clk, min_clk); + add_sdhci(host, 52000000, 400000); return 0; } diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c index 1709643..2e3c408 100644 --- a/drivers/mmc/sdhci.c +++ b/drivers/mmc/sdhci.c @@ -260,7 +260,7 @@ static int sdhci_set_clock(struct mmc *mmc, unsigned int clock) if (clock == 0) return 0; - if (host->version >= SDHCI_SPEC_300) { + if ((host->version & SDHCI_SPEC_VER_MASK) >= SDHCI_SPEC_300) { /* Version 3.00 divisors must be a multiple of 2. */ if (mmc->f_max <= clock) div = 1; @@ -279,6 +279,9 @@ static int sdhci_set_clock(struct mmc *mmc, unsigned int clock) } div >>= 1; + if (host->set_clock) + host->set_clock(host->index, div); + clk = (div & SDHCI_DIV_MASK) << SDHCI_DIVIDER_SHIFT; clk |= ((div & SDHCI_DIV_HI_MASK) >> SDHCI_DIV_MASK_LEN) << SDHCI_DIVIDER_HI_SHIFT; @@ -347,10 +350,10 @@ void sdhci_set_ios(struct mmc *mmc) ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL); if (mmc->bus_width == 8) { ctrl &= ~SDHCI_CTRL_4BITBUS; - if (host->version >= SDHCI_SPEC_300) + if ((host->version & SDHCI_SPEC_VER_MASK) >= SDHCI_SPEC_300) ctrl |= SDHCI_CTRL_8BITBUS; } else { - if (host->version >= SDHCI_SPEC_300) + if ((host->version & SDHCI_SPEC_VER_MASK) >= SDHCI_SPEC_300) ctrl &= ~SDHCI_CTRL_8BITBUS; if (mmc->bus_width == 4) ctrl |= SDHCI_CTRL_4BITBUS; @@ -381,12 +384,25 @@ int sdhci_init(struct mmc *mmc) } } + sdhci_set_power(host, fls(mmc->voltages) - 1); + + if (host->quirks & SDHCI_QUIRK_NO_CD) { + unsigned int status; + + sdhci_writel(host, SDHCI_CTRL_CD_TEST_INS | SDHCI_CTRL_CD_TEST, + SDHCI_HOST_CONTROL); + + status = sdhci_readl(host, SDHCI_PRESENT_STATE); + while ((!(status & SDHCI_CARD_PRESENT)) || + (!(status & SDHCI_CARD_STATE_STABLE)) || + (!(status & SDHCI_CARD_DETECT_PIN_LEVEL))) + status = sdhci_readl(host, SDHCI_PRESENT_STATE); + } + /* Eable all state */ sdhci_writel(host, SDHCI_INT_ALL_MASK, SDHCI_INT_ENABLE); sdhci_writel(host, SDHCI_INT_ALL_MASK, SDHCI_SIGNAL_ENABLE); - sdhci_set_power(host, fls(mmc->voltages) - 1); - return 0; } @@ -421,7 +437,7 @@ int add_sdhci(struct sdhci_host *host, u32 max_clk, u32 min_clk) if (max_clk) mmc->f_max = max_clk; else { - if (host->version >= SDHCI_SPEC_300) + if ((host->version & SDHCI_SPEC_VER_MASK) >= SDHCI_SPEC_300) mmc->f_max = (caps & SDHCI_CLOCK_V3_BASE_MASK) >> SDHCI_CLOCK_BASE_SHIFT; else @@ -436,7 +452,7 @@ int add_sdhci(struct sdhci_host *host, u32 max_clk, u32 min_clk) if (min_clk) mmc->f_min = min_clk; else { - if (host->version >= SDHCI_SPEC_300) + if ((host->version & SDHCI_SPEC_VER_MASK) >= SDHCI_SPEC_300) mmc->f_min = mmc->f_max / SDHCI_MAX_DIV_SPEC_300; else mmc->f_min = mmc->f_max / SDHCI_MAX_DIV_SPEC_200; diff --git a/drivers/mmc/sh_mmcif.c b/drivers/mmc/sh_mmcif.c index 2835e24..4588568 100644 --- a/drivers/mmc/sh_mmcif.c +++ b/drivers/mmc/sh_mmcif.c @@ -593,7 +593,7 @@ int mmcif_mmc_init(void) mmc->f_max = CLKDEV_EMMC_DATA; mmc->voltages = MMC_VDD_32_33 | MMC_VDD_33_34; mmc->host_caps = MMC_MODE_HS | MMC_MODE_HS_52MHz | MMC_MODE_4BIT | - MMC_MODE_8BIT; + MMC_MODE_8BIT | MMC_MODE_HC; memcpy(mmc->name, DRIVER_NAME, sizeof(DRIVER_NAME)); mmc->send_cmd = sh_mmcif_request; mmc->set_ios = sh_mmcif_set_ios; diff --git a/drivers/serial/serial_xuartlite.c b/drivers/serial/serial_xuartlite.c index 3a38f9e..2bdb68b 100644 --- a/drivers/serial/serial_xuartlite.c +++ b/drivers/serial/serial_xuartlite.c @@ -89,11 +89,17 @@ int uartlite_serial_tstc(const int port) return in_be32(®s->status) & SR_RX_FIFO_VALID_DATA; } +static int uartlite_serial_init(const int port) +{ + if (userial_ports[port]) + return 0; + return -1; +} + #if !defined(CONFIG_SERIAL_MULTI) int serial_init(void) { - /* FIXME: Nothing for now. We should initialize fifo, etc */ - return 0; + return uartlite_serial_init(0); } void serial_setbrg(void) @@ -126,7 +132,7 @@ int serial_tstc(void) /* Multi serial device functions */ #define DECLARE_ESERIAL_FUNCTIONS(port) \ int userial##port##_init(void) \ - { return(0); } \ + { return uartlite_serial_init(port); } \ void userial##port##_setbrg(void) {} \ int userial##port##_getc(void) \ { return uartlite_serial_getc(port); } \ @@ -163,17 +169,15 @@ struct serial_device uartlite_serial3_device = __weak struct serial_device *default_serial_console(void) { -# ifdef XILINX_UARTLITE_BASEADDR - return &uartlite_serial0_device; -# endif /* XILINX_UARTLITE_BASEADDR */ -# ifdef XILINX_UARTLITE_BASEADDR1 - return &uartlite_serial1_device; -# endif /* XILINX_UARTLITE_BASEADDR1 */ -# ifdef XILINX_UARTLITE_BASEADDR2 - return &uartlite_serial2_device; -# endif /* XILINX_UARTLITE_BASEADDR2 */ -# ifdef XILINX_UARTLITE_BASEADDR3 - return &uartlite_serial3_device; -# endif /* XILINX_UARTLITE_BASEADDR3 */ + if (userial_ports[0]) + return &uartlite_serial0_device; + if (userial_ports[1]) + return &uartlite_serial1_device; + if (userial_ports[2]) + return &uartlite_serial2_device; + if (userial_ports[3]) + return &uartlite_serial3_device; + + return NULL; } #endif /* CONFIG_SERIAL_MULTI */ diff --git a/drivers/spi/xilinx_spi.c b/drivers/spi/xilinx_spi.c index e563c19..52a4134 100644 --- a/drivers/spi/xilinx_spi.c +++ b/drivers/spi/xilinx_spi.c @@ -78,7 +78,6 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, unsigned int max_hz, unsigned int mode) { struct xilinx_spi_slave *xilspi; - struct xilinx_spi_reg *regs; if (!spi_cs_is_valid(bus, cs)) { printf("XILSPI error: %s: unsupported bus %d / cs %d\n", diff --git a/include/configs/microblaze-generic.h b/include/configs/microblaze-generic.h index 1266cf7..721cd90 100644 --- a/include/configs/microblaze-generic.h +++ b/include/configs/microblaze-generic.h @@ -115,19 +115,11 @@ #endif /* timer */ -#ifdef XILINX_TIMER_BASEADDR -# if (XILINX_TIMER_IRQ != -1) -# define CONFIG_SYS_TIMER_0 1 +#if defined(XILINX_TIMER_BASEADDR) && defined(XILINX_TIMER_IRQ) # define CONFIG_SYS_TIMER_0_ADDR XILINX_TIMER_BASEADDR # define CONFIG_SYS_TIMER_0_IRQ XILINX_TIMER_IRQ -# define FREQUENCE XILINX_CLOCK_FREQ -# define CONFIG_SYS_TIMER_0_PRELOAD ( FREQUENCE/1000 ) -# endif -#elif XILINX_CLOCK_FREQ -# define CONFIG_XILINX_CLOCK_FREQ XILINX_CLOCK_FREQ -#else -# error BAD CLOCK FREQ #endif + /* FSL */ /* #define CONFIG_SYS_FSL_2 */ /* #define FSL_INTR_2 1 */ diff --git a/include/configs/paz00.h b/include/configs/paz00.h index 0eb9f3b..99b8753 100644 --- a/include/configs/paz00.h +++ b/include/configs/paz00.h @@ -51,8 +51,9 @@ /* Environment in eMMC, at the end of 2nd "boot sector" */ #define CONFIG_ENV_IS_IN_MMC -#define CONFIG_ENV_OFFSET ((2 * 1024 * 1024) - CONFIG_ENV_SIZE) +#define CONFIG_ENV_OFFSET ((1024 * 1024) - CONFIG_ENV_SIZE) #define CONFIG_SYS_MMC_ENV_DEV 0 +#define CONFIG_SYS_MMC_ENV_PART 2 /* USB Host support */ #define CONFIG_USB_EHCI diff --git a/include/configs/seaboard.h b/include/configs/seaboard.h index afc4a85..8dc6d4b 100644 --- a/include/configs/seaboard.h +++ b/include/configs/seaboard.h @@ -77,8 +77,9 @@ /* Environment in eMMC, at the end of 2nd "boot sector" */ #define CONFIG_ENV_IS_IN_MMC -#define CONFIG_ENV_OFFSET ((2 * 512 * 1024) - CONFIG_ENV_SIZE) +#define CONFIG_ENV_OFFSET ((512 * 1024) - CONFIG_ENV_SIZE) #define CONFIG_SYS_MMC_ENV_DEV 0 +#define CONFIG_SYS_MMC_ENV_PART 2 /* USB Host support */ #define CONFIG_USB_EHCI diff --git a/include/configs/trats.h b/include/configs/trats.h index f8da9c01..794b6fb 100644 --- a/include/configs/trats.h +++ b/include/configs/trats.h @@ -78,6 +78,7 @@ #define CONFIG_MMC #define CONFIG_S5P_SDHCI #define CONFIG_SDHCI +#define CONFIG_MMC_SDMA /* PWM */ #define CONFIG_PWM diff --git a/include/configs/ventana.h b/include/configs/ventana.h index 25ec2eb..f5e1bf8 100644 --- a/include/configs/ventana.h +++ b/include/configs/ventana.h @@ -58,8 +58,9 @@ /* Environment in eMMC, at the end of 2nd "boot sector" */ #define CONFIG_ENV_IS_IN_MMC -#define CONFIG_ENV_OFFSET ((2 * 1024 * 1024) - CONFIG_ENV_SIZE) +#define CONFIG_ENV_OFFSET ((1024 * 1024) - CONFIG_ENV_SIZE) #define CONFIG_SYS_MMC_ENV_DEV 0 +#define CONFIG_SYS_MMC_ENV_PART 2 /* USB Host support */ #define CONFIG_USB_EHCI diff --git a/include/configs/whistler.h b/include/configs/whistler.h index b747d0e..3235718 100644 --- a/include/configs/whistler.h +++ b/include/configs/whistler.h @@ -72,8 +72,9 @@ * particular card is standard practice as far as I know. */ #define CONFIG_ENV_IS_IN_MMC -#define CONFIG_ENV_OFFSET ((2 * 512 * 1024) - CONFIG_ENV_SIZE) +#define CONFIG_ENV_OFFSET ((512 * 1024) - CONFIG_ENV_SIZE) #define CONFIG_SYS_MMC_ENV_DEV 0 +#define CONFIG_SYS_MMC_ENV_PART 2 /* USB Host support */ #define CONFIG_USB_EHCI diff --git a/include/mmc.h b/include/mmc.h index 7b094a4..a13e2bd 100644 --- a/include/mmc.h +++ b/include/mmc.h @@ -160,6 +160,7 @@ #define EXT_CSD_CARD_TYPE 196 /* RO */ #define EXT_CSD_SEC_CNT 212 /* RO, 4 bytes */ #define EXT_CSD_HC_ERASE_GRP_SIZE 224 /* RO */ +#define EXT_CSD_BOOT_MULT 226 /* RO */ /* * EXT_CSD field definitions diff --git a/include/sdhci.h b/include/sdhci.h index 9d37183..c0345ed 100644 --- a/include/sdhci.h +++ b/include/sdhci.h @@ -76,6 +76,8 @@ #define SDHCI_SPACE_AVAILABLE 0x00000400 #define SDHCI_DATA_AVAILABLE 0x00000800 #define SDHCI_CARD_PRESENT 0x00010000 +#define SDHCI_CARD_STATE_STABLE 0x00020000 +#define SDHCI_CARD_DETECT_PIN_LEVEL 0x00040000 #define SDHCI_WRITE_PROTECT 0x00080000 #define SDHCI_HOST_CONTROL 0x28 @@ -87,7 +89,9 @@ #define SDHCI_CTRL_ADMA1 0x08 #define SDHCI_CTRL_ADMA32 0x10 #define SDHCI_CTRL_ADMA64 0x18 -#define SDHCI_CTRL_8BITBUS 0x20 +#define SDHCI_CTRL_8BITBUS 0x20 +#define SDHCI_CTRL_CD_TEST_INS 0x40 +#define SDHCI_CTRL_CD_TEST 0x80 #define SDHCI_POWER_CONTROL 0x29 #define SDHCI_POWER_ON 0x01 @@ -219,6 +223,7 @@ #define SDHCI_QUIRK_BROKEN_R1B (1 << 2) #define SDHCI_QUIRK_NO_HISPD_BIT (1 << 3) #define SDHCI_QUIRK_BROKEN_VOLTAGE (1 << 4) +#define SDHCI_QUIRK_NO_CD (1 << 5) /* to make gcc happy */ struct sdhci_host; @@ -248,8 +253,10 @@ struct sdhci_host { unsigned int clock; struct mmc *mmc; const struct sdhci_ops *ops; + int index; void (*set_control_reg)(struct sdhci_host *host); + void (*set_clock)(int dev_index, unsigned int div); uint voltages; }; diff --git a/include/serial.h b/include/serial.h index cbdf8a9..d76d6df 100644 --- a/include/serial.h +++ b/include/serial.h @@ -31,7 +31,8 @@ extern struct serial_device *default_serial_console(void); defined(CONFIG_MB86R0x) || defined(CONFIG_MPC5xxx) || \ defined(CONFIG_MPC83xx) || defined(CONFIG_MPC85xx) || \ defined(CONFIG_MPC86xx) || defined(CONFIG_SYS_SC520) || \ - defined(CONFIG_TEGRA20) || defined(CONFIG_SYS_COREBOOT) + defined(CONFIG_TEGRA20) || defined(CONFIG_SYS_COREBOOT) || \ + defined(CONFIG_MICROBLAZE) extern struct serial_device serial0_device; extern struct serial_device serial1_device; #if defined(CONFIG_SYS_NS16550_SERIAL) |