diff options
| -rw-r--r-- | arch/powerpc/include/asm/immap_85xx.h | 5 | ||||
| -rw-r--r-- | board/freescale/mpc8536ds/mpc8536ds.c | 6 | ||||
| -rw-r--r-- | include/configs/MPC8536DS.h | 14 |
3 files changed, 21 insertions, 4 deletions
diff --git a/arch/powerpc/include/asm/immap_85xx.h b/arch/powerpc/include/asm/immap_85xx.h index fb5ef91..a29fe35 100644 --- a/arch/powerpc/include/asm/immap_85xx.h +++ b/arch/powerpc/include/asm/immap_85xx.h @@ -1934,7 +1934,12 @@ typedef struct ccsr_gur { u8 res1[8]; u32 gpporcr; /* General-purpose POR configuration */ u8 res2[12]; +#if defined(CONFIG_MPC8536) + u32 gencfgr; /* General Configuration Register */ +#define MPC85xx_GENCFGR_SDHC_WP_INV 0x20000000 +#else u32 gpiocr; /* GPIO control */ +#endif u8 res3[12]; #if defined(CONFIG_MPC8569) u32 plppar1; /* Platform port pin assignment 1 */ diff --git a/board/freescale/mpc8536ds/mpc8536ds.c b/board/freescale/mpc8536ds/mpc8536ds.c index b292e13..2beea34 100644 --- a/board/freescale/mpc8536ds/mpc8536ds.c +++ b/board/freescale/mpc8536ds/mpc8536ds.c @@ -1,5 +1,5 @@ /* - * Copyright 2008-2010 Freescale Semiconductor, Inc. + * Copyright 2008-2010, 2011 Freescale Semiconductor, Inc. * * See file CREDITS for list of people who contributed to this * project. @@ -49,10 +49,8 @@ int board_early_init_f (void) volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); setbits_be32(&gur->pmuxcr, - (MPC85xx_PMUXCR_SD_DATA | - MPC85xx_PMUXCR_SDHC_CD | + (MPC85xx_PMUXCR_SDHC_CD | MPC85xx_PMUXCR_SDHC_WP)); - #endif return 0; } diff --git a/include/configs/MPC8536DS.h b/include/configs/MPC8536DS.h index 3efe937..36e25f6 100644 --- a/include/configs/MPC8536DS.h +++ b/include/configs/MPC8536DS.h @@ -77,6 +77,7 @@ #define CONFIG_MPC8536DS 1 #define CONFIG_FSL_ELBC 1 /* Has Enhanced localbus controller */ +#define CONFIG_SPI_FLASH 1 /* Has SPI Flash */ #define CONFIG_PCI 1 /* Enable PCI/PCIE */ #define CONFIG_PCI1 1 /* Enable PCI controller 1 */ #define CONFIG_PCIE1 1 /* PCIE controler 1 (slot 1) */ @@ -458,6 +459,19 @@ #define CONFIG_SYS_EEPROM_BUS_NUM 1 /* + * eSPI - Enhanced SPI + */ +#define CONFIG_HARD_SPI +#define CONFIG_FSL_ESPI + +#if defined(CONFIG_SPI_FLASH) +#define CONFIG_SPI_FLASH_SPANSION +#define CONFIG_CMD_SF +#define CONFIG_SF_DEFAULT_SPEED 10000000 +#define CONFIG_SF_DEFAULT_MODE 0 +#endif + +/* * General PCI * Memory space is mapped 1-1, but I/O space must start from 0. */ |