diff options
-rw-r--r-- | arch/sh/lib/time.c | 7 | ||||
-rw-r--r-- | drivers/net/sh_eth.c | 52 | ||||
-rw-r--r-- | drivers/net/sh_eth.h | 41 | ||||
-rw-r--r-- | drivers/serial/serial_sh.h | 2 | ||||
-rw-r--r-- | include/configs/ecovec.h | 1 | ||||
-rw-r--r-- | include/configs/rsk7264.h | 2 | ||||
-rw-r--r-- | post/Makefile | 2 | ||||
-rw-r--r-- | tools/mxsboot.c | 2 |
8 files changed, 69 insertions, 40 deletions
diff --git a/arch/sh/lib/time.c b/arch/sh/lib/time.c index c70baed..a01596c 100644 --- a/arch/sh/lib/time.c +++ b/arch/sh/lib/time.c @@ -108,14 +108,9 @@ int timer_init (void) unsigned long long get_ticks (void) { unsigned long tcnt = 0 - readl(TCNT0); - unsigned long ticks; - if (last_tcnt > tcnt) { /* overflow */ + if (last_tcnt > tcnt) /* overflow */ overflow_ticks++; - ticks = (0xffffffff - last_tcnt) + tcnt; - } else { - ticks = tcnt; - } last_tcnt = tcnt; return (overflow_ticks << 32) | tcnt; diff --git a/drivers/net/sh_eth.c b/drivers/net/sh_eth.c index 27d0401..8d3dac2 100644 --- a/drivers/net/sh_eth.c +++ b/drivers/net/sh_eth.c @@ -1,8 +1,8 @@ /* * sh_eth.c - Driver for Renesas SH7763's ethernet controler. * - * Copyright (C) 2008 Renesas Solutions Corp. - * Copyright (c) 2008 Nobuhiro Iwamatsu + * Copyright (C) 2008, 2011 Renesas Solutions Corp. + * Copyright (c) 2008, 2011 Nobuhiro Iwamatsu * Copyright (c) 2007 Carlos Munoz <carlos@kenati.com> * * This program is free software; you can redistribute it and/or modify @@ -44,7 +44,7 @@ #define flush_cache_wback(...) #endif -#define SH_ETH_PHY_DELAY 50000 +#define TIMEOUT_CNT 1000 int sh_eth_send(struct eth_device *dev, volatile void *packet, int len) { @@ -80,7 +80,7 @@ int sh_eth_send(struct eth_device *dev, volatile void *packet, int len) outl(EDTRR_TRNS, EDTRR(port)); /* Wait until packet is transmitted */ - timeout = 1000; + timeout = TIMEOUT_CNT; while (port_info->tx_desc_cur->td0 & TD_TACT && timeout--) udelay(100); @@ -94,7 +94,6 @@ int sh_eth_send(struct eth_device *dev, volatile void *packet, int len) if (port_info->tx_desc_cur >= port_info->tx_desc_base + NUM_TX_DESC) port_info->tx_desc_cur = port_info->tx_desc_base; - return ret; err: return ret; } @@ -136,7 +135,6 @@ int sh_eth_recv(struct eth_device *dev) return len; } -#define EDMR_INIT_CNT 1000 static int sh_eth_reset(struct sh_eth_dev *eth) { int port = eth->port; @@ -148,13 +146,13 @@ static int sh_eth_reset(struct sh_eth_dev *eth) /* Perform a software reset and wait for it to complete */ outl(EDMR_SRST, EDMR(port)); - for (i = 0; i < EDMR_INIT_CNT; i++) { + for (i = 0; i < TIMEOUT_CNT ; i++) { if (!(inl(EDMR(port)) & EDMR_SRST)) break; udelay(1000); } - if (i == EDMR_INIT_CNT) { + if (i == TIMEOUT_CNT) { printf(SHETHER_NAME ": Software reset timeout\n"); ret = -EIO; } @@ -371,7 +369,7 @@ static int sh_eth_config(struct sh_eth_dev *eth, bd_t *bd) outl(0, TFTR(port)); outl((FIFO_SIZE_T | FIFO_SIZE_R), FDR(port)); outl(RMCR_RST, RMCR(port)); -#ifndef CONFIG_CPU_SH7757 +#if !defined(CONFIG_CPU_SH7757) && !defined(CONFIG_CPU_SH7724) outl(0, RPADIR(port)); #endif outl((FIFO_F_D_RFF | FIFO_F_D_RFD), FCFTR(port)); @@ -393,16 +391,19 @@ static int sh_eth_config(struct sh_eth_dev *eth, bd_t *bd) outl(val, MALR(port)); outl(RFLR_RFL_MIN, RFLR(port)); -#ifndef CONFIG_CPU_SH7757 +#if !defined(CONFIG_CPU_SH7757) && !defined(CONFIG_CPU_SH7724) outl(0, PIPR(port)); #endif +#if !defined(CONFIG_CPU_SH7724) outl(APR_AP, APR(port)); outl(MPR_MP, MPR(port)); -#ifdef CONFIG_CPU_SH7757 - outl(TPAUSER_UNLIMITED, TPAUSER(port)); -#else +#endif +#if defined(CONFIG_CPU_SH7763) outl(TPAUSER_TPAUSE, TPAUSER(port)); +#elif defined(CONFIG_CPU_SH7757) + outl(TPAUSER_UNLIMITED, TPAUSER(port)); #endif + /* Configure phy */ ret = sh_eth_phy_config(eth); if (ret) { @@ -412,33 +413,34 @@ static int sh_eth_config(struct sh_eth_dev *eth, bd_t *bd) phy = port_info->phydev; phy_startup(phy); + val = 0; + /* Set the transfer speed */ -#ifdef CONFIG_CPU_SH7763 if (phy->speed == 100) { printf(SHETHER_NAME ": 100Base/"); +#ifdef CONFIG_CPU_SH7763 outl(GECMR_100B, GECMR(port)); +#elif defined(CONFIG_CPU_SH7757) + outl(1, RTRATE(port)); +#elif defined(CONFIG_CPU_SH7724) + val = ECMR_RTM; +#endif } else if (phy->speed == 10) { printf(SHETHER_NAME ": 10Base/"); +#ifdef CONFIG_CPU_SH7763 outl(GECMR_10B, GECMR(port)); - } -#endif -#if defined(CONFIG_CPU_SH7757) - if (phy->speed == 100) { - printf("100Base/"); - outl(1, RTRATE(port)); - } else if (phy->speed == 10) { - printf("10Base/"); +#elif defined(CONFIG_CPU_SH7757) outl(0, RTRATE(port)); - } #endif + } /* Check if full duplex mode is supported by the phy */ if (phy->duplex) { printf("Full\n"); - outl((ECMR_CHG_DM|ECMR_RE|ECMR_TE|ECMR_DM), ECMR(port)); + outl(val | (ECMR_CHG_DM|ECMR_RE|ECMR_TE|ECMR_DM), ECMR(port)); } else { printf("Half\n"); - outl((ECMR_CHG_DM|ECMR_RE|ECMR_TE), ECMR(port)); + outl(val | (ECMR_CHG_DM|ECMR_RE|ECMR_TE), ECMR(port)); } return ret; diff --git a/drivers/net/sh_eth.h b/drivers/net/sh_eth.h index 0692f8b..27fde05 100644 --- a/drivers/net/sh_eth.h +++ b/drivers/net/sh_eth.h @@ -1,8 +1,8 @@ /* * sh_eth.h - Driver for Renesas SuperH ethernet controler. * - * Copyright (C) 2008 Renesas Solutions Corp. - * Copyright (c) 2008 Nobuhiro Iwamatsu + * Copyright (C) 2008, 2011 Renesas Solutions Corp. + * Copyright (c) 2008, 2011 Nobuhiro Iwamatsu * Copyright (c) 2007 Carlos Munoz <carlos@kenati.com> * * This program is free software; you can redistribute it and/or modify @@ -162,6 +162,32 @@ struct sh_eth_dev { #define MAHR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x01c0) #define MALR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x01c8) #define RTRATE(port) (BASE_IO_ADDR + 0x800 * (port) + 0x01fc) + +#elif defined(CONFIG_CPU_SH7724) +#define BASE_IO_ADDR 0xA4600000 + +#define TDLAR(port) (BASE_IO_ADDR + 0x0018) +#define RDLAR(port) (BASE_IO_ADDR + 0x0020) + +#define EDMR(port) (BASE_IO_ADDR + 0x0000) +#define EDTRR(port) (BASE_IO_ADDR + 0x0008) +#define EDRRR(port) (BASE_IO_ADDR + 0x0010) +#define EESR(port) (BASE_IO_ADDR + 0x0028) +#define EESIPR(port) (BASE_IO_ADDR + 0x0030) +#define TRSCER(port) (BASE_IO_ADDR + 0x0038) +#define TFTR(port) (BASE_IO_ADDR + 0x0048) +#define FDR(port) (BASE_IO_ADDR + 0x0050) +#define RMCR(port) (BASE_IO_ADDR + 0x0058) +#define FCFTR(port) (BASE_IO_ADDR + 0x0070) +#define ECMR(port) (BASE_IO_ADDR + 0x0100) +#define RFLR(port) (BASE_IO_ADDR + 0x0108) +#define ECSIPR(port) (BASE_IO_ADDR + 0x0118) +#define PIR(port) (BASE_IO_ADDR + 0x0120) +#define APR(port) (BASE_IO_ADDR + 0x0154) +#define MPR(port) (BASE_IO_ADDR + 0x0158) +#define TPAUSER(port) (BASE_IO_ADDR + 0x0164) +#define MAHR(port) (BASE_IO_ADDR + 0x01c0) +#define MALR(port) (BASE_IO_ADDR + 0x01c8) #endif /* @@ -183,7 +209,7 @@ enum DMAC_M_BIT { EDMR_SRST = 0x03, EMDR_DESC_R = 0x30, /* Descriptor reserve size */ EDMR_EL = 0x40, /* Litte endian */ -#elif defined CONFIG_CPU_SH7757 +#elif defined(CONFIG_CPU_SH7757) ||defined (CONFIG_CPU_SH7724) EDMR_SRST = 0x01, EMDR_DESC_R = 0x30, /* Descriptor reserve size */ EDMR_EL = 0x40, /* Litte endian */ @@ -325,7 +351,8 @@ enum FCFTR_BIT { /* Transfer descriptor bit */ enum TD_STS_BIT { -#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7757) +#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7757) \ + || defined(CONFIG_CPU_SH7724) TD_TACT = 0x80000000, #else TD_TACT = 0x7fffffff, @@ -350,6 +377,10 @@ enum FELIC_MODE_BIT { ECMR_PMDE = 0x00000200, ECMR_RE = 0x00000040, ECMR_TE = 0x00000020, ECMR_ILB = 0x00000008, ECMR_ELB = 0x00000004, ECMR_DM = 0x00000002, ECMR_PRM = 0x00000001, +#ifdef CONFIG_CPU_SH7724 + ECMR_RTM = 0x00000010, +#endif + }; #ifdef CONFIG_CPU_SH7763 @@ -357,6 +388,8 @@ enum FELIC_MODE_BIT { ECMR_TXF | ECMR_MCT) #elif CONFIG_CPU_SH7757 #define ECMR_CHG_DM (ECMR_ZPF) +#elif CONFIG_CPU_SH7724 +#define ECMR_CHG_DM (ECMR_ZPF | ECMR_PFR | ECMR_RXF | ECMR_TXF) #else #define ECMR_CHG_DM (ECMR_ZPF | ECMR_PFR | ECMR_RXF | ECMR_TXF | ECMR_MCT) #endif diff --git a/drivers/serial/serial_sh.h b/drivers/serial/serial_sh.h index 4e16e48..0b3e779 100644 --- a/drivers/serial/serial_sh.h +++ b/drivers/serial/serial_sh.h @@ -686,8 +686,6 @@ static inline int scbrr_calc(struct uart_port port, int bps, int clk) #define SCBRR_VALUE(bps, clk) scbrr_calc(sh_sci, bps, clk) #elif defined(__H8300H__) || defined(__H8300S__) #define SCBRR_VALUE(bps, clk) (((clk*1000/32)/bps)-1) -#elif defined(CONFIG_CPU_SH7264) -#define SCBRR_VALUE(bps, clk) ((clk+16*bps)/(32*bps)) #else /* Generic SH */ #define SCBRR_VALUE(bps, clk) ((clk+16*bps)/(32*bps)-1) #endif diff --git a/include/configs/ecovec.h b/include/configs/ecovec.h index 4549a4c..901a0e0 100644 --- a/include/configs/ecovec.h +++ b/include/configs/ecovec.h @@ -91,6 +91,7 @@ #define CONFIG_SH_ETHER 1 #define CONFIG_SH_ETHER_USE_PORT (0) #define CONFIG_SH_ETHER_PHY_ADDR (0x1f) +#define CONFIG_PHY_SMSC 1 #define CONFIG_PHYLIB #define CONFIG_BITBANGMII #define CONFIG_BITBANGMII_MULTI diff --git a/include/configs/rsk7264.h b/include/configs/rsk7264.h index c1ffc34..af9524e 100644 --- a/include/configs/rsk7264.h +++ b/include/configs/rsk7264.h @@ -65,7 +65,7 @@ #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE /* Board Clock */ -#define CONFIG_SYS_CLK_FREQ 33333333 +#define CONFIG_SYS_CLK_FREQ 36000000 #define CMT_CLK_DIVIDER 32 /* 8 (default), 32, 128 or 512 */ #define CONFIG_SYS_HZ (CONFIG_SYS_CLK_FREQ / CMT_CLK_DIVIDER) diff --git a/post/Makefile b/post/Makefile index 55b7d21..200e2f1 100644 --- a/post/Makefile +++ b/post/Makefile @@ -32,7 +32,7 @@ COBJS-$(CONFIG_POST_STD_LIST) += tests.o SPLIB-$(CONFIG_HAS_POST) = drivers/libpostdrivers.o SPLIB-$(CONFIG_HAS_POST) += $(shell if [ -d lib_$(ARCH) ]; then echo \ "lib_$(ARCH)/libpost$(ARCH).o"; fi) -SPLIB-$(CONFIG_SYS_POST_FPU) += $(shell if [ -d lib_$(ARCH)/fpu ]; then echo \ +SPLIB-$(CONFIG_HAS_POST) += $(shell if [ -d lib_$(ARCH)/fpu ]; then echo \ "lib_$(ARCH)/fpu/libpost$(ARCH)fpu.o"; fi) SPLIB-$(CONFIG_HAS_POST) += $(shell if [ -d cpu/$(CPU) ]; then echo \ "cpu/$(CPU)/libpost$(CPU).o"; fi) diff --git a/tools/mxsboot.c b/tools/mxsboot.c index 8246831..6c05aa4 100644 --- a/tools/mxsboot.c +++ b/tools/mxsboot.c @@ -453,7 +453,7 @@ static int mx28_nand_write_firmware(struct mx28_nand_fcb *fcb, int infd, void usage(void) { printf( - "Usage: mx28image [ops] <type> <infile> <outfile>\n" + "Usage: mxsboot [ops] <type> <infile> <outfile>\n" "Augment BootStream file with a proper header for i.MX28 boot\n" "\n" " <type> type of image:\n" |