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-rw-r--r--README3
-rw-r--r--arch/arm/cpu/armv7/am33xx/board.c4
-rw-r--r--include/configs/ti_am335x_common.h1
3 files changed, 8 insertions, 0 deletions
diff --git a/README b/README
index 39b3fe6..f0ffaf4 100644
--- a/README
+++ b/README
@@ -4319,6 +4319,9 @@ Low Level (hardware related) configuration options:
NOTE : currently only supported on AM335x platforms.
+- CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC:
+ Enables the RTC32K OSC on AM33xx based plattforms
+
Freescale QE/FMAN Firmware Support:
-----------------------------------
diff --git a/arch/arm/cpu/armv7/am33xx/board.c b/arch/arm/cpu/armv7/am33xx/board.c
index 453effa..803aa9c 100644
--- a/arch/arm/cpu/armv7/am33xx/board.c
+++ b/arch/arm/cpu/armv7/am33xx/board.c
@@ -149,6 +149,7 @@ __weak void am33xx_spl_board_init(void)
do_setup_dpll(&dpll_mpu_regs, &dpll_mpu_opp100);
}
+#if defined(CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC)
static void rtc32k_enable(void)
{
struct davinci_rtc *rtc = (struct davinci_rtc *)RTC_BASE;
@@ -164,6 +165,7 @@ static void rtc32k_enable(void)
/* Enable the RTC 32K OSC by setting bits 3 and 6. */
writel((1 << 3) | (1 << 6), &rtc->osc);
}
+#endif
static void uart_soft_reset(void)
{
@@ -232,8 +234,10 @@ void s_init(void)
#if defined(CONFIG_SPL_BUILD) || defined(CONFIG_NOR_BOOT)
prcm_init();
set_mux_conf_regs();
+#if defined(CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC)
/* Enable RTC32K clock */
rtc32k_enable();
+#endif
sdram_init();
#endif
}
diff --git a/include/configs/ti_am335x_common.h b/include/configs/ti_am335x_common.h
index 10fe47f..0f6fa62 100644
--- a/include/configs/ti_am335x_common.h
+++ b/include/configs/ti_am335x_common.h
@@ -18,6 +18,7 @@
#define CONFIG_SYS_CACHELINE_SIZE 64
#define CONFIG_MAX_RAM_BANK_SIZE (1024 << 20) /* 1GB */
#define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */
+#define CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC
#include <asm/arch/omap.h>