summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
-rw-r--r--arch/arm/include/asm/arch-mx6/imx-regs.h15
-rw-r--r--drivers/usb/host/ehci-mx6.c16
2 files changed, 6 insertions, 25 deletions
diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h b/arch/arm/include/asm/arch-mx6/imx-regs.h
index 0485407..4cdf736 100644
--- a/arch/arm/include/asm/arch-mx6/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx6/imx-regs.h
@@ -168,13 +168,8 @@
#define AIPS2_OFF_BASE_ADDR (ATZ2_BASE_ADDR + 0x80000)
#define CAAM_BASE_ADDR (ATZ2_BASE_ADDR)
#define ARM_BASE_ADDR (ATZ2_BASE_ADDR + 0x40000)
-#ifdef CONFIG_MX6SL
-#define USBO2H_PL301_IPS_BASE_ADDR (AIPS2_OFF_BASE_ADDR + 0x0000)
-#define USBO2H_USB_BASE_ADDR (AIPS2_OFF_BASE_ADDR + 0x4000)
-#else
-#define USBOH3_PL301_BASE_ADDR (AIPS2_OFF_BASE_ADDR + 0x0000)
-#define USBOH3_USB_BASE_ADDR (AIPS2_OFF_BASE_ADDR + 0x4000)
-#endif
+#define USB_PL301_BASE_ADDR (AIPS2_OFF_BASE_ADDR + 0x0000)
+#define USB_BASE_ADDR (AIPS2_OFF_BASE_ADDR + 0x4000)
#define ENET_BASE_ADDR (AIPS2_OFF_BASE_ADDR + 0x8000)
#ifdef CONFIG_MX6SL
@@ -217,11 +212,7 @@
#define IP2APB_USBPHY1_BASE_ADDR (AIPS2_OFF_BASE_ADDR + 0x78000)
#define IP2APB_USBPHY2_BASE_ADDR (AIPS2_OFF_BASE_ADDR + 0x7C000)
-#ifdef CONFIG_MX6SL
-#define OTG_BASE_ADDR USBO2H_USB_BASE_ADDR
-#else
-#define OTG_BASE_ADDR USBOH3_USB_BASE_ADDR
-#endif
+#define OTG_BASE_ADDR USB_BASE_ADDR
#define CHIP_REV_1_0 0x10
#define CHIP_REV_1_1 0x11
diff --git a/drivers/usb/host/ehci-mx6.c b/drivers/usb/host/ehci-mx6.c
index 0db410b..a316d92 100644
--- a/drivers/usb/host/ehci-mx6.c
+++ b/drivers/usb/host/ehci-mx6.c
@@ -53,12 +53,6 @@
#define UCMD_RUN_STOP (1 << 0) /* controller run/stop */
#define UCMD_RESET (1 << 1) /* controller reset */
-#ifdef CONFIG_MX6SL
-#define USB_BASE_ADDR USBO2H_USB_BASE_ADDR
-#else
-#define USB_BASE_ADDR USBOH3_USB_BASE_ADDR
-#endif
-
static const unsigned phy_bases[] = {
USB_PHY0_BASE_ADDR,
USB_PHY1_BASE_ADDR,
@@ -212,7 +206,6 @@ int __weak board_ehci_power(int port, int on)
int ehci_hcd_init(int index, enum usb_init_type init,
struct ehci_hccr **hccr, struct ehci_hcor **hcor)
{
- enum usb_init_type type;
struct usb_ehci *ehci = (struct usb_ehci *)(USB_BASE_ADDR +
(0x200 * index));
@@ -227,17 +220,14 @@ int ehci_hcd_init(int index, enum usb_init_type init,
usb_power_config(index);
usb_oc_config(index);
usb_internal_phy_clock_gate(index, 1);
- type = usb_phy_enable(index, ehci) ? USB_INIT_DEVICE : USB_INIT_HOST;
+ usb_phy_enable(index, ehci);
*hccr = (struct ehci_hccr *)((uint32_t)&ehci->caplength);
*hcor = (struct ehci_hcor *)((uint32_t)*hccr +
HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase)));
- if ((type == init) || (type == USB_INIT_DEVICE))
- board_ehci_power(index, (type == USB_INIT_DEVICE) ? 0 : 1);
- if (type != init)
- return -ENODEV;
- if (type == USB_INIT_DEVICE)
+ board_ehci_power(index, (init == USB_INIT_DEVICE) ? 0 : 1);
+ if (init == USB_INIT_DEVICE)
return 0;
setbits_le32(&ehci->usbmode, CM_HOST);
__raw_writel(CONFIG_MXC_USB_PORTSC, &ehci->portsc);