summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
-rw-r--r--arch/arm/cpu/armv7/mx6/soc.c28
-rw-r--r--arch/arm/include/asm/arch-mx6/imx-regs.h1
-rwxr-xr-xinclude/configs/mx6sx_arm2.h23
-rw-r--r--include/configs/mx6sxsabresd.h23
4 files changed, 75 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c
index c1b4bb7..528ed79 100644
--- a/arch/arm/cpu/armv7/mx6/soc.c
+++ b/arch/arm/cpu/armv7/mx6/soc.c
@@ -472,6 +472,34 @@ void imx_get_mac_from_fuse(int dev_id, unsigned char *mac)
}
#endif
+#ifdef CONFIG_MX6SX
+int arch_auxiliary_core_up(u32 core_id, u32 boot_private_data)
+{
+ struct src *src_reg;
+ u32 stack, pc;
+
+ if (!boot_private_data)
+ return 1;
+
+ stack = *(u32 *)boot_private_data;
+ pc = *(u32 *)(boot_private_data + 4);
+
+ printf("## Stack at 0x%08x\n", stack);
+ printf("## PC at 0x%08x\n", pc);
+
+ /* Set the stack and pc to M4 bootROM */
+ writel(stack, M4_BOOTROM_BASE_ADDR);
+ writel(pc, M4_BOOTROM_BASE_ADDR + 4);
+
+ /* Enable M4 */
+ src_reg = (struct src *)SRC_BASE_ADDR;
+ setbits_le32(&src_reg->scr, 0x00400000);
+ clrbits_le32(&src_reg->scr, 0x00000010);
+
+ return 0;
+}
+#endif
+
void boot_mode_apply(unsigned cfg_val)
{
unsigned reg;
diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h b/arch/arm/include/asm/arch-mx6/imx-regs.h
index 0f5a346..e61b013 100644
--- a/arch/arm/include/asm/arch-mx6/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx6/imx-regs.h
@@ -39,6 +39,7 @@
#define GPU_ARB_END_ADDR 0x01803FFF
#define APBH_DMA_ARB_BASE_ADDR 0x01804000
#define APBH_DMA_ARB_END_ADDR 0x0180BFFF
+#define M4_BOOTROM_BASE_ADDR 0x007F8000
#define MXS_APBH_BASE APBH_DMA_ARB_BASE_ADDR
#define MXS_GPMI_BASE (APBH_DMA_ARB_BASE_ADDR + 0x02000)
diff --git a/include/configs/mx6sx_arm2.h b/include/configs/mx6sx_arm2.h
index 6900bbb..19b07c1 100755
--- a/include/configs/mx6sx_arm2.h
+++ b/include/configs/mx6sx_arm2.h
@@ -158,6 +158,28 @@
#define CONFIG_LOADADDR 0x80800000
#define CONFIG_SYS_TEXT_BASE 0x87800000
+#define CONFIG_CMD_BOOTAUX /* Boot M4 */
+#define CONFIG_CMD_SETEXPR
+
+#ifdef CONFIG_CMD_BOOTAUX
+#define UPDATE_M4_ENV \
+ "m4image=m4_qspi.bin\0" \
+ "loadm4image=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${m4image}\0" \
+ "update_m4_from_sd=" \
+ "if sf probe; then " \
+ "if run loadm4image; then " \
+ "setexpr fw_sz ${filesize} + 0xffff; " \
+ "setexpr fw_sz ${fw_sz} / 0x10000; " \
+ "setexpr fw_sz ${fw_sz} * 0x10000; " \
+ "sf erase 0x0 ${fw_sz}; " \
+ "sf write ${loadaddr} 0x0 ${filesize}; " \
+ "fi; " \
+ "fi\0" \
+ "m4boot=sf probe; bootaux 0x70000000\0"
+#else
+#define UPDATE_M4_ENV ""
+#endif
+
#define CONFIG_MFG_ENV_SETTINGS \
"mfgtool_args=setenv bootargs console=${console},${baudrate} " \
"rdinit=/linuxrc " \
@@ -171,6 +193,7 @@
#define CONFIG_EXTRA_ENV_SETTINGS \
CONFIG_MFG_ENV_SETTINGS \
+ UPDATE_M4_ENV \
"script=boot.scr\0" \
"uimage=uImage\0" \
"console=ttymxc0\0" \
diff --git a/include/configs/mx6sxsabresd.h b/include/configs/mx6sxsabresd.h
index 93eaab0..c370c21 100644
--- a/include/configs/mx6sxsabresd.h
+++ b/include/configs/mx6sxsabresd.h
@@ -165,6 +165,28 @@
#define CONFIG_LOADADDR 0x80800000
#define CONFIG_SYS_TEXT_BASE 0x87800000
+#define CONFIG_CMD_BOOTAUX /* Boot M4 */
+#define CONFIG_CMD_SETEXPR
+
+#ifdef CONFIG_CMD_BOOTAUX
+#define UPDATE_M4_ENV \
+ "m4image=m4_qspi.bin\0" \
+ "loadm4image=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${m4image}\0" \
+ "update_m4_from_sd=" \
+ "if sf probe; then " \
+ "if run loadm4image; then " \
+ "setexpr fw_sz ${filesize} + 0xffff; " \
+ "setexpr fw_sz ${fw_sz} / 0x10000; " \
+ "setexpr fw_sz ${fw_sz} * 0x10000; " \
+ "sf erase 0x0 ${fw_sz}; " \
+ "sf write ${loadaddr} 0x0 ${filesize}; " \
+ "fi; " \
+ "fi\0" \
+ "m4boot=sf probe; bootaux 0x70000000\0"
+#else
+#define UPDATE_M4_ENV ""
+#endif
+
#define CONFIG_MFG_ENV_SETTINGS \
"mfgtool_args=setenv bootargs console=${console},${baudrate} " \
"rdinit=/linuxrc " \
@@ -178,6 +200,7 @@
#define CONFIG_EXTRA_ENV_SETTINGS \
CONFIG_MFG_ENV_SETTINGS \
+ UPDATE_M4_ENV \
"script=boot.scr\0" \
"uimage=uImage\0" \
"console=ttymxc0\0" \