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-rw-r--r--board/freescale/mx6q_sabresd/mx6q_sabresd.c36
-rw-r--r--cpu/arm_cortexa8/mx6/generic.c2
-rw-r--r--drivers/usb/gadget/imx_udc.c9
-rw-r--r--include/asm-arm/arch-mx6/mx6_pins.h3
-rw-r--r--include/configs/mx6dl_sabresd_android.h18
-rw-r--r--include/configs/mx6q_sabresd_android.h7
6 files changed, 55 insertions, 20 deletions
diff --git a/board/freescale/mx6q_sabresd/mx6q_sabresd.c b/board/freescale/mx6q_sabresd/mx6q_sabresd.c
index c96bb8e..9d227c7 100644
--- a/board/freescale/mx6q_sabresd/mx6q_sabresd.c
+++ b/board/freescale/mx6q_sabresd/mx6q_sabresd.c
@@ -817,9 +817,8 @@ int check_recovery_cmd_file(void)
int button_pressed = 0;
ulong part_length;
int filelen = 0;
- char *env;
u32 reg;
- int i;
+ int i = 0;
printf("Checking for recovery command file...\n");
switch (get_boot_device()) {
@@ -1086,21 +1085,23 @@ int checkboard(void)
return 0;
}
+#if defined CONFIG_MX6Q
+#define MX6X_IOMUX(s) MX6Q_##s
+#elif defined CONFIG_MX6DL
+#define MX6X_IOMUX(s) MX6DL_##s
+#endif
+
#ifdef CONFIG_IMX_UDC
void udc_pins_setting(void)
{
#define GPIO_3_22_BIT_MASK (1<<22)
+#define GPIO_1_29_BIT_MASK (1<<29)
u32 reg;
-#if defined CONFIG_MX6Q
- mxc_iomux_v3_setup_pad(MX6Q_PAD_GPIO_1__USBOTG_ID);
- /* USB_OTG_PWR */
- mxc_iomux_v3_setup_pad(MX6Q_PAD_EIM_D22__GPIO_3_22);
-#elif defined CONFIG_MX6DL
- mxc_iomux_v3_setup_pad(MX6DL_PAD_ENET_RX_ER__ANATOP_USBOTG_ID);
- /* USB_OTG_PWR */
- mxc_iomux_v3_setup_pad(MX6DL_PAD_EIM_D22__GPIO_3_22);
-#endif
+
+ mxc_iomux_v3_setup_pad(MX6X_IOMUX(PAD_ENET_RX_ER__ANATOP_USBOTG_ID));
+ mxc_iomux_v3_setup_pad(MX6X_IOMUX(PAD_EIM_D22__GPIO_3_22));
+ mxc_iomux_v3_setup_pad(MX6X_IOMUX(PAD_ENET_TXD1__GPIO_1_29));
reg = readl(GPIO3_BASE_ADDR + GPIO_GDIR);
/* set gpio_3_22 as output */
@@ -1112,6 +1113,17 @@ void udc_pins_setting(void)
reg &= ~GPIO_3_22_BIT_MASK;
writel(reg, GPIO3_BASE_ADDR + GPIO_DR);
- mxc_iomux_set_gpr_register(1, 13, 1, 1);
+ reg = readl(GPIO1_BASE_ADDR + GPIO_GDIR);
+ /* set gpio_1_29 as output */
+ reg |= GPIO_1_29_BIT_MASK;
+ writel(reg, GPIO1_BASE_ADDR + GPIO_GDIR);
+
+ /* set USB_H1_POWER to 1 */
+ reg = readl(GPIO1_BASE_ADDR + GPIO_DR);
+ reg |= GPIO_1_29_BIT_MASK;
+ writel(reg, GPIO1_BASE_ADDR + GPIO_DR);
+
+ mxc_iomux_set_gpr_register(1, 13, 1, 0);
+
}
#endif
diff --git a/cpu/arm_cortexa8/mx6/generic.c b/cpu/arm_cortexa8/mx6/generic.c
index fa4eab3..8ec6b43 100644
--- a/cpu/arm_cortexa8/mx6/generic.c
+++ b/cpu/arm_cortexa8/mx6/generic.c
@@ -1015,7 +1015,7 @@ void enable_usboh3_clk(unsigned char enable)
reg |= 1 << MXC_CCM_CCGR6_CG0_OFFSET;
else
reg &= ~(1 << MXC_CCM_CCGR6_CG0_OFFSET);
- writel(reg, MXC_CCM_CCGR2);
+ writel(reg, MXC_CCM_CCGR6);
}
void enable_usb_phy1_clk(unsigned char enable)
diff --git a/drivers/usb/gadget/imx_udc.c b/drivers/usb/gadget/imx_udc.c
index 9f1f492..67011bd 100644
--- a/drivers/usb/gadget/imx_udc.c
+++ b/drivers/usb/gadget/imx_udc.c
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
+ * Copyright (C) 2010-2012 Freescale Semiconductor, Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -78,6 +78,7 @@ typedef struct {
typedef struct usb_device_request setup_packet;
static int usb_highspeed;
+static int usb_inited;
static mxc_udc_ctrl mxc_udc;
static struct usb_device_instance *udc_device;
static struct urb *ep0_urb;
@@ -501,6 +502,7 @@ static void usb_udc_init(void)
usb_init_eps();
mxc_init_ep_struct();
ep0_setup();
+ usb_inited = 1;
}
void usb_shutdown(void)
@@ -929,7 +931,10 @@ void udc_connect(void)
void udc_disconnect(void)
{
- mxc_usb_stop();
+ /* imx6 will hang if access usb register without init oh3
+ * clock, so not access it if not init. */
+ if (usb_inited)
+ mxc_usb_stop();
}
void udc_set_nak(int epid)
diff --git a/include/asm-arm/arch-mx6/mx6_pins.h b/include/asm-arm/arch-mx6/mx6_pins.h
index bfbf721..4cf9588 100644
--- a/include/asm-arm/arch-mx6/mx6_pins.h
+++ b/include/asm-arm/arch-mx6/mx6_pins.h
@@ -1582,6 +1582,8 @@
#define _MX6Q_PAD_ENET_REF_CLK__ANATOP_USBPHY1_TSTO_RX_SQUELCH \
IOMUX_PAD(0x04E8, 0x01D4, 7, 0x0000, 0, 0)
+#define _MX6Q_PAD_ENET_RX_ER__ANATOP_USBOTG_ID \
+ IOMUX_PAD(0x04EC, 0x01D8, 0, 0x0000, 0, 0)
#define _MX6Q_PAD_ENET_RX_ER__ENET_RX_ER \
IOMUX_PAD(0x04EC, 0x01D8, 1, 0x0000, 0, 0)
#define _MX6Q_PAD_ENET_RX_ER__ESAI1_HCKR \
@@ -4452,6 +4454,7 @@
#define MX6Q_PAD_ENET_REF_CLK__SPDIF_SRCLK (_MX6Q_PAD_ENET_REF_CLK__SPDIF_SRCLK | MUX_PAD_CTRL(NO_PAD_CTRL))
#define MX6Q_PAD_ENET_REF_CLK__ANATOP_USBPHY1_TSTO_RX_SQUELCH (_MX6Q_PAD_ENET_REF_CLK__ANATOP_USBPHY1_TSTO_RX_SQUELCH | MUX_PAD_CTRL(NO_PAD_CTRL))
+#define MX6Q_PAD_ENET_RX_ER__ANATOP_USBOTG_ID (_MX6Q_PAD_ENET_RX_ER__ANATOP_USBOTG_ID | MUX_PAD_CTRL(NO_PAD_CTRL))
#define MX6Q_PAD_ENET_RX_ER__ENET_RX_ER (_MX6Q_PAD_ENET_RX_ER__ENET_RX_ER | MUX_PAD_CTRL(NO_PAD_CTRL))
#define MX6Q_PAD_ENET_RX_ER__ESAI1_HCKR (_MX6Q_PAD_ENET_RX_ER__ESAI1_HCKR | MUX_PAD_CTRL(NO_PAD_CTRL))
#define MX6Q_PAD_ENET_RX_ER__SPDIF_IN1 (_MX6Q_PAD_ENET_RX_ER__SPDIF_IN1 | MUX_PAD_CTRL(NO_PAD_CTRL))
diff --git a/include/configs/mx6dl_sabresd_android.h b/include/configs/mx6dl_sabresd_android.h
index 7d836b3..4aee00c 100644
--- a/include/configs/mx6dl_sabresd_android.h
+++ b/include/configs/mx6dl_sabresd_android.h
@@ -25,6 +25,22 @@
#include <asm/arch/mx6.h>
#include "mx6dl_sabresd.h"
+#define CONFIG_USB_DEVICE
+#define CONFIG_IMX_UDC 1
+#define CONFIG_FASTBOOT 1
+#define CONFIG_FASTBOOT_STORAGE_EMMC_SATA
+#define CONFIG_FASTBOOT_VENDOR_ID 0x18d1
+#define CONFIG_FASTBOOT_PRODUCT_ID 0xc01
+#define CONFIG_FASTBOOT_BCD_DEVICE 0x311
+#define CONFIG_FASTBOOT_MANUFACTURER_STR "Freescale"
+#define CONFIG_FASTBOOT_PRODUCT_NAME_STR "i.mx6dl Sabre SmartDevice"
+#define CONFIG_FASTBOOT_INTERFACE_STR "Android fastboot"
+#define CONFIG_FASTBOOT_CONFIGURATION_STR "Android fastboot"
+#define CONFIG_FASTBOOT_SERIAL_NUM "12345"
+#define CONFIG_FASTBOOT_SATA_NO 0
+#define CONFIG_FASTBOOT_TRANSFER_BUF 0x30000000
+#define CONFIG_FASTBOOT_TRANSFER_BUF_SIZE 0x10000000 /* 256M byte */
+
#define CONFIG_CMD_BOOTI
#define CONFIG_ANDROID_RECOVERY
/* which mmc bus is your main storage ? */
@@ -40,6 +56,7 @@
#define CONFIG_ANDROID_RECOVERY_BOOTCMD_MMC \
"booti mmc3 recovery"
#define CONFIG_ANDROID_RECOVERY_CMD_FILE "/recovery/command"
+#define CONFIG_INITRD_TAG
#undef CONFIG_LOADADDR
#undef CONFIG_RD_LOADADDR
@@ -53,5 +70,6 @@
#define CONFIG_EXTRA_ENV_SETTINGS \
"netdev=eth0\0" \
"ethprime=FEC0\0" \
+ "fastboot_dev=mmc3\0" \
"bootcmd=booti mmc3\0"
#endif
diff --git a/include/configs/mx6q_sabresd_android.h b/include/configs/mx6q_sabresd_android.h
index 2f842e5..7a149fd 100644
--- a/include/configs/mx6q_sabresd_android.h
+++ b/include/configs/mx6q_sabresd_android.h
@@ -24,9 +24,6 @@
#include "mx6q_sabresd.h"
-/* Can't enable OTG on this board, if enable kernel will hang very
- * early stage */
-#if 0
#define CONFIG_USB_DEVICE
#define CONFIG_IMX_UDC 1
#define CONFIG_FASTBOOT 1
@@ -42,13 +39,11 @@
#define CONFIG_FASTBOOT_SATA_NO 0
#define CONFIG_FASTBOOT_TRANSFER_BUF 0x30000000
#define CONFIG_FASTBOOT_TRANSFER_BUF_SIZE 0x10000000 /* 256M byte */
-#endif /* if 0 */
#define CONFIG_CMD_BOOTI
#define CONFIG_ANDROID_RECOVERY
/* which mmc bus is your main storage ? */
#define CONFIG_ANDROID_MAIN_MMC_BUS 3
-
#define CONFIG_ANDROID_BOOT_PARTITION_MMC 1
#define CONFIG_ANDROID_SYSTEM_PARTITION_MMC 5
#define CONFIG_ANDROID_RECOVERY_PARTITION_MMC 2
@@ -73,5 +68,7 @@
#define CONFIG_EXTRA_ENV_SETTINGS \
"netdev=eth0\0" \
"ethprime=FEC0\0" \
+ "fastboot_dev=mmc3\0" \
"bootcmd=booti mmc3\0"
+
#endif
generated by cgit v1.1 at 2024-11-22 06:54:36 +0000