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-rw-r--r--cpu/mpc85xx/cpu_init.c20
-rw-r--r--cpu/mpc85xx/tlb.c2
-rw-r--r--include/configs/ATUM8548.h1
-rw-r--r--include/configs/MPC8540ADS.h1
-rw-r--r--include/configs/MPC8540EVAL.h1
-rw-r--r--include/configs/MPC8541CDS.h1
-rw-r--r--include/configs/MPC8544DS.h1
-rw-r--r--include/configs/MPC8548CDS.h1
-rw-r--r--include/configs/MPC8555CDS.h1
-rw-r--r--include/configs/MPC8560ADS.h1
-rw-r--r--include/configs/MPC8568MDS.h1
-rw-r--r--include/configs/PM854.h1
-rw-r--r--include/configs/PM856.h1
-rw-r--r--include/configs/SBC8540.h1
-rw-r--r--include/configs/TQM85xx.h1
-rw-r--r--include/configs/sbc8548.h1
-rw-r--r--include/configs/sbc8560.h1
-rw-r--r--include/configs/stxgp3.h1
-rw-r--r--include/configs/stxssa.h1
19 files changed, 0 insertions, 39 deletions
diff --git a/cpu/mpc85xx/cpu_init.c b/cpu/mpc85xx/cpu_init.c
index 4e2bfe7..c0ff1d5 100644
--- a/cpu/mpc85xx/cpu_init.c
+++ b/cpu/mpc85xx/cpu_init.c
@@ -149,27 +149,7 @@ void cpu_init_early_f(void)
init_laws();
invalidate_tlb(0);
-#ifdef CONFIG_FSL_INIT_TLBS
init_tlbs();
-#else
- {
- extern u32 tlb1_entry;
- u32 *tmp = &tlb1_entry;
- int i;
- int num = tmp[2];
-
- /* skip to actual table */
- tmp += 3;
-
- for (i = 0; i < num; i++, tmp += 4) {
- mtspr(MAS0, tmp[0]);
- mtspr(MAS1, tmp[1]);
- mtspr(MAS2, tmp[2]);
- mtspr(MAS3, tmp[3]);
- asm volatile("isync;msync;tlbwe;isync");
- }
- }
-#endif
}
/*
diff --git a/cpu/mpc85xx/tlb.c b/cpu/mpc85xx/tlb.c
index b319ad4..b2c799a 100644
--- a/cpu/mpc85xx/tlb.c
+++ b/cpu/mpc85xx/tlb.c
@@ -79,7 +79,6 @@ void invalidate_tlb(u8 tlb)
void init_tlbs(void)
{
-#ifdef CONFIG_FSL_INIT_TLBS
int i;
for (i = 0; i < num_tlb_entries; i++) {
@@ -88,7 +87,6 @@ void init_tlbs(void)
tlb_table[i].ts, tlb_table[i].esel, tlb_table[i].tsize,
tlb_table[i].iprot);
}
-#endif
return ;
}
diff --git a/include/configs/ATUM8548.h b/include/configs/ATUM8548.h
index c2dde41..c14376e 100644
--- a/include/configs/ATUM8548.h
+++ b/include/configs/ATUM8548.h
@@ -64,7 +64,6 @@
#define CONFIG_INTERRUPTS /* enable pci, srio, ddr interrupts */
#define CONFIG_FSL_LAW 1 /* Use common FSL init code */
-#define CONFIG_FSL_INIT_TLBS 1 /* Use common FSL init code */
#define MPC85xx_DDR_SDRAM_CLK_CNTL /* 85xx has clock control reg */
diff --git a/include/configs/MPC8540ADS.h b/include/configs/MPC8540ADS.h
index 74076fb..5ea7b25 100644
--- a/include/configs/MPC8540ADS.h
+++ b/include/configs/MPC8540ADS.h
@@ -56,7 +56,6 @@
#define CONFIG_MEM_INIT_VALUE 0xDeadBeef
#define CONFIG_FSL_LAW 1 /* Use common FSL init code */
-#define CONFIG_FSL_INIT_TLBS 1 /* Use common FSL init code */
/*
* sysclk for MPC85xx
diff --git a/include/configs/MPC8540EVAL.h b/include/configs/MPC8540EVAL.h
index 416cee4..bf64f27 100644
--- a/include/configs/MPC8540EVAL.h
+++ b/include/configs/MPC8540EVAL.h
@@ -44,7 +44,6 @@
#define CONFIG_DDR_DLL /* possible DLL fix needed */
#define CONFIG_FSL_LAW 1 /* Use common FSL init code */
-#define CONFIG_FSL_INIT_TLBS 1 /* Use common FSL init code */
/* Using Localbus SDRAM to emulate flash before we can program the flash,
* normally you only need a flash-boot image(u-boot.bin),if unsure undef this.
diff --git a/include/configs/MPC8541CDS.h b/include/configs/MPC8541CDS.h
index 92195ed..7334088 100644
--- a/include/configs/MPC8541CDS.h
+++ b/include/configs/MPC8541CDS.h
@@ -48,7 +48,6 @@
#define CONFIG_MEM_INIT_VALUE 0xDeadBeef
#define CONFIG_FSL_LAW 1 /* Use common FSL init code */
-#define CONFIG_FSL_INIT_TLBS 1 /* Use common FSL init code */
/*
* When initializing flash, if we cannot find the manufacturer ID,
diff --git a/include/configs/MPC8544DS.h b/include/configs/MPC8544DS.h
index 1269c8a..a894209 100644
--- a/include/configs/MPC8544DS.h
+++ b/include/configs/MPC8544DS.h
@@ -43,7 +43,6 @@
#define CONFIG_FSL_PCIE_RESET 1 /* need PCIe reset errata */
#define CONFIG_FSL_LAW 1 /* Use common FSL init code */
-#define CONFIG_FSL_INIT_TLBS 1 /* Use common FSL init code */
#define CONFIG_TSEC_ENET /* tsec ethernet support */
#define CONFIG_ENV_OVERWRITE
diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h
index 77bcc29..a3db9f4 100644
--- a/include/configs/MPC8548CDS.h
+++ b/include/configs/MPC8548CDS.h
@@ -56,7 +56,6 @@
#define CONFIG_INTERRUPTS /* enable pci, srio, ddr interrupts */
#define CONFIG_FSL_LAW 1 /* Use common FSL init code */
-#define CONFIG_FSL_INIT_TLBS 1 /* Use common FSL init code */
/*
* When initializing flash, if we cannot find the manufacturer ID,
diff --git a/include/configs/MPC8555CDS.h b/include/configs/MPC8555CDS.h
index e7b9694..93877ae 100644
--- a/include/configs/MPC8555CDS.h
+++ b/include/configs/MPC8555CDS.h
@@ -48,7 +48,6 @@
#define CONFIG_MEM_INIT_VALUE 0xDeadBeef
#define CONFIG_FSL_LAW 1 /* Use common FSL init code */
-#define CONFIG_FSL_INIT_TLBS 1 /* Use common FSL init code */
/*
* When initializing flash, if we cannot find the manufacturer ID,
diff --git a/include/configs/MPC8560ADS.h b/include/configs/MPC8560ADS.h
index 84c517f..08884b3 100644
--- a/include/configs/MPC8560ADS.h
+++ b/include/configs/MPC8560ADS.h
@@ -53,7 +53,6 @@
#define CONFIG_MEM_INIT_VALUE 0xDeadBeef
#define CONFIG_FSL_LAW 1 /* Use common FSL init code */
-#define CONFIG_FSL_INIT_TLBS 1 /* Use common FSL init code */
/*
* sysclk for MPC85xx
diff --git a/include/configs/MPC8568MDS.h b/include/configs/MPC8568MDS.h
index 04f442f..a12d193 100644
--- a/include/configs/MPC8568MDS.h
+++ b/include/configs/MPC8568MDS.h
@@ -50,7 +50,6 @@
#define CONFIG_MEM_INIT_VALUE 0xDeadBeef
#define CONFIG_FSL_LAW 1 /* Use common FSL init code */
-#define CONFIG_FSL_INIT_TLBS 1 /* Use common FSL init code */
/*
* When initializing flash, if we cannot find the manufacturer ID,
diff --git a/include/configs/PM854.h b/include/configs/PM854.h
index d881057..819bee7 100644
--- a/include/configs/PM854.h
+++ b/include/configs/PM854.h
@@ -52,7 +52,6 @@
#define CONFIG_MEM_INIT_VALUE 0xDEADBEEF
#define CONFIG_FSL_LAW 1 /* Use common FSL init code */
-#define CONFIG_FSL_INIT_TLBS 1 /* Use common FSL init code */
/*
* sysclk for MPC85xx
diff --git a/include/configs/PM856.h b/include/configs/PM856.h
index 48bbef6..8902f42 100644
--- a/include/configs/PM856.h
+++ b/include/configs/PM856.h
@@ -52,7 +52,6 @@
#define CONFIG_MEM_INIT_VALUE 0xDEADBEEF
#define CONFIG_FSL_LAW 1 /* Use common FSL init code */
-#define CONFIG_FSL_INIT_TLBS 1 /* Use common FSL init code */
/*
* sysclk for MPC85xx
diff --git a/include/configs/SBC8540.h b/include/configs/SBC8540.h
index 322b5fa..2bbfe9a 100644
--- a/include/configs/SBC8540.h
+++ b/include/configs/SBC8540.h
@@ -57,7 +57,6 @@
#undef CONFIG_ETHER_ON_FCC /* cpm FCC ethernet support */
#define CONFIG_FSL_LAW 1 /* Use common FSL init code */
-#define CONFIG_FSL_INIT_TLBS 1 /* Use common FSL init code */
#define CONFIG_ENV_OVERWRITE
diff --git a/include/configs/TQM85xx.h b/include/configs/TQM85xx.h
index e2e9964..dd0654b 100644
--- a/include/configs/TQM85xx.h
+++ b/include/configs/TQM85xx.h
@@ -51,7 +51,6 @@
#endif
#define CONFIG_FSL_LAW 1 /* Use common FSL init code */
-#define CONFIG_FSL_INIT_TLBS 1 /* Use common FSL init code */
/*
* sysclk for MPC85xx
diff --git a/include/configs/sbc8548.h b/include/configs/sbc8548.h
index 9c80a79..0a7a904 100644
--- a/include/configs/sbc8548.h
+++ b/include/configs/sbc8548.h
@@ -57,7 +57,6 @@
#define CONFIG_INTERRUPTS /* enable pci, srio, ddr interrupts */
#define CONFIG_FSL_LAW 1 /* Use common FSL init code */
-#define CONFIG_FSL_INIT_TLBS 1 /* Use common FSL init code */
#define MPC85xx_DDR_SDRAM_CLK_CNTL /* 85xx has clock control reg */
diff --git a/include/configs/sbc8560.h b/include/configs/sbc8560.h
index 7761f51..f9ede5f 100644
--- a/include/configs/sbc8560.h
+++ b/include/configs/sbc8560.h
@@ -51,7 +51,6 @@
#undef CONFIG_ETHER_ON_FCC /* cpm FCC ethernet support */
#define CONFIG_FSL_LAW 1 /* Use common FSL init code */
-#define CONFIG_FSL_INIT_TLBS 1 /* Use common FSL init code */
#define CONFIG_ENV_OVERWRITE
diff --git a/include/configs/stxgp3.h b/include/configs/stxgp3.h
index d6d4c46..047e1cf 100644
--- a/include/configs/stxgp3.h
+++ b/include/configs/stxgp3.h
@@ -52,7 +52,6 @@
#define CONFIG_DDR_2T_TIMING /* Sets the 2T timing bit */
#define CONFIG_FSL_LAW 1 /* Use common FSL init code */
-#define CONFIG_FSL_INIT_TLBS 1 /* Use common FSL init code */
/* sysclk for MPC85xx
*/
diff --git a/include/configs/stxssa.h b/include/configs/stxssa.h
index 21fb6f6..e09dd71 100644
--- a/include/configs/stxssa.h
+++ b/include/configs/stxssa.h
@@ -52,7 +52,6 @@
#define CONFIG_DDR_2T_TIMING /* Sets the 2T timing bit */
#define CONFIG_FSL_LAW 1 /* Use common FSL init code */
-#define CONFIG_FSL_INIT_TLBS 1 /* Use common FSL init code */
/* sysclk for MPC85xx
*/
generated by cgit v1.1 at 2024-11-22 19:55:38 +0000