diff options
| -rw-r--r-- | include/asm-ppc/mmu.h | 6 | ||||
| -rw-r--r-- | lib_ppc/bat_rw.c | 132 |
2 files changed, 97 insertions, 41 deletions
diff --git a/include/asm-ppc/mmu.h b/include/asm-ppc/mmu.h index 4f78ca7..59f17de 100644 --- a/include/asm-ppc/mmu.h +++ b/include/asm-ppc/mmu.h @@ -140,7 +140,11 @@ extern void _tlbia(void); /* invalidate all TLB entries */ typedef enum { IBAT0 = 0, IBAT1, IBAT2, IBAT3, - DBAT0, DBAT1, DBAT2, DBAT3 + DBAT0, DBAT1, DBAT2, DBAT3, +#ifdef CONFIG_HIGH_BATS + IBAT4, IBAT5, IBAT6, IBAT7, + DBAT4, DBAT5, DBAT6, DBAT7 +#endif } ppc_bat_t; extern int read_bat(ppc_bat_t bat, unsigned long *upper, unsigned long *lower); diff --git a/lib_ppc/bat_rw.c b/lib_ppc/bat_rw.c index 912efa7..5f01a63 100644 --- a/lib_ppc/bat_rw.c +++ b/lib_ppc/bat_rw.c @@ -29,46 +29,72 @@ int write_bat (ppc_bat_t bat, unsigned long upper, unsigned long lower) { switch (bat) { + case DBAT0: + mtspr (DBAT0L, lower); + mtspr (DBAT0U, upper); + break; case IBAT0: mtspr (IBAT0L, lower); mtspr (IBAT0U, upper); break; - + case DBAT1: + mtspr (DBAT1L, lower); + mtspr (DBAT1U, upper); + break; case IBAT1: mtspr (IBAT1L, lower); mtspr (IBAT1U, upper); break; - + case DBAT2: + mtspr (DBAT2L, lower); + mtspr (DBAT2U, upper); + break; case IBAT2: mtspr (IBAT2L, lower); mtspr (IBAT2U, upper); break; - + case DBAT3: + mtspr (DBAT3L, lower); + mtspr (DBAT3U, upper); + break; case IBAT3: mtspr (IBAT3L, lower); mtspr (IBAT3U, upper); break; - - case DBAT0: - mtspr (DBAT0L, lower); - mtspr (DBAT0U, upper); +#ifdef CONFIG_HIGH_BATS + case DBAT4: + mtspr (DBAT4L, lower); + mtspr (DBAT4U, upper); break; - - case DBAT1: - mtspr (DBAT1L, lower); - mtspr (DBAT1U, upper); + case IBAT4: + mtspr (IBAT4L, lower); + mtspr (IBAT4U, upper); break; - - case DBAT2: - mtspr (DBAT2L, lower); - mtspr (DBAT2U, upper); + case DBAT5: + mtspr (DBAT5L, lower); + mtspr (DBAT5U, upper); break; - - case DBAT3: - mtspr (DBAT3L, lower); - mtspr (DBAT3U, upper); + case IBAT5: + mtspr (IBAT5L, lower); + mtspr (IBAT5U, upper); break; - + case DBAT6: + mtspr (DBAT6L, lower); + mtspr (DBAT6U, upper); + break; + case IBAT6: + mtspr (IBAT6L, lower); + mtspr (IBAT6U, upper); + break; + case DBAT7: + mtspr (DBAT7L, lower); + mtspr (DBAT7U, upper); + break; + case IBAT7: + mtspr (IBAT7L, lower); + mtspr (IBAT7U, upper); + break; +#endif default: return (-1); } @@ -82,46 +108,72 @@ int read_bat (ppc_bat_t bat, unsigned long *upper, unsigned long *lower) unsigned long register l; switch (bat) { + case DBAT0: + l = mfspr (DBAT0L); + u = mfspr (DBAT0U); + break; case IBAT0: l = mfspr (IBAT0L); u = mfspr (IBAT0U); break; - + case DBAT1: + l = mfspr (DBAT1L); + u = mfspr (DBAT1U); + break; case IBAT1: l = mfspr (IBAT1L); u = mfspr (IBAT1U); break; - + case DBAT2: + l = mfspr (DBAT2L); + u = mfspr (DBAT2U); + break; case IBAT2: l = mfspr (IBAT2L); u = mfspr (IBAT2U); break; - + case DBAT3: + l = mfspr (DBAT3L); + u = mfspr (DBAT3U); + break; case IBAT3: l = mfspr (IBAT3L); u = mfspr (IBAT3U); break; - - case DBAT0: - l = mfspr (DBAT0L); - u = mfspr (DBAT0U); +#ifdef CONFIG_HIGH_BATS + case DBAT4: + l = mfspr (DBAT4L); + u = mfspr (DBAT4U); break; - - case DBAT1: - l = mfspr (DBAT1L); - u = mfspr (DBAT1U); + case IBAT4: + l = mfspr (IBAT4L); + u = mfspr (IBAT4U); break; - - case DBAT2: - l = mfspr (DBAT2L); - u = mfspr (DBAT2U); + case DBAT5: + l = mfspr (DBAT5L); + u = mfspr (DBAT5U); break; - - case DBAT3: - l = mfspr (DBAT3L); - u = mfspr (DBAT3U); + case IBAT5: + l = mfspr (IBAT5L); + u = mfspr (IBAT5U); break; - + case DBAT6: + l = mfspr (DBAT6L); + u = mfspr (DBAT6U); + break; + case IBAT6: + l = mfspr (IBAT6L); + u = mfspr (IBAT6U); + break; + case DBAT7: + l = mfspr (DBAT7L); + u = mfspr (DBAT7U); + break; + case IBAT7: + l = mfspr (IBAT7L); + u = mfspr (IBAT7U); + break; +#endif default: return (-1); } |