diff options
-rw-r--r-- | drivers/qe/uec.c | 43 | ||||
-rw-r--r-- | net/eth.c | 3 |
2 files changed, 45 insertions, 1 deletions
diff --git a/drivers/qe/uec.c b/drivers/qe/uec.c index 6cb25bf..9094643 100644 --- a/drivers/qe/uec.c +++ b/drivers/qe/uec.c @@ -40,8 +40,13 @@ static uec_info_t eth1_uec_info = { .tx_clock = CFG_UEC1_TX_CLK, .eth_type = CFG_UEC1_ETH_TYPE, }, +#if (CFG_UEC1_ETH_TYPE == FAST_ETH) + .num_threads_tx = UEC_NUM_OF_THREADS_1, + .num_threads_rx = UEC_NUM_OF_THREADS_1, +#else .num_threads_tx = UEC_NUM_OF_THREADS_4, .num_threads_rx = UEC_NUM_OF_THREADS_4, +#endif .riscTx = QE_RISC_ALLOCATION_RISC1_AND_RISC2, .riscRx = QE_RISC_ALLOCATION_RISC1_AND_RISC2, .tx_bd_ring_len = 16, @@ -58,8 +63,13 @@ static uec_info_t eth2_uec_info = { .tx_clock = CFG_UEC2_TX_CLK, .eth_type = CFG_UEC2_ETH_TYPE, }, +#if (CFG_UEC2_ETH_TYPE == FAST_ETH) + .num_threads_tx = UEC_NUM_OF_THREADS_1, + .num_threads_rx = UEC_NUM_OF_THREADS_1, +#else .num_threads_tx = UEC_NUM_OF_THREADS_4, .num_threads_rx = UEC_NUM_OF_THREADS_4, +#endif .riscTx = QE_RISC_ALLOCATION_RISC1_AND_RISC2, .riscRx = QE_RISC_ALLOCATION_RISC1_AND_RISC2, .tx_bd_ring_len = 16, @@ -68,7 +78,6 @@ static uec_info_t eth2_uec_info = { .enet_interface = CFG_UEC2_INTERFACE_MODE, }; #endif - #ifdef CONFIG_UEC_ETH3 static uec_info_t eth3_uec_info = { .uf_info = { @@ -77,8 +86,13 @@ static uec_info_t eth3_uec_info = { .tx_clock = CFG_UEC3_TX_CLK, .eth_type = CFG_UEC3_ETH_TYPE, }, +#if (CFG_UEC3_ETH_TYPE == FAST_ETH) + .num_threads_tx = UEC_NUM_OF_THREADS_1, + .num_threads_rx = UEC_NUM_OF_THREADS_1, +#else .num_threads_tx = UEC_NUM_OF_THREADS_4, .num_threads_rx = UEC_NUM_OF_THREADS_4, +#endif .riscTx = QE_RISC_ALLOCATION_RISC1_AND_RISC2, .riscRx = QE_RISC_ALLOCATION_RISC1_AND_RISC2, .tx_bd_ring_len = 16, @@ -87,6 +101,29 @@ static uec_info_t eth3_uec_info = { .enet_interface = CFG_UEC3_INTERFACE_MODE, }; #endif +#ifdef CONFIG_UEC_ETH4 +static uec_info_t eth4_uec_info = { + .uf_info = { + .ucc_num = CFG_UEC4_UCC_NUM, + .rx_clock = CFG_UEC4_RX_CLK, + .tx_clock = CFG_UEC4_TX_CLK, + .eth_type = CFG_UEC4_ETH_TYPE, + }, +#if (CFG_UEC4_ETH_TYPE == FAST_ETH) + .num_threads_tx = UEC_NUM_OF_THREADS_1, + .num_threads_rx = UEC_NUM_OF_THREADS_1, +#else + .num_threads_tx = UEC_NUM_OF_THREADS_4, + .num_threads_rx = UEC_NUM_OF_THREADS_4, +#endif + .riscTx = QE_RISC_ALLOCATION_RISC1_AND_RISC2, + .riscRx = QE_RISC_ALLOCATION_RISC1_AND_RISC2, + .tx_bd_ring_len = 16, + .rx_bd_ring_len = 16, + .phy_address = CFG_UEC4_PHY_ADDR, + .enet_interface = CFG_UEC4_INTERFACE_MODE, +}; +#endif static int uec_mac_enable(uec_private_t *uec, comm_dir_e mode) { @@ -1262,6 +1299,10 @@ int uec_initialize(int index) #ifdef CONFIG_UEC_ETH3 uec_info = ð3_uec_info; #endif + } else if (index == 3) { +#ifdef CONFIG_UEC_ETH4 + uec_info = ð4_uec_info; +#endif } else { printf("%s: index is illegal.\n", __FUNCTION__); return -EINVAL; @@ -217,6 +217,9 @@ int eth_initialize(bd_t *bis) #if defined(CONFIG_UEC_ETH3) uec_initialize(2); #endif +#if defined(CONFIG_UEC_ETH4) + uec_initialize(3); +#endif #if defined(FEC_ENET) || defined(CONFIG_ETHER_ON_FCC) fec_initialize(bis); |