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-rw-r--r--cpu/mpc85xx/cpu_init.c23
-rw-r--r--drivers/misc/fsl_law.c46
-rw-r--r--include/asm-ppc/fsl_law.h4
-rw-r--r--include/asm-ppc/global_data.h3
-rw-r--r--include/configs/MPC8560ADS.h1
-rw-r--r--include/configs/SBC8540.h1
-rw-r--r--include/configs/sbc8560.h1
-rw-r--r--include/configs/stxgp3.h1
-rw-r--r--include/configs/stxssa.h1
-rw-r--r--lib_ppc/board.c3
10 files changed, 59 insertions, 25 deletions
diff --git a/cpu/mpc85xx/cpu_init.c b/cpu/mpc85xx/cpu_init.c
index 0fb36c4..736aef1 100644
--- a/cpu/mpc85xx/cpu_init.c
+++ b/cpu/mpc85xx/cpu_init.c
@@ -148,6 +148,12 @@ void cpu_init_early_f(void)
}
#endif
+ /* Pointer is writable since we allocated a register for it */
+ gd = (gd_t *) (CFG_INIT_RAM_ADDR + CFG_GBL_DATA_OFFSET);
+
+ /* Clear initial global data */
+ memset ((void *) gd, 0, sizeof (gd_t));
+
init_laws();
invalidate_tlb(0);
init_tlbs();
@@ -168,12 +174,6 @@ void cpu_init_f (void)
disable_tlb(14);
disable_tlb(15);
- /* Pointer is writable since we allocated a register for it */
- gd = (gd_t *) (CFG_INIT_RAM_ADDR + CFG_GBL_DATA_OFFSET);
-
- /* Clear initial global data */
- memset ((void *) gd, 0, sizeof (gd_t));
-
#ifdef CONFIG_CPM2
config_8560_ioports((ccsr_cpm_t *)CFG_MPC85xx_CPM_ADDR);
#endif
@@ -254,17 +254,6 @@ void cpu_init_f (void)
int cpu_init_r(void)
{
-#ifdef CONFIG_CLEAR_LAW0
-#ifdef CONFIG_FSL_LAW
- disable_law(0);
-#else
- volatile ccsr_local_ecm_t *ecm = (void *)(CFG_MPC85xx_ECM_ADDR);
-
- /* clear alternate boot location LAW (used for sdram, or ddr bank) */
- ecm->lawar0 = 0;
-#endif
-#endif
-
puts ("L2: ");
#if defined(CONFIG_L2_CACHE)
diff --git a/drivers/misc/fsl_law.c b/drivers/misc/fsl_law.c
index dca6a4d..d7d6c40 100644
--- a/drivers/misc/fsl_law.c
+++ b/drivers/misc/fsl_law.c
@@ -27,8 +27,22 @@
#include <asm/fsl_law.h>
#include <asm/io.h>
+DECLARE_GLOBAL_DATA_PTR;
+
#define LAWAR_EN 0x80000000
-#define FSL_HW_NUM_LAWS 10 /* number of LAWs in the hw implementation */
+/* number of LAWs in the hw implementation */
+#if defined(CONFIG_MPC8540) || defined(CONFIG_MPC8541) || \
+ defined(CONFIG_MPC8560) || defined(CONFIG_MPC8555)
+#define FSL_HW_NUM_LAWS 8
+#elif defined(CONFIG_MPC8548) || defined(CONFIG_MPC8544) || \
+ defined(CONFIG_MPC8568) || \
+ defined(CONFIG_MPC8641) || defined(CONFIG_MPC8610)
+#define FSL_HW_NUM_LAWS 10
+#elif defined(CONFIG_MPC8572)
+#define FSL_HW_NUM_LAWS 12
+#else
+#error FSL_HW_NUM_LAWS not defined for this platform
+#endif
void set_law(u8 idx, phys_addr_t addr, enum law_size sz, enum law_trgt_if id)
{
@@ -36,18 +50,34 @@ void set_law(u8 idx, phys_addr_t addr, enum law_size sz, enum law_trgt_if id)
volatile u32 *lawbar = base + 8 * idx;
volatile u32 *lawar = base + 8 * idx + 2;
+ gd->used_laws |= (1 << idx);
+
out_be32(lawbar, addr >> 12);
out_be32(lawar, LAWAR_EN | ((u32)id << 20) | (u32)sz);
return ;
}
+int set_next_law(phys_addr_t addr, enum law_size sz, enum law_trgt_if id)
+{
+ u32 idx = ffz(gd->used_laws);
+
+ if (idx >= FSL_HW_NUM_LAWS)
+ return -1;
+
+ set_law(idx, addr, sz, id);
+
+ return idx;
+}
+
void disable_law(u8 idx)
{
volatile u32 *base = (volatile u32 *)(CFG_IMMR + 0xc08);
volatile u32 *lawbar = base + 8 * idx;
volatile u32 *lawar = base + 8 * idx + 2;
+ gd->used_laws &= ~(1 << idx);
+
out_be32(lawar, 0);
out_be32(lawbar, 0);
@@ -75,14 +105,16 @@ void print_laws(void)
void init_laws(void)
{
int i;
- u8 law_idx = 0;
- for (i = 0; i < num_law_entries; i++) {
- if (law_table[i].index != -1)
- law_idx = law_table[i].index;
+ gd->used_laws = ~((1 << FSL_HW_NUM_LAWS) - 1);
- set_law(law_idx++, law_table[i].addr,
- law_table[i].size, law_table[i].trgt_id);
+ for (i = 0; i < num_law_entries; i++) {
+ if (law_table[i].index == -1)
+ set_next_law(law_table[i].addr, law_table[i].size,
+ law_table[i].trgt_id);
+ else
+ set_law(law_table[i].index, law_table[i].addr,
+ law_table[i].size, law_table[i].trgt_id);
}
return ;
diff --git a/include/asm-ppc/fsl_law.h b/include/asm-ppc/fsl_law.h
index e955c75..6c445a4 100644
--- a/include/asm-ppc/fsl_law.h
+++ b/include/asm-ppc/fsl_law.h
@@ -6,6 +6,9 @@
#define SET_LAW_ENTRY(idx, a, sz, trgt) \
{ .index = idx, .addr = a, .size = sz, .trgt_id = trgt }
+#define SET_LAW(a, sz, trgt) \
+ { .index = -1, .addr = a, .size = sz, .trgt_id = trgt }
+
enum law_size {
LAW_SIZE_4K = 0xb,
LAW_SIZE_8K,
@@ -70,6 +73,7 @@ struct law_entry {
};
extern void set_law(u8 idx, phys_addr_t addr, enum law_size sz, enum law_trgt_if id);
+extern int set_next_law(phys_addr_t addr, enum law_size sz, enum law_trgt_if id);
extern void disable_law(u8 idx);
extern void init_laws(void);
extern void print_laws(void);
diff --git a/include/asm-ppc/global_data.h b/include/asm-ppc/global_data.h
index ea70266..8cf7b6f 100644
--- a/include/asm-ppc/global_data.h
+++ b/include/asm-ppc/global_data.h
@@ -96,6 +96,9 @@ typedef struct global_data {
uint mp_alloc_base;
uint mp_alloc_top;
#endif /* CONFIG_QE */
+#if defined(CONFIG_FSL_LAW)
+ u32 used_laws;
+#endif
#if defined(CONFIG_MPC5xxx)
unsigned long ipb_clk;
unsigned long pci_clk;
diff --git a/include/configs/MPC8560ADS.h b/include/configs/MPC8560ADS.h
index a3fcad3..edf8525 100644
--- a/include/configs/MPC8560ADS.h
+++ b/include/configs/MPC8560ADS.h
@@ -40,6 +40,7 @@
#define CONFIG_MPC85xx 1 /* MPC8540/MPC8560 */
#define CONFIG_CPM2 1 /* has CPM2 */
#define CONFIG_MPC8560ADS 1 /* MPC8560ADS board specific */
+#define CONFIG_MPC8560 1
#define CONFIG_PCI
#define CONFIG_TSEC_ENET /* tsec ethernet support */
diff --git a/include/configs/SBC8540.h b/include/configs/SBC8540.h
index ff64378..8a53fdd 100644
--- a/include/configs/SBC8540.h
+++ b/include/configs/SBC8540.h
@@ -49,6 +49,7 @@
#define CONFIG_CPM2 1 /* has CPM2 */
#define CONFIG_SBC8540 1 /* configuration for SBC8560 board */
+#define CONFIG_MPC8540 1
#define CONFIG_MPC8560ADS 1 /* MPC8560ADS board specific (supplement) */
diff --git a/include/configs/sbc8560.h b/include/configs/sbc8560.h
index 81a1e07..146eafe 100644
--- a/include/configs/sbc8560.h
+++ b/include/configs/sbc8560.h
@@ -42,6 +42,7 @@
#define CONFIG_CPM2 1 /* has CPM2 */
#define CONFIG_SBC8560 1 /* configuration for SBC8560 board */
+#define CONFIG_MPC8560 1
/* XXX flagging this as something I might want to delete */
#define CONFIG_MPC8560ADS 1 /* MPC8560ADS board specific */
diff --git a/include/configs/stxgp3.h b/include/configs/stxgp3.h
index ec04a30..6e8213d 100644
--- a/include/configs/stxgp3.h
+++ b/include/configs/stxgp3.h
@@ -41,6 +41,7 @@
#define CONFIG_MPC85xx 1 /* MPC8540/MPC8560 */
#define CONFIG_CPM2 1 /* has CPM2 */
#define CONFIG_STXGP3 1 /* Silicon Tx GPPP board specific*/
+#define CONFIG_MPC8560 1
#undef CONFIG_PCI /* pci ethernet support */
#define CONFIG_TSEC_ENET /* tsec ethernet support*/
diff --git a/include/configs/stxssa.h b/include/configs/stxssa.h
index d033c86..a1e9789 100644
--- a/include/configs/stxssa.h
+++ b/include/configs/stxssa.h
@@ -41,6 +41,7 @@
#define CONFIG_MPC85xx 1 /* MPC8540/MPC8560 */
#define CONFIG_CPM2 1 /* has CPM2 */
#define CONFIG_STXSSA 1 /* Silicon Tx GPPP SSA board specific*/
+#define CONFIG_MPC8560 1
#define CONFIG_PCI /* PCI ethernet support */
#define CONFIG_TSEC_ENET /* tsec ethernet support*/
diff --git a/lib_ppc/board.c b/lib_ppc/board.c
index a908831..c42e088 100644
--- a/lib_ppc/board.c
+++ b/lib_ppc/board.c
@@ -421,7 +421,8 @@ void board_init_f (ulong bootflag)
/* compiler optimization barrier needed for GCC >= 3.4 */
__asm__ __volatile__("": : :"memory");
-#if !defined(CONFIG_CPM2) && !defined(CONFIG_MPC83XX)
+#if !defined(CONFIG_CPM2) && !defined(CONFIG_MPC83XX) && \
+ !defined(CONFIG_MPC85xx) && !defined(CONFIG_MPC86xx)
/* Clear initial global data */
memset ((void *) gd, 0, sizeof (gd_t));
#endif
generated by cgit v1.1 at 2024-11-23 15:21:06 +0000