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-rw-r--r--cpu/arm_cortexa8/mx51/Makefile3
-rw-r--r--cpu/arm_cortexa8/mx51/cmd_fuse.c92
-rw-r--r--cpu/arm_cortexa8/mx51/imx_fuse.c333
-rw-r--r--drivers/net/mxc_fec.c4
-rw-r--r--include/asm-arm/arch-mx51/imx_fuse.h33
-rw-r--r--include/asm-arm/arch-mx51/mx51.h35
-rw-r--r--include/configs/mx51_3stack.h6
-rw-r--r--include/configs/mx51_bbg.h6
8 files changed, 511 insertions, 1 deletions
diff --git a/cpu/arm_cortexa8/mx51/Makefile b/cpu/arm_cortexa8/mx51/Makefile
index 435f26f..79f697d 100644
--- a/cpu/arm_cortexa8/mx51/Makefile
+++ b/cpu/arm_cortexa8/mx51/Makefile
@@ -28,6 +28,9 @@ include $(TOPDIR)/config.mk
LIB = $(obj)lib$(SOC).a
COBJS = interrupts.o serial.o generic.o iomux.o timer.o cache.o
+COBJS-$(CONFIG_CMD_FUSE) += cmd_fuse.o
+COBJS-$(CONFIG_IMX_FUSE) += imx_fuse.o
+COBJS += $(COBJS-y)
SOBJS = mxc_nand_load.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
diff --git a/cpu/arm_cortexa8/mx51/cmd_fuse.c b/cpu/arm_cortexa8/mx51/cmd_fuse.c
new file mode 100644
index 0000000..1d32e3a
--- /dev/null
+++ b/cpu/arm_cortexa8/mx51/cmd_fuse.c
@@ -0,0 +1,92 @@
+/*
+ * (C) Copyright 2008-2010 Freescale Semiconductor, Inc.
+ * Terry Lv
+ *
+ * Copyright 2007, Freescale Semiconductor, Inc
+ * Andy Fleming
+ *
+ * Based vaguely on the pxa mmc code:
+ * (C) Copyright 2003
+ * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <linux/types.h>
+#include <asm/io.h>
+#include <asm/arch/mx51.h>
+#include <command.h>
+#include <common.h>
+#include <asm/arch/imx_fuse.h>
+
+int do_fuseops(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+{
+ int rc = 0;
+ int bank = 0,
+ row = 0,
+ val = 0;
+
+ switch (argc) {
+ case 4:
+ if (strcmp(argv[1], "read") == 0) {
+ bank = simple_strtoul(argv[2], NULL, 16);
+ row = simple_strtoul(argv[3], NULL, 16);
+
+ fuse_read(bank, row);
+ } else if (strcmp(argv[1], "blow") == 0) {
+ fuse_blow_func(argv[2], argv[3]);
+ } else {
+ printf("It is too dangeous for you to use fuse command.\n");
+ printf("Usage:\n%s\n", cmdtp->usage);
+ rc = 1;
+ }
+ break;
+ case 5:
+ if (strcmp(argv[1], "blow") == 0) {
+ bank = simple_strtoul(argv[2], NULL, 16);
+ row = simple_strtoul(argv[3], NULL, 16);
+ val = simple_strtoul(argv[4], NULL, 16);
+
+ fuse_blow(bank, row, val);
+ } else {
+ printf("It is too dangeous for you to use fuse command.\n");
+ printf("Usage:\n%s\n", cmdtp->usage);
+ rc = 1;
+ }
+ break;
+ default:
+ rc = 1;
+ printf("It is too dangeous for you to use fuse command.\n");
+ printf("Usage:\n%s\n", cmdtp->usage);
+ break;
+ }
+
+ return rc;
+}
+
+U_BOOT_CMD(
+ fuse, 5, 1, do_fuseops,
+ "Fuse sub system",
+ "read <bank> <row> - Read some fuses\n"
+ "blow <bank> <row> <value> - Blow some fuses\n"
+ "blow scc <value> - Blow scc value\n"
+ "blow srk <value> - Blow srk value\n"
+ "blow fecmac <0x##:0x##:0x##:0x##:0x##:0x##>"
+ "- Blow FEC Mac address\n");
+
diff --git a/cpu/arm_cortexa8/mx51/imx_fuse.c b/cpu/arm_cortexa8/mx51/imx_fuse.c
new file mode 100644
index 0000000..3901a25
--- /dev/null
+++ b/cpu/arm_cortexa8/mx51/imx_fuse.c
@@ -0,0 +1,333 @@
+/*
+ * (C) Copyright 2008-2010 Freescale Semiconductor, Inc.
+ * Terry Lv
+ *
+ * Copyright 2007, Freescale Semiconductor, Inc
+ * Andy Fleming
+ *
+ * Based vaguely on the pxa mmc code:
+ * (C) Copyright 2003
+ * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <linux/types.h>
+#include <asm/io.h>
+#include <asm/arch/mx51.h>
+#include <asm/arch/imx_fuse.h>
+#include <common.h>
+#include <net.h>
+
+static void quick_itoa(u32 num, char *a)
+{
+ int i, j, k;
+ for (i = 0; i <= 7; i++) {
+ j = (num >> (4 * i)) & 0xF;
+ k = (j < 10) ? '0' : ('a' - 0xa);
+ a[i] = j + k;
+ }
+}
+
+/* slen - streng length, e.g.: 23 -> slen=2; abcd -> slen=4 */
+/* only convert hex value as string input. so "12" is 0x12. */
+static u32 quick_atoi(char *a, u32 slen)
+{
+ u32 i, num = 0, digit;
+
+ for (i = 0; i < slen; i++) {
+ if (a[i] >= '0' && a[i] <= '9') {
+ digit = a[i] - '0';
+ } else if (a[i] >= 'a' && a[i] <= 'f') {
+ digit = a[i] - 'a' + 10;
+ } else if (a[i] >= 'A' && a[i] <= 'F') {
+ digit = a[i] - 'A' + 10;
+ } else {
+ printf("ERROR: %c\n", a[i]);
+ return -1;
+ }
+ num = (num * 16) + digit;
+ }
+
+ return num;
+}
+
+static void fuse_op_start(void)
+{
+ /* Do not generate interrupt */
+ writel(0, IIM_BASE_ADDR + IIM_STATM_OFF);
+ /* clear the status bits and error bits */
+ writel(0x3, IIM_BASE_ADDR + IIM_STAT_OFF);
+ writel(0xFE, IIM_BASE_ADDR + IIM_ERR_OFF);
+}
+
+/*
+ * The action should be either:
+ * POLL_FUSE_PRGD
+ * or:
+ * POLL_FUSE_SNSD
+ */
+static s32 poll_fuse_op_done(s32 action)
+{
+ u32 status, error;
+
+ if (action != POLL_FUSE_PRGD && action != POLL_FUSE_SNSD) {
+ printf("%s(%d) invalid operation\n", __func__, action);
+ return -1;
+ }
+
+ /* Poll busy bit till it is NOT set */
+ while ((readl(IIM_BASE_ADDR + IIM_STAT_OFF) & IIM_STAT_BUSY) != 0)
+ ;
+
+ /* Test for successful write */
+ status = readl(IIM_BASE_ADDR + IIM_STAT_OFF);
+ error = readl(IIM_BASE_ADDR + IIM_ERR_OFF);
+
+ if ((status & action) != 0 && \
+ (error & (action >> IIM_ERR_SHIFT)) == 0) {
+ if (error) {
+ printf("Even though the operation seems successful...\n");
+ printf("There are some error(s) at addr=0x%x: 0x%x\n",
+ (IIM_BASE_ADDR + IIM_ERR_OFF), error);
+ }
+ return 0;
+ }
+ printf("%s(%d) failed\n", __func__, action);
+ printf("status address=0x%x, value=0x%x\n",
+ (IIM_BASE_ADDR + IIM_STAT_OFF), status);
+ printf("There are some error(s) at addr=0x%x: 0x%x\n",
+ (IIM_BASE_ADDR + IIM_ERR_OFF), error);
+ return -1;
+}
+
+static u32 sense_fuse(s32 bank, s32 row, s32 bit)
+{
+ s32 addr, addr_l, addr_h, reg_addr;
+
+ fuse_op_start();
+
+ addr = ((bank << 11) | (row << 3) | (bit & 0x7));
+ /* Set IIM Program Upper Address */
+ addr_h = (addr >> 8) & 0x000000FF;
+ /* Set IIM Program Lower Address */
+ addr_l = (addr & 0x000000FF);
+
+#ifdef IIM_FUSE_DEBUG
+ printf("%s: addr_h=0x%x, addr_l=0x%x\n",
+ __func__, addr_h, addr_l);
+#endif
+ writel(addr_h, IIM_BASE_ADDR + IIM_UA_OFF);
+ writel(addr_l, IIM_BASE_ADDR + IIM_LA_OFF);
+
+ /* Start sensing */
+ writel(0x8, IIM_BASE_ADDR + IIM_FCTL_OFF);
+ if (poll_fuse_op_done(POLL_FUSE_SNSD) != 0) {
+ printf("%s(bank: %d, row: %d, bit: %d failed\n",
+ __func__, bank, row, bit);
+ }
+ reg_addr = IIM_BASE_ADDR + IIM_SDAT_OFF;
+
+ return readl(reg_addr);
+}
+
+int fuse_read(int bank, char row)
+{
+ u32 fuse_val;
+ s32 err = 0;
+
+ printf("Read fuse at bank:%d row:%d\n", bank, row);
+ fuse_val = sense_fuse(bank, row, 0);
+ printf("fuses at (bank:%d, row:%d) = 0x%x\n", bank, row, fuse_val);
+
+ return err;
+}
+
+/* Blow fuses based on the bank, row and bit positions (all 0-based)
+*/
+static s32 fuse_blow_bit(s32 bank, s32 row, s32 bit)
+{
+ int addr, addr_l, addr_h, ret = -1;
+
+ fuse_op_start();
+
+ /* Disable IIM Program Protect */
+ writel(0xAA, IIM_BASE_ADDR + IIM_PREG_P_OFF);
+
+ addr = ((bank << 11) | (row << 3) | (bit & 0x7));
+ /* Set IIM Program Upper Address */
+ addr_h = (addr >> 8) & 0x000000FF;
+ /* Set IIM Program Lower Address */
+ addr_l = (addr & 0x000000FF);
+
+#ifdef IIM_FUSE_DEBUG
+ printf("blowing addr_h=0x%x, addr_l=0x%x\n", addr_h, addr_l);
+#endif
+
+ writel(addr_h, IIM_BASE_ADDR + IIM_UA_OFF);
+ writel(addr_l, IIM_BASE_ADDR + IIM_LA_OFF);
+
+ /* Start Programming */
+ writel(0x31, IIM_BASE_ADDR + IIM_FCTL_OFF);
+ if (poll_fuse_op_done(POLL_FUSE_PRGD) == 0)
+ ret = 0;
+
+ /* Enable IIM Program Protect */
+ writel(0x0, IIM_BASE_ADDR + IIM_PREG_P_OFF);
+
+ return ret;
+}
+
+static void fuse_blow_row(s32 bank, s32 row, s32 value)
+{
+ u32 reg, i;
+
+ /* enable fuse blown */
+ reg = readl(CCM_BASE_ADDR + 0x64);
+ reg |= 0x10;
+ writel(reg, CCM_BASE_ADDR + 0x64);
+
+ for (i = 0; i < 8; i++) {
+ if (((value >> i) & 0x1) == 0)
+ continue;
+ if (fuse_blow_bit(bank, row, i) != 0) {
+ printf("fuse_blow_bit(bank: %d, row: %d, bit: %d failed\n",
+ bank, row, i);
+ }
+ }
+ reg &= ~0x10;
+ writel(reg, CCM_BASE_ADDR + 0x64);
+}
+
+int fuse_blow(int bank, int row, int val)
+{
+ u32 fuse_val, err = 0;
+
+ printf("Blowing fuse at bank:%d row:%d value:%d\n",
+ bank, row, val);
+ fuse_blow_row(bank, row, val);
+ fuse_val = sense_fuse(bank, row, 0);
+ printf("fuses at (bank:%d, row:%d) = 0x%x\n", bank, row, fuse_val);
+
+ return err;
+}
+
+static int fuse_read_mac_addr(u8 *data)
+{
+ data[0] = sense_fuse(1, 9, 0) ;
+ data[1] = sense_fuse(1, 10, 0) ;
+ data[2] = sense_fuse(1, 11, 0) ;
+ data[3] = sense_fuse(1, 12, 0) ;
+ data[4] = sense_fuse(1, 13, 0) ;
+ data[5] = sense_fuse(1, 14, 0) ;
+
+ if ((data[0] == 0) && (data[1] == 0) && (data[2] == 0) &&
+ (data[3] == 0) && (data[4] == 0) && (data[5] == 0)) {
+ return 0;
+ }
+
+ return 1;
+}
+
+int fuse_blow_func(char *func_name, char *func_val)
+{
+ u32 value, i;
+ char *s;
+ char val[3];
+ s32 err = 0;
+
+ if (0 == strcmp(func_name, "scc")) {
+ /* fuse_blow scc C3D153EDFD2EA9982226EF5047D3B9A0B9C7138EA87C028401D28C2C2C0B9AA2 */
+ printf("Ready to burn SCC fuses\n");
+ s = func_val;
+ for (i = 0; ; ++i) {
+ memcpy(val, s, 2);
+ val[2] = '\0';
+ value = quick_atoi(val, 2);
+ /* printf("fuse_blow_row(2, %d, value=0x%x)\n", i, value); */
+ fuse_blow_row(2, i, value);
+
+ if ((++s)[0] == '\0') {
+ printf("ERROR: Odd string input\n");
+ err = -1;
+ break;
+ }
+ if ((++s)[0] == '\0') {
+ printf("Successful\n");
+ break;
+ }
+ }
+ } else if (0 == strcmp(func_name, "srk")) {
+ /* fuse_blow srk 418bccd09b53bee1ab59e2662b3c7877bc0094caee201052add49be8780dff95 */
+ printf("Ready to burn SRK key fuses\n");
+ s = func_val;
+ for (i = 0; ; ++i) {
+ memcpy(val, s, 2);
+ val[2] = '\0';
+ value = quick_atoi(val, 2);
+ if (i == 0) {
+ /* 0x41 goes to SRK_HASH[255:248], bank 1, row 1 */
+ fuse_blow_row(1, 1, value);
+ } else {
+ /* 0x8b in SRK_HASH[247:240] bank 3, row 1 */
+ /* 0xcc in SRK_HASH[239:232] bank 3, row 2 */
+ /* ... */
+ fuse_blow_row(3, i, value);
+
+ if ((++s)[0] == '\0') {
+ printf("ERROR: Odd string input\n");
+ err = -1;
+ break;
+ }
+ if ((++s)[0] == '\0') {
+ printf("Successful\n");
+ break;
+ }
+ }
+ }
+ } else if (0 == strcmp(func_name, "fecmac")) {
+ u8 ea[6] = { 0 };
+
+ if (NULL == func_val) {
+ /* Read the Mac address and print it */
+ fuse_read_mac_addr(ea);
+
+ printf("FEC MAC address: ");
+ printf("0x%02x:0x%02x:0x%02x:0x%02x:0x%02x:0x%02x\n\n",
+ ea[0], ea[1], ea[2], ea[3], ea[4], ea[5]);
+
+ return 0;
+ }
+
+ eth_parse_enetaddr(func_val, ea);
+ if (!is_valid_ether_addr(ea)) {
+ printf("Error: invalid mac address parameter!\n");
+ err = -1;
+ } else {
+ for (i = 0; i < 6; ++i)
+ fuse_blow_row(1, i + 9, ea[i]);
+ }
+ } else {
+ printf("This command is not supported\n");
+ }
+
+ return err;
+}
+
+
diff --git a/drivers/net/mxc_fec.c b/drivers/net/mxc_fec.c
index 8aa32c7..c3e813d 100644
--- a/drivers/net/mxc_fec.c
+++ b/drivers/net/mxc_fec.c
@@ -729,6 +729,10 @@ void mxc_fec_set_mac_from_env(char *mac_addr)
int i;
eth_parse_enetaddr(mac_addr, ea);
+ if (!is_valid_ether_addr(ea)) {
+ printf("Error: invalid FEC MAC address!\n");
+ return;
+ }
for (i = 0; i < sizeof(fec_info) / sizeof(fec_info[0]); i++) {
fecp = (fec_t *)(fec_info[i].iobase);
diff --git a/include/asm-arm/arch-mx51/imx_fuse.h b/include/asm-arm/arch-mx51/imx_fuse.h
new file mode 100644
index 0000000..8a65613
--- /dev/null
+++ b/include/asm-arm/arch-mx51/imx_fuse.h
@@ -0,0 +1,33 @@
+/*
+ * (C) Copyright 2009-2010 Freescale Semiconductor, Inc.
+ *
+ * Configuration settings for the MX51-3Stack Freescale board.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef _IMX_FUSE_H_
+#define _IMX_FUSE_H_
+
+#define IIM_ERR_SHIFT 8
+#define POLL_FUSE_PRGD (IIM_STAT_PRGD | (IIM_ERR_PRGE << IIM_ERR_SHIFT))
+#define POLL_FUSE_SNSD (IIM_STAT_SNSD | (IIM_ERR_SNSE << IIM_ERR_SHIFT))
+
+int fuse_read(int bank, char row);
+int fuse_blow(int bank, int row, int val);
+int fuse_blow_func(char *func_name, char *func_val);
+
+#endif
diff --git a/include/asm-arm/arch-mx51/mx51.h b/include/asm-arm/arch-mx51/mx51.h
index 00e50cf..5fc57bb 100644
--- a/include/asm-arm/arch-mx51/mx51.h
+++ b/include/asm-arm/arch-mx51/mx51.h
@@ -1,5 +1,5 @@
/*
- * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright 2009-2010 Freescale Semiconductor, Inc. All Rights Reserved.
*/
/*
@@ -390,6 +390,39 @@
#define DP_MFD_216 (4 - 1)
#define DP_MFN_216 3
+/* IIM */
+#define IIM_STAT_OFF 0x00
+#define IIM_STAT_BUSY (1 << 7)
+#define IIM_STAT_PRGD (1 << 1)
+#define IIM_STAT_SNSD (1 << 0)
+#define IIM_STATM_OFF 0x04
+#define IIM_ERR_OFF 0x08
+#define IIM_ERR_PRGE (1 << 7)
+#define IIM_ERR_WPE (1 << 6)
+#define IIM_ERR_OPE (1 << 5)
+#define IIM_ERR_RPE (1 << 4)
+#define IIM_ERR_WLRE (1 << 3)
+#define IIM_ERR_SNSE (1 << 2)
+#define IIM_ERR_PARITYE (1 << 1)
+#define IIM_EMASK_OFF 0x0C
+#define IIM_FCTL_OFF 0x10
+#define IIM_UA_OFF 0x14
+#define IIM_LA_OFF 0x18
+#define IIM_SDAT_OFF 0x1C
+#define IIM_PREV_OFF 0x20
+#define IIM_SREV_OFF 0x24
+#define IIM_PREG_P_OFF 0x28
+#define IIM_SCS0_OFF 0x2C
+#define IIM_SCS1_P_OFF 0x30
+#define IIM_SCS2_OFF 0x34
+#define IIM_SCS3_P_OFF 0x38
+
+#define IIM_PROD_REV_SH 3
+#define IIM_PROD_REV_LEN 5
+#define IIM_SREV_REV_SH 4
+#define IIM_SREV_REV_LEN 4
+#define PROD_SIGNATURE_MX51 0x1
+
#define CHIP_REV_1_0 0x10
#define CHIP_REV_1_1 0x11
#define CHIP_REV_2_0 0x20
diff --git a/include/configs/mx51_3stack.h b/include/configs/mx51_3stack.h
index 292e2cc..f6083c5 100644
--- a/include/configs/mx51_3stack.h
+++ b/include/configs/mx51_3stack.h
@@ -93,6 +93,12 @@
#define CONFIG_CMD_MII
#define CONFIG_CMD_NET
#define CONFIG_CMD_MMC
+#define CONFIG_CMD_FUSE
+
+/*
+ * FUSE Configs
+ * */
+#define CONFIG_IMX_FUSE
/*
* MMC Configs
diff --git a/include/configs/mx51_bbg.h b/include/configs/mx51_bbg.h
index aee33ba..f773563 100644
--- a/include/configs/mx51_bbg.h
+++ b/include/configs/mx51_bbg.h
@@ -119,6 +119,12 @@
#define CONFIG_CMD_SPI
#define CONFIG_CMD_SF
#define CONFIG_CMD_MMC
+#define CONFIG_CMD_FUSE
+
+/*
+ * FUSE Configs
+ * */
+#define CONFIG_IMX_FUSE
/*
* SPI Configs
generated by cgit v1.1 at 2024-11-21 16:14:04 +0000