diff options
| -rw-r--r-- | board/mpc8360emds/mpc8360emds.c | 4 | ||||
| -rw-r--r-- | cpu/mpc83xx/spd_sdram.c | 52 | ||||
| -rw-r--r-- | cpu/mpc83xx/start.S | 12 | ||||
| -rw-r--r-- | include/common.h | 5 |
4 files changed, 39 insertions, 34 deletions
diff --git a/board/mpc8360emds/mpc8360emds.c b/board/mpc8360emds/mpc8360emds.c index 5bbaa5c..a9b1d9e 100644 --- a/board/mpc8360emds/mpc8360emds.c +++ b/board/mpc8360emds/mpc8360emds.c @@ -535,6 +535,7 @@ int do_ecc(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) /* write memory location injecting errors */ ppcDWstore((u32 *) i, pattern); + __asm__ __volatile__("sync"); /* disable injects */ ddr->ecc_err_inject &= ~ECC_ERR_INJECT_EIEN; @@ -543,10 +544,12 @@ int do_ecc(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) /* read data, this generates ECC error */ ppcDWload((u32 *) i, ret); + __asm__ __volatile__("sync"); /* re-initialize memory, double word write the location again, * generates new ECC code this time */ ppcDWstore((u32 *) i, writeback); + __asm__ __volatile__("sync"); } enable_interrupts(); return 0; @@ -588,6 +591,7 @@ int do_ecc(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) * double word write the location again, * generates new ECC code this time */ ppcDWstore((u32 *) i, writeback); + __asm__ __volatile__("sync"); } enable_interrupts(); return 0; diff --git a/cpu/mpc83xx/spd_sdram.c b/cpu/mpc83xx/spd_sdram.c index acc8c9e..b91c613 100644 --- a/cpu/mpc83xx/spd_sdram.c +++ b/cpu/mpc83xx/spd_sdram.c @@ -562,54 +562,38 @@ static __inline__ unsigned long get_tbms (void) /* #define CONFIG_DDR_ECC_INIT_VIA_DMA */ void ddr_enable_ecc(unsigned int dram_size) { - uint *p; volatile immap_t *immap = (immap_t *)CFG_IMMRBAR; volatile ddr83xx_t *ddr= &immap->ddr; unsigned long t_start, t_end; + register u64 *p; + register uint size; + unsigned int pattern[2]; #if defined(CONFIG_DDR_ECC_INIT_VIA_DMA) uint i; #endif - - debug("Initialize a Cachline in DRAM\n"); icache_enable(); - -#if defined(CONFIG_DDR_ECC_INIT_VIA_DMA) - /* Initialise DMA for direct Transfers */ - dma_init(); -#endif - t_start = get_tbms(); + pattern[0] = 0xdeadbeef; + pattern[1] = 0xdeadbeef; #if !defined(CONFIG_DDR_ECC_INIT_VIA_DMA) - debug("DDR init: Cache flush method\n"); - for (p = 0; p < (uint *)(dram_size); p++) { - if (((unsigned int)p & 0x1f) == 0) { - ppcDcbz((unsigned long) p); - } - - /* write pattern to cache and flush */ - *p = (unsigned int)0xdeadbeef; - - if (((unsigned int)p & 0x1c) == 0x1c) { - ppcDcbf((unsigned long) p); - } + debug("ddr init: CPU FP write method\n"); + size = dram_size; + for (p = 0; p < (u64*)(size); p++) { + ppcDWstore((u32*)p, pattern); } + __asm__ __volatile__ ("sync"); #else - printf("DDR init: DMA method\n"); - for (p = 0; p < (uint *)(8 * 1024); p++) { - /* zero one data cache line */ - if (((unsigned int)p & 0x1f) == 0) { - ppcDcbz((unsigned long)p); - } - - /* write pattern to it and flush */ - *p = (unsigned int)0xdeadbeef; - - if (((unsigned int)p & 0x1c) == 0x1c) { - ppcDcbf((unsigned long)p); - } + debug("ddr init: DMA method\n"); + size = 0x2000; + for (p = 0; p < (u64*)(size); p++) { + ppcDWstore((u32*)p, pattern); } + __asm__ __volatile__ ("sync"); + /* Initialise DMA for direct transfer */ + dma_init(); + /* Start DMA to transfer */ dma_xfer((uint *)0x2000, 0x2000, (uint *)0); /* 8K */ dma_xfer((uint *)0x4000, 0x4000, (uint *)0); /* 16K */ dma_xfer((uint *)0x8000, 0x8000, (uint *)0); /* 32K */ diff --git a/cpu/mpc83xx/start.S b/cpu/mpc83xx/start.S index a7ed3c5..c43835c 100644 --- a/cpu/mpc83xx/start.S +++ b/cpu/mpc83xx/start.S @@ -870,6 +870,18 @@ ppcDcbz: dcbz r0,r3 blr + .globl ppcDWstore +ppcDWstore: + lfd 1, 0(r4) + stfd 1, 0(r3) + blr + + .globl ppcDWload +ppcDWload: + lfd 1, 0(r3) + stfd 1, 0(r4) + blr + /*-------------------------------------------------------------------*/ /* diff --git a/include/common.h b/include/common.h index 349d5cf..0be8372 100644 --- a/include/common.h +++ b/include/common.h @@ -402,6 +402,11 @@ void ppcSync(void); void ppcDcbz(unsigned long value); #endif +#if defined (CONFIG_MPC83XX) +void ppcDWload(unsigned int *addr, unsigned int *ret); +void ppcDWstore(unsigned int *addr, unsigned int *value); +#endif + /* $(CPU)/cpu.c */ int checkcpu (void); int checkicache (void); |