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-rw-r--r--arch/arm/cpu/arm920t/s3c24x0/Makefile1
-rw-r--r--arch/arm/cpu/arm920t/s3c24x0/cpu_info.c54
-rw-r--r--arch/arm/cpu/arm926ejs/cache.c5
-rw-r--r--arch/arm/cpu/arm926ejs/davinci/timer.c2
-rw-r--r--arch/arm/include/asm/arch-omap4/clocks.h63
-rw-r--r--arch/arm/lib/bootm.c2
-rw-r--r--board/calao/sbc35_a9g20/sbc35_a9g20.c1
-rw-r--r--board/calao/tny_a9260/tny_a9260.c5
-rw-r--r--board/denx/m28evk/u-boot.bd8
-rw-r--r--board/freescale/mx51evk/mx51evk.c3
-rw-r--r--board/freescale/mx53loco/mx53loco.c3
-rw-r--r--board/lubbock/lubbock.c6
-rw-r--r--board/ti/panda/panda.c59
-rw-r--r--drivers/mmc/pxa_mmc.c5
-rw-r--r--include/configs/sbc35_a9g20.h3
-rw-r--r--include/configs/tny_a9260.h4
16 files changed, 201 insertions, 23 deletions
diff --git a/arch/arm/cpu/arm920t/s3c24x0/Makefile b/arch/arm/cpu/arm920t/s3c24x0/Makefile
index bd53724..0029700 100644
--- a/arch/arm/cpu/arm920t/s3c24x0/Makefile
+++ b/arch/arm/cpu/arm920t/s3c24x0/Makefile
@@ -26,6 +26,7 @@ include $(TOPDIR)/config.mk
LIB = $(obj)lib$(SOC).o
COBJS-$(CONFIG_USE_IRQ) += interrupts.o
+COBJS-$(CONFIG_DISPLAY_CPUINFO) += cpu_info.o
COBJS-y += speed.o
COBJS-y += timer.o
COBJS-y += usb.o
diff --git a/arch/arm/cpu/arm920t/s3c24x0/cpu_info.c b/arch/arm/cpu/arm920t/s3c24x0/cpu_info.c
new file mode 100644
index 0000000..14c5c6a
--- /dev/null
+++ b/arch/arm/cpu/arm920t/s3c24x0/cpu_info.c
@@ -0,0 +1,54 @@
+/*
+ * (C) Copyright 2010
+ * David Mueller <d.mueller@elsoft.ch>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch/s3c24x0_cpu.h>
+
+typedef ulong (*getfreq)(void);
+
+static const getfreq freq_f[] = {
+ get_FCLK,
+ get_HCLK,
+ get_PCLK,
+};
+
+static const char freq_c[] = { 'F', 'H', 'P' };
+
+int print_cpuinfo(void)
+{
+ int i;
+ char buf[32];
+/* the S3C2400 seems to be lacking a CHIP ID register */
+#ifndef CONFIG_S3C2400
+ ulong cpuid;
+ struct s3c24x0_gpio * const gpio = s3c24x0_get_base_gpio();
+
+ cpuid = readl(&gpio->gstatus1);
+ printf("CPUID: %8lX\n", cpuid);
+#endif
+ for (i = 0; i < ARRAY_SIZE(freq_f); i++)
+ printf("%cCLK: %8s MHz\n", freq_c[i], strmhz(buf, freq_f[i]()));
+
+ return 0;
+}
diff --git a/arch/arm/cpu/arm926ejs/cache.c b/arch/arm/cpu/arm926ejs/cache.c
index 4415642..ee90ab7 100644
--- a/arch/arm/cpu/arm926ejs/cache.c
+++ b/arch/arm/cpu/arm926ejs/cache.c
@@ -38,11 +38,6 @@ void invalidate_dcache_all(void)
dcache_noop();
}
-void flush_dcache_all(void)
-{
- dcache_noop();
-}
-
void invalidate_dcache_range(unsigned long start, unsigned long stop)
{
dcache_noop();
diff --git a/arch/arm/cpu/arm926ejs/davinci/timer.c b/arch/arm/cpu/arm926ejs/davinci/timer.c
index a06d449..93c9e60 100644
--- a/arch/arm/cpu/arm926ejs/davinci/timer.c
+++ b/arch/arm/cpu/arm926ejs/davinci/timer.c
@@ -108,7 +108,7 @@ void __udelay(unsigned long usec)
*/
ulong get_tbclk(void)
{
- return CONFIG_SYS_HZ;
+ return gd->timer_rate_hz;
}
#ifdef CONFIG_HW_WATCHDOG
diff --git a/arch/arm/include/asm/arch-omap4/clocks.h b/arch/arm/include/asm/arch-omap4/clocks.h
index c2a9b46..cd304e8 100644
--- a/arch/arm/include/asm/arch-omap4/clocks.h
+++ b/arch/arm/include/asm/arch-omap4/clocks.h
@@ -470,6 +470,47 @@ struct omap4_prcm_regs {
};
+struct omap4_scrm_regs {
+ u32 revision; /* 0x0000 */
+ u32 pad00[63];
+ u32 clksetuptime; /* 0x0100 */
+ u32 pmicsetuptime; /* 0x0104 */
+ u32 pad01[2];
+ u32 altclksrc; /* 0x0110 */
+ u32 pad02[2];
+ u32 c2cclkm; /* 0x011c */
+ u32 pad03[56];
+ u32 extclkreq; /* 0x0200 */
+ u32 accclkreq; /* 0x0204 */
+ u32 pwrreq; /* 0x0208 */
+ u32 pad04[1];
+ u32 auxclkreq0; /* 0x0210 */
+ u32 auxclkreq1; /* 0x0214 */
+ u32 auxclkreq2; /* 0x0218 */
+ u32 auxclkreq3; /* 0x021c */
+ u32 auxclkreq4; /* 0x0220 */
+ u32 auxclkreq5; /* 0x0224 */
+ u32 pad05[3];
+ u32 c2cclkreq; /* 0x0234 */
+ u32 pad06[54];
+ u32 auxclk0; /* 0x0310 */
+ u32 auxclk1; /* 0x0314 */
+ u32 auxclk2; /* 0x0318 */
+ u32 auxclk3; /* 0x031c */
+ u32 auxclk4; /* 0x0320 */
+ u32 auxclk5; /* 0x0324 */
+ u32 pad07[54];
+ u32 rsttime_reg; /* 0x0400 */
+ u32 pad08[6];
+ u32 c2crstctrl; /* 0x041c */
+ u32 extpwronrstctrl; /* 0x0420 */
+ u32 pad09[59];
+ u32 extwarmrstst_reg; /* 0x0510 */
+ u32 apewarmrstst_reg; /* 0x0514 */
+ u32 pad10[1];
+ u32 c2cwarmrstst_reg; /* 0x051C */
+};
+
/* DPLL register offsets */
#define CM_CLKMODE_DPLL 0
#define CM_IDLEST_DPLL 0x4
@@ -652,6 +693,28 @@ struct omap4_prcm_regs {
#define TPS62361_BASE_VOLT_MV 500
#define TPS62361_VSEL0_GPIO 7
+/* AUXCLKx reg fields */
+#define AUXCLK_ENABLE_MASK (1 << 8)
+#define AUXCLK_SRCSELECT_SHIFT 1
+#define AUXCLK_SRCSELECT_MASK (3 << 1)
+#define AUXCLK_CLKDIV_SHIFT 16
+#define AUXCLK_CLKDIV_MASK (0xF << 16)
+
+#define AUXCLK_SRCSELECT_SYS_CLK 0
+#define AUXCLK_SRCSELECT_CORE_DPLL 1
+#define AUXCLK_SRCSELECT_PER_DPLL 2
+#define AUXCLK_SRCSELECT_ALTERNATE 3
+
+#define AUXCLK_CLKDIV_2 1
+#define AUXCLK_CLKDIV_16 0xF
+
+/* ALTCLKSRC */
+#define ALTCLKSRC_MODE_MASK 3
+#define ALTCLKSRC_ENABLE_INT_MASK 4
+#define ALTCLKSRC_ENABLE_EXT_MASK 8
+
+#define ALTCLKSRC_MODE_ACTIVE 1
+
/* Defines for DPLL setup */
#define DPLL_LOCKED_FREQ_TOLERANCE_0 0
#define DPLL_LOCKED_FREQ_TOLERANCE_500_KHZ 500
diff --git a/arch/arm/lib/bootm.c b/arch/arm/lib/bootm.c
index 802e833..afa0093 100644
--- a/arch/arm/lib/bootm.c
+++ b/arch/arm/lib/bootm.c
@@ -206,6 +206,8 @@ static int bootm_linux_fdt(int machid, bootm_headers_t *images)
fixup_memory_node(*of_flat_tree);
+ fdt_fixup_ethernet(*of_flat_tree);
+
fdt_initrd(*of_flat_tree, *initrd_start, *initrd_end, 1);
announce_and_cleanup();
diff --git a/board/calao/sbc35_a9g20/sbc35_a9g20.c b/board/calao/sbc35_a9g20/sbc35_a9g20.c
index 4f5cff6..b6c8791 100644
--- a/board/calao/sbc35_a9g20/sbc35_a9g20.c
+++ b/board/calao/sbc35_a9g20/sbc35_a9g20.c
@@ -152,7 +152,6 @@ int board_init(void)
/* Enable Ctrlc */
console_init_f();
- gd->bd->bi_arch_number = MACH_TYPE_SBC35_A9G20;
/* adress of boot parameters */
gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
diff --git a/board/calao/tny_a9260/tny_a9260.c b/board/calao/tny_a9260/tny_a9260.c
index 24de177..31074d0 100644
--- a/board/calao/tny_a9260/tny_a9260.c
+++ b/board/calao/tny_a9260/tny_a9260.c
@@ -86,11 +86,6 @@ int board_init(void)
/* Enable Ctrlc */
console_init_f();
-#if defined(CONFIG_TNY_A9260)
- gd->bd->bi_arch_number = MACH_TYPE_TNY_A9260;
-#elif defined(CONFIG_TNY_A9G20)
- gd->bd->bi_arch_number = MACH_TYPE_TNY_A9G20;
-#endif
/* adress of boot parameters */
gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
diff --git a/board/denx/m28evk/u-boot.bd b/board/denx/m28evk/u-boot.bd
index 3ce7f92..c60615a 100644
--- a/board/denx/m28evk/u-boot.bd
+++ b/board/denx/m28evk/u-boot.bd
@@ -4,11 +4,11 @@ sources {
}
section (0) {
- load u_boot_spl > 0x0000;
- load ivt (entry = 0x0014) > 0x8000;
+ load u_boot_spl > 0x0000;
+ load ivt (entry = 0x0014) > 0x8000;
hab call 0x8000;
- load u_boot > 0x40000100;
- load ivt (entry = 0x40000100) > 0x8000;
+ load u_boot > 0x40000100;
+ load ivt (entry = 0x40000100) > 0x8000;
hab call 0x8000;
}
diff --git a/board/freescale/mx51evk/mx51evk.c b/board/freescale/mx51evk/mx51evk.c
index 13c5941..e43aaf7 100644
--- a/board/freescale/mx51evk/mx51evk.c
+++ b/board/freescale/mx51evk/mx51evk.c
@@ -203,7 +203,7 @@ static void setup_usb_h1(void)
mxc_iomux_set_pad(MX51_PIN_EIM_D21, GPIO_PAD);
}
-void board_ehci_hcd_init(int port)
+int board_ehci_hcd_init(int port)
{
/* Set USBH1_STP to GPIO and toggle it */
mxc_request_iomux(MX51_PIN_USBH1_STP, IOMUX_CONFIG_GPIO);
@@ -228,6 +228,7 @@ void board_ehci_hcd_init(int port)
gpio_direction_output(MX51EVK_USBH1_HUB_RST, 0);
mdelay(2);
gpio_set_value(MX51EVK_USBH1_HUB_RST, 1);
+ return 0;
}
#endif
diff --git a/board/freescale/mx53loco/mx53loco.c b/board/freescale/mx53loco/mx53loco.c
index 57170ce..ea4d354 100644
--- a/board/freescale/mx53loco/mx53loco.c
+++ b/board/freescale/mx53loco/mx53loco.c
@@ -79,12 +79,13 @@ static void setup_iomux_uart(void)
}
#ifdef CONFIG_USB_EHCI_MX5
-void board_ehci_hcd_init(int port)
+int board_ehci_hcd_init(int port)
{
/* request VBUS power enable pin, GPIO[8}, gpio7 */
mxc_request_iomux(MX53_PIN_ATA_DA_2, IOMUX_CONFIG_ALT1);
gpio_direction_output(IOMUX_TO_GPIO(MX53_PIN_ATA_DA_2), 0);
gpio_set_value(IOMUX_TO_GPIO(MX53_PIN_ATA_DA_2), 1);
+ return 0;
}
#endif
diff --git a/board/lubbock/lubbock.c b/board/lubbock/lubbock.c
index 437f944..3527b38 100644
--- a/board/lubbock/lubbock.c
+++ b/board/lubbock/lubbock.c
@@ -28,6 +28,8 @@
#include <common.h>
#include <netdev.h>
#include <asm/arch/pxa.h>
+#include <asm/arch/pxa-regs.h>
+#include <asm/io.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -47,6 +49,10 @@ int board_init (void)
/* adress of boot parameters */
gd->bd->bi_boot_params = 0xa0000100;
+ /* Configure GPIO6 and GPIO8 as OUT, AF1. */
+ setbits_le32(GPDR0, (1 << 6) | (1 << 8));
+ clrsetbits_le32(GAFR0_L, (3 << 12) | (3 << 16), (1 << 12) | (1 << 16));
+
return 0;
}
diff --git a/board/ti/panda/panda.c b/board/ti/panda/panda.c
index b4271fb..fc8c0b4 100644
--- a/board/ti/panda/panda.c
+++ b/board/ti/panda/panda.c
@@ -24,15 +24,21 @@
#include <common.h>
#include <asm/arch/sys_proto.h>
#include <asm/arch/mmc_host_def.h>
+#include <asm/arch/clocks.h>
+#include <asm/arch/gpio.h>
#include "panda_mux_data.h"
+#define PANDA_ULPI_PHY_TYPE_GPIO 182
+
DECLARE_GLOBAL_DATA_PTR;
const struct omap_sysinfo sysinfo = {
"Board: OMAP4 Panda\n"
};
+struct omap4_scrm_regs *const scrm = (struct omap4_scrm_regs *)0x4a30a000;
+
/**
* @brief board_init
*
@@ -62,6 +68,59 @@ int board_eth_init(bd_t *bis)
*/
int misc_init_r(void)
{
+ int phy_type;
+ u32 auxclk, altclksrc;
+
+ /* EHCI is not supported on ES1.0 */
+ if (omap_revision() == OMAP4430_ES1_0)
+ return 0;
+
+ gpio_direction_input(PANDA_ULPI_PHY_TYPE_GPIO);
+ phy_type = gpio_get_value(PANDA_ULPI_PHY_TYPE_GPIO);
+
+ if (phy_type == 1) {
+ /* ULPI PHY supplied by auxclk3 derived from sys_clk */
+ debug("ULPI PHY supplied by auxclk3\n");
+
+ auxclk = readl(&scrm->auxclk3);
+ /* Select sys_clk */
+ auxclk &= ~AUXCLK_SRCSELECT_MASK;
+ auxclk |= AUXCLK_SRCSELECT_SYS_CLK << AUXCLK_SRCSELECT_SHIFT;
+ /* Set the divisor to 2 */
+ auxclk &= ~AUXCLK_CLKDIV_MASK;
+ auxclk |= AUXCLK_CLKDIV_2 << AUXCLK_CLKDIV_SHIFT;
+ /* Request auxilary clock #3 */
+ auxclk |= AUXCLK_ENABLE_MASK;
+
+ writel(auxclk, &scrm->auxclk3);
+ } else {
+ /* ULPI PHY supplied by auxclk1 derived from PER dpll */
+ debug("ULPI PHY supplied by auxclk1\n");
+
+ auxclk = readl(&scrm->auxclk1);
+ /* Select per DPLL */
+ auxclk &= ~AUXCLK_SRCSELECT_MASK;
+ auxclk |= AUXCLK_SRCSELECT_PER_DPLL << AUXCLK_SRCSELECT_SHIFT;
+ /* Set the divisor to 16 */
+ auxclk &= ~AUXCLK_CLKDIV_MASK;
+ auxclk |= AUXCLK_CLKDIV_16 << AUXCLK_CLKDIV_SHIFT;
+ /* Request auxilary clock #3 */
+ auxclk |= AUXCLK_ENABLE_MASK;
+
+ writel(auxclk, &scrm->auxclk1);
+ }
+
+ altclksrc = readl(&scrm->altclksrc);
+
+ /* Activate alternate system clock supplier */
+ altclksrc &= ~ALTCLKSRC_MODE_MASK;
+ altclksrc |= ALTCLKSRC_MODE_ACTIVE;
+
+ /* enable clocks */
+ altclksrc |= ALTCLKSRC_ENABLE_INT_MASK | ALTCLKSRC_ENABLE_EXT_MASK;
+
+ writel(altclksrc, &scrm->altclksrc);
+
return 0;
}
diff --git a/drivers/mmc/pxa_mmc.c b/drivers/mmc/pxa_mmc.c
index 2b58a98..80c4445 100644
--- a/drivers/mmc/pxa_mmc.c
+++ b/drivers/mmc/pxa_mmc.c
@@ -560,11 +560,6 @@ mmc_legacy_init(int verbose)
/* Reset device interface type */
mmc_dev.if_type = IF_TYPE_UNKNOWN;
-#if defined(CONFIG_LUBBOCK) || \
- (defined(CONFIG_GUMSTIX) && !defined(CONFIG_CPU_PXA27X))
- set_GPIO_mode(GPIO6_MMCCLK_MD);
- set_GPIO_mode(GPIO8_MMCCS0_MD);
-#endif
#ifdef CONFIG_CPU_MONAHANS /* pxa3xx */
writel(readl(CKENA) | CKENA_12_MMC0 | CKENA_13_MMC1, CKENA);
#else /* pxa2xx */
diff --git a/include/configs/sbc35_a9g20.h b/include/configs/sbc35_a9g20.h
index 1e355a8..cdf8659 100644
--- a/include/configs/sbc35_a9g20.h
+++ b/include/configs/sbc35_a9g20.h
@@ -36,6 +36,9 @@
#define CONFIG_ENV_IS_IN_EEPROM
#endif
+#define MACH_TYPE_SBC35_A9G20 1848
+#define CONFIG_MACH_TYPE MACH_TYPE_SBC35_A9G20
+
/* ARM asynchronous clock */
#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* 12.000 MHz crystal */
diff --git a/include/configs/tny_a9260.h b/include/configs/tny_a9260.h
index ec8ec18..0043926 100644
--- a/include/configs/tny_a9260.h
+++ b/include/configs/tny_a9260.h
@@ -45,8 +45,12 @@
/* Define actual evaluation board type from used processor type */
#ifdef CONFIG_AT91SAM9G20
# define CONFIG_TNY_A9G20
+# define MACH_TYPE_TNY_A9G20 2059
+# define CONFIG_MACH_TYPE MACH_TYPE_TNY_A9G20
#else
# define CONFIG_TNY_A9260
+# define MACH_TYPE_TNY_A9260 2058
+# define CONFIG_MACH_TYPE MACH_TYPE_TNY_A9260
#endif
/* ARM asynchronous clock */
generated by cgit v1.1 at 2024-11-11 23:53:58 +0000