diff options
| -rw-r--r-- | arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h | 1 | ||||
| -rw-r--r-- | board/freescale/ls1021aqds/ls1021aqds.c | 7 | ||||
| -rw-r--r-- | board/freescale/ls1021atwr/ls1021atwr.c | 10 |
3 files changed, 18 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h index b5db720..9f4fbba 100644 --- a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h +++ b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h @@ -448,6 +448,7 @@ struct ccsr_ddr { #define CCI400_CTRLORD_TERM_BARRIER 0x00000008 #define CCI400_CTRLORD_EN_BARRIER 0 +#define CCI400_SHAORD_NON_SHAREABLE 0x00000002 /* CCI-400 registers */ struct ccsr_cci400 { diff --git a/board/freescale/ls1021aqds/ls1021aqds.c b/board/freescale/ls1021aqds/ls1021aqds.c index bcfa9b9..5154a85 100644 --- a/board/freescale/ls1021aqds/ls1021aqds.c +++ b/board/freescale/ls1021aqds/ls1021aqds.c @@ -233,6 +233,13 @@ int board_init(void) /* Set CCI-400 control override register to * enable barrier transaction */ out_le32(&cci->ctrl_ord, CCI400_CTRLORD_EN_BARRIER); + /* + * Set CCI-400 Slave interface S0, S1, S2 Shareable Override Register + * All transactions are treated as non-shareable + */ + out_le32(&cci->slave[0].sha_ord, CCI400_SHAORD_NON_SHAREABLE); + out_le32(&cci->slave[1].sha_ord, CCI400_SHAORD_NON_SHAREABLE); + out_le32(&cci->slave[2].sha_ord, CCI400_SHAORD_NON_SHAREABLE); select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT); diff --git a/board/freescale/ls1021atwr/ls1021atwr.c b/board/freescale/ls1021atwr/ls1021atwr.c index a90bb09..3e8981b 100644 --- a/board/freescale/ls1021atwr/ls1021atwr.c +++ b/board/freescale/ls1021atwr/ls1021atwr.c @@ -277,6 +277,16 @@ int board_early_init_f(void) int board_init(void) { + struct ccsr_cci400 *cci = (struct ccsr_cci400 *)CONFIG_SYS_CCI400_ADDR; + + /* + * Set CCI-400 Slave interface S0, S1, S2 Shareable Override Register + * All transactions are treated as non-shareable + */ + out_le32(&cci->slave[0].sha_ord, CCI400_SHAORD_NON_SHAREABLE); + out_le32(&cci->slave[1].sha_ord, CCI400_SHAORD_NON_SHAREABLE); + out_le32(&cci->slave[2].sha_ord, CCI400_SHAORD_NON_SHAREABLE); + #ifndef CONFIG_SYS_FSL_NO_SERDES fsl_serdes_init(); config_serdes_mux(); |