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-rw-r--r--board/chromebook-x86/coreboot/Makefile2
-rw-r--r--board/chromebook-x86/coreboot/coreboot.c16
-rw-r--r--include/configs/coreboot.h5
3 files changed, 22 insertions, 1 deletions
diff --git a/board/chromebook-x86/coreboot/Makefile b/board/chromebook-x86/coreboot/Makefile
index 4f2ac89..27ebe78 100644
--- a/board/chromebook-x86/coreboot/Makefile
+++ b/board/chromebook-x86/coreboot/Makefile
@@ -12,4 +12,4 @@
# SPDX-License-Identifier: GPL-2.0+
#
-obj-y += coreboot_start.o
+obj-y += coreboot_start.o coreboot.o
diff --git a/board/chromebook-x86/coreboot/coreboot.c b/board/chromebook-x86/coreboot/coreboot.c
new file mode 100644
index 0000000..0240c34
--- /dev/null
+++ b/board/chromebook-x86/coreboot/coreboot.c
@@ -0,0 +1,16 @@
+/*
+ * Copyright (C) 2013 Google, Inc
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <cros_ec.h>
+
+int arch_early_init_r(void)
+{
+ if (cros_ec_board_init())
+ return -1;
+
+ return 0;
+}
diff --git a/include/configs/coreboot.h b/include/configs/coreboot.h
index f03a768..ce614c8 100644
--- a/include/configs/coreboot.h
+++ b/include/configs/coreboot.h
@@ -283,6 +283,11 @@
*/
#define CONFIG_PCI
+#define CONFIG_CROS_EC
+#define CONFIG_CROS_EC_LPC
+#define CONFIG_CMD_CROS_EC
+#define CONFIG_ARCH_EARLY_INIT_R
+
/*-----------------------------------------------------------------------
* USB configuration
*/