diff options
| -rw-r--r-- | arch/arm/cpu/armv7/omap3/sdrc.c | 6 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-omap3/sys_proto.h | 1 |
2 files changed, 6 insertions, 1 deletions
diff --git a/arch/arm/cpu/armv7/omap3/sdrc.c b/arch/arm/cpu/armv7/omap3/sdrc.c index 7a29131..4f15ac9 100644 --- a/arch/arm/cpu/armv7/omap3/sdrc.c +++ b/arch/arm/cpu/armv7/omap3/sdrc.c @@ -135,6 +135,9 @@ void do_sdrc_init(u32 cs, u32 early) sdrc_actim_base0 = (struct sdrc_actim *)SDRC_ACTIM_CTRL0_BASE; sdrc_actim_base1 = (struct sdrc_actim *)SDRC_ACTIM_CTRL1_BASE; + /* set some default timings */ + timings.sharing = SDRC_SHARING; + /* * When called in the early context this may be SPL and we will * need to set all of the timings. This ends up being board @@ -145,6 +148,7 @@ void do_sdrc_init(u32 cs, u32 early) * setup CS1. */ #ifdef CONFIG_SPL_BUILD + /* set/modify board-specific timings */ get_board_mem_timings(&timings); #endif if (early) { @@ -155,7 +159,7 @@ void do_sdrc_init(u32 cs, u32 early) writel(0, &sdrc_base->sysconfig); /* setup sdrc to ball mux */ - writel(SDRC_SHARING, &sdrc_base->sharing); + writel(timings.sharing, &sdrc_base->sharing); /* Disable Power Down of CKE because of 1 CKE on combo part */ writel(WAKEUPPROC | SRFRONRESET | PAGEPOLICY_HIGH, diff --git a/arch/arm/include/asm/arch-omap3/sys_proto.h b/arch/arm/include/asm/arch-omap3/sys_proto.h index 34bd8c5..bcf92fb 100644 --- a/arch/arm/include/asm/arch-omap3/sys_proto.h +++ b/arch/arm/include/asm/arch-omap3/sys_proto.h @@ -23,6 +23,7 @@ struct emu_hal_params { /* Board SDRC timing values */ struct board_sdrc_timings { + u32 sharing; u32 mcfg; u32 ctrla; u32 ctrlb; |