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-rw-r--r--MAINTAINERS1
-rwxr-xr-xMAKEALL2
-rw-r--r--Makefile11
-rw-r--r--board/prodrive/pdnb3/flash.c4
-rw-r--r--include/configs/pdnb3.h37
5 files changed, 50 insertions, 5 deletions
diff --git a/MAINTAINERS b/MAINTAINERS
index 81c113d..e9203eb 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -465,6 +465,7 @@ Stefan Roese <sr@denx.de>
ixdpg425 xscale
pdnb3 xscale
+ scpu xscale
Robert Schwebel <r.schwebel@pengutronix.de>
diff --git a/MAKEALL b/MAKEALL
index b3e16bc..40a5c77 100755
--- a/MAKEALL
+++ b/MAKEALL
@@ -225,7 +225,7 @@ LIST_pxa=" \
xsengine zylonite \
"
-LIST_ixp="ixdp425 ixdpg425 pdnb3"
+LIST_ixp="ixdp425 ixdpg425 pdnb3 scpu"
LIST_arm=" \
diff --git a/Makefile b/Makefile
index af33006..b1952ed 100644
--- a/Makefile
+++ b/Makefile
@@ -2066,8 +2066,15 @@ pleb2_config : unconfig
logodl_config : unconfig
@$(MKCONFIG) $(@:_config=) arm pxa logodl
-pdnb3_config : unconfig
- @$(MKCONFIG) $(@:_config=) arm ixp pdnb3 prodrive
+pdnb3_config \
+scpu_config: unconfig
+ @if [ "$(findstring scpu_,$@)" ] ; then \
+ echo "#define CONFIG_SCPU" >>include/config.h ; \
+ echo "... on SCPU board variant" ; \
+ else \
+ >include/config.h ; \
+ fi
+ @$(MKCONFIG) -a pdnb3 arm ixp pdnb3 prodrive
pxa255_idp_config: unconfig
@$(MKCONFIG) $(@:_config=) arm pxa pxa255_idp
diff --git a/board/prodrive/pdnb3/flash.c b/board/prodrive/pdnb3/flash.c
index d0e5fe7..518ea9c 100644
--- a/board/prodrive/pdnb3/flash.c
+++ b/board/prodrive/pdnb3/flash.c
@@ -24,6 +24,8 @@
#include <common.h>
#include <asm/arch/ixp425.h>
+#if !defined(CFG_FLASH_CFI_DRIVER)
+
/*
* include common flash code (for esd boards)
*/
@@ -83,3 +85,5 @@ unsigned long flash_init(void)
return size;
}
+
+#endif /* CFG_FLASH_CFI_DRIVER */
diff --git a/include/configs/pdnb3.h b/include/configs/pdnb3.h
index ba6b113..2cc137c 100644
--- a/include/configs/pdnb3.h
+++ b/include/configs/pdnb3.h
@@ -71,12 +71,18 @@
#define CONFIG_BAUDRATE 115200
#define CFG_IXP425_CONSOLE IXP425_UART1 /* we use UART1 for console */
+#if defined(CONFIG_SCPU)
+#define CMD_NAND_ADD 0
+#else
+#define CMD_NAND_ADD CFG_CMD_NAND
+#endif
+
#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
CFG_CMD_DHCP | \
CFG_CMD_DATE | \
CFG_CMD_NET | \
CFG_CMD_MII | \
- CFG_CMD_NAND | \
+ CMD_NAND_ADD | \
CFG_CMD_I2C | \
CFG_CMD_ELF | \
CFG_CMD_PING)
@@ -176,12 +182,20 @@
#define CFG_FLASH_BASE 0x50000000
#define CFG_MONITOR_BASE CFG_FLASH_BASE
+#if defined(CONFIG_SCPU)
+#define CFG_MONITOR_LEN (384 << 10) /* Reserve 512 kB for Monitor */
+#else
#define CFG_MONITOR_LEN (504 << 10) /* Reserve 512 kB for Monitor */
+#endif
/*
* Expansion bus settings
*/
+#if defined(CONFIG_SCPU)
+#define CFG_EXP_CS0 0x94d23C42 /* 8bit, max size */
+#else
#define CFG_EXP_CS0 0x94913C43 /* 8bit, max size */
+#endif
#define CFG_EXP_CS1 0x85000043 /* 8bit, 512bytes */
/*
@@ -194,6 +208,12 @@
/*
* FLASH and environment organization
*/
+#if defined(CONFIG_SCPU)
+#define CFG_FLASH_CFI /* The flash is CFI compatible */
+#define CFG_FLASH_CFI_DRIVER /* Use common CFI driver */
+#define CFG_FLASH_CFI_WIDTH FLASH_CFI_16BIT /* no byte writes on IXP4xx */
+#endif
+
#define FLASH_BASE0_PRELIM CFG_FLASH_BASE /* FLASH bank #0 */
#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
@@ -217,20 +237,27 @@
#define CFG_ENV_IS_IN_FLASH 1
+#if defined(CONFIG_SCPU)
+#define CFG_ENV_SECT_SIZE 0x20000 /* size of one complete sector */
+#define CFG_ENV_SIZE 0x4000 /* Total Size of Environment Sector */
+#else
#define CFG_ENV_SECT_SIZE 0x1000 /* size of one complete sector */
-#define CFG_ENV_ADDR (CFG_FLASH_BASE + CFG_MONITOR_LEN)
#define CFG_ENV_SIZE 0x1000 /* Total Size of Environment Sector */
+#endif
+#define CFG_ENV_ADDR (CFG_FLASH_BASE + CFG_MONITOR_LEN)
/* Address and size of Redundant Environment Sector */
#define CFG_ENV_ADDR_REDUND (CFG_ENV_ADDR + CFG_ENV_SECT_SIZE)
#define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE)
+#if !defined(CONFIG_SCPU)
/*
* NAND-FLASH stuff
*/
#define CFG_MAX_NAND_DEVICE 1
#define NAND_MAX_CHIPS 1
#define CFG_NAND_BASE 0x51000000 /* NAND FLASH Base Address */
+#endif
/*
* GPIO settings
@@ -284,9 +311,15 @@
/*
* I2C RTC
*/
+#if 0 /* test-only */
+#define CONFIG_RTC_DS1340 1
+#define CFG_I2C_RTC_ADDR 0x68
+#else
+/* M41T11 Serial Access Timekeeper(R) SRAM */
#define CONFIG_RTC_M41T11 1
#define CFG_I2C_RTC_ADDR 0x68
#define CFG_M41T11_BASE_YEAR 1900 /* play along with the linux driver */
+#endif
/*
* Spartan3 FPGA configuration support