diff options
| -rw-r--r-- | board/freescale/mx6q_arm2/flash_header.S | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/board/freescale/mx6q_arm2/flash_header.S b/board/freescale/mx6q_arm2/flash_header.S index b925a4b..b77a718 100644 --- a/board/freescale/mx6q_arm2/flash_header.S +++ b/board/freescale/mx6q_arm2/flash_header.S @@ -226,9 +226,9 @@ MXC_DCD_ITEM(125, MMDC_P0_BASE_ADDR + 0x404, 0x00011006) /* enable AXI cache for VDOA/VPU/IPU */ MXC_DCD_ITEM(126, IOMUXC_BASE_ADDR + 0x010, 0xf00000ff) -/* set IPU Qos=0x7 */ -MXC_DCD_ITEM(127, IOMUXC_BASE_ADDR + 0x018, 0x00070007) -MXC_DCD_ITEM(128, IOMUXC_BASE_ADDR + 0x01c, 0x00070007) +/* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */ +MXC_DCD_ITEM(127, IOMUXC_BASE_ADDR + 0x018, 0x007f007f) +MXC_DCD_ITEM(128, IOMUXC_BASE_ADDR + 0x01c, 0x007f007f) #else @@ -351,9 +351,9 @@ MXC_DCD_ITEM(90, MMDC_P0_BASE_ADDR + 0x404, 0x00011006) /* enable AXI cache for VDOA/VPU/IPU */ MXC_DCD_ITEM(91, IOMUXC_BASE_ADDR + 0x010, 0xf00000ff) -/* set IPU Qos=0x7 */ -MXC_DCD_ITEM(92, IOMUXC_BASE_ADDR + 0x018, 0x00070007) -MXC_DCD_ITEM(93, IOMUXC_BASE_ADDR + 0x01c, 0x00070007) +/* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */ +MXC_DCD_ITEM(92, IOMUXC_BASE_ADDR + 0x018, 0x007f007f) +MXC_DCD_ITEM(93, IOMUXC_BASE_ADDR + 0x01c, 0x007f007f) #endif |