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-rw-r--r--board/freescale/mx6q_arm2/flash_header.S5
-rw-r--r--include/configs/mx6dl_arm2.h5
2 files changed, 10 insertions, 0 deletions
diff --git a/board/freescale/mx6q_arm2/flash_header.S b/board/freescale/mx6q_arm2/flash_header.S
index cfbaae9..8254179 100644
--- a/board/freescale/mx6q_arm2/flash_header.S
+++ b/board/freescale/mx6q_arm2/flash_header.S
@@ -154,8 +154,13 @@ MXC_DCD_ITEM(70, MMDC_P0_BASE_ADDR + 0x018, 0x00081740)
MXC_DCD_ITEM(71, MMDC_P0_BASE_ADDR + 0x01c, 0x00008000)
MXC_DCD_ITEM(72, MMDC_P0_BASE_ADDR + 0x02c, 0x000026d2)
MXC_DCD_ITEM(73, MMDC_P0_BASE_ADDR + 0x030, 0x00440e21)
+#ifdef CONFIG_DDR_32BIT
+MXC_DCD_ITEM(74, MMDC_P0_BASE_ADDR + 0x040, 0x00000017)
+MXC_DCD_ITEM(75, MMDC_P0_BASE_ADDR + 0x000, 0xc3190000)
+#else
MXC_DCD_ITEM(74, MMDC_P0_BASE_ADDR + 0x040, 0x00000027)
MXC_DCD_ITEM(75, MMDC_P0_BASE_ADDR + 0x000, 0xc31a0000)
+#endif
# Initialize 2GB DDR3 - Micron MT41J128M
# MR2
diff --git a/include/configs/mx6dl_arm2.h b/include/configs/mx6dl_arm2.h
index 8b52ad5..22cfe66 100644
--- a/include/configs/mx6dl_arm2.h
+++ b/include/configs/mx6dl_arm2.h
@@ -29,6 +29,7 @@
#define CONFIG_MXC
#define CONFIG_MX6DL
#define CONFIG_MX6Q_ARM2
+#define CONFIG_DDR_32BIT /* For 32bit DDR, comment it out for 64bit */
#define CONFIG_FLASH_HEADER
#define CONFIG_FLASH_HEADER_OFFSET 0x400
#define CONFIG_MX6_CLK32 32768
@@ -265,7 +266,11 @@
*/
#define CONFIG_NR_DRAM_BANKS 1
#define PHYS_SDRAM_1 CSD0_DDR_BASE_ADDR
+#ifdef CONFIG_DDR_32BIT
+#define PHYS_SDRAM_1_SIZE (1u * 1024 * 1024 * 1024)
+#else
#define PHYS_SDRAM_1_SIZE (2u * 1024 * 1024 * 1024)
+#endif
#define iomem_valid_addr(addr, size) \
(addr >= PHYS_SDRAM_1 && addr <= (PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE))