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| author | Masahiro Yamada <yamada.m@jp.panasonic.com> | 2015-02-27 02:26:46 +0900 |
|---|---|---|
| committer | Masahiro Yamada <yamada.m@jp.panasonic.com> | 2015-03-01 00:02:23 +0900 |
| commit | d0c47b3ef7c582ec984edeba08984b0acc2ffcba (patch) | |
| tree | 3b7af267b7c62bc15d4d11c31cfae93796baac9b /tools/socfpgaimage.c | |
| parent | c8bc166124c6afec9aee9b895b0ecc953312ac19 (diff) | |
| download | u-boot-imx-d0c47b3ef7c582ec984edeba08984b0acc2ffcba.zip u-boot-imx-d0c47b3ef7c582ec984edeba08984b0acc2ffcba.tar.gz u-boot-imx-d0c47b3ef7c582ec984edeba08984b0acc2ffcba.tar.bz2 | |
serial: UniPhier: use 32 bit register access
For PH1-Pro4, the 8 bit write access to LCR register (offset = 0x11)
is not working correctly. As a side effect, it also modifies MCR
register (offset = 0x10) and results in unexpected behavior.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Diffstat (limited to 'tools/socfpgaimage.c')
0 files changed, 0 insertions, 0 deletions