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authorMatthew McClintock <msm@freescale.com>2012-08-13 08:10:39 +0000
committerAndy Fleming <afleming@freescale.com>2012-08-23 10:24:17 -0500
commitabbe536ebc3ee974593b115de716705f0091344a (patch)
tree9b41f2c417dd6ef6f5fed26f0773de4ea4737390 /tools/mkimage.c
parentc8f9802a72030e783152040b07c3c7694f953dd3 (diff)
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powerpc/p1010rdb: nandboot: compare SVR properly
We were not comparing the SVRs properly previously. This comparison will properly shift the SVR and mask off the E bit This fixes the boot output to show the correct DDR bus width: 512 MiB (DDR3, 16-bit, CL=5, ECC off) instead of 512 MiB (DDR3, 32-bit, CL=5, ECC off) Signed-off-by: Matthew McClintock <msm@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
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