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authorAdrian Alonso <aalonso@freescale.com>2015-07-20 19:04:55 -0500
committerStefano Babic <sbabic@denx.de>2015-07-26 12:07:14 +0200
commit0b7f7c339c13256a2d6f39c0323b0224cb6d46d4 (patch)
tree5943f4986caf0cd740001f462f16f3f3b6c238fc /tools/imximage.c
parent452308c02bb5f4066c8d8650e9f012e17dbb2f95 (diff)
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imx: imximage: add new CHECK/CLR BIT command
* Extend imximage DCD version 2 to support DCD commands CMD_WRITE_CLR_BIT 4 [address] [mask bit] means: while ((*address & ~mask) != 0); CMD_CHECK_BITS_SET 4 [address] [mask bit] means: while ((*address & mask) != mask); CMD_CHECK_BITS_CLR 4 [address] [mask bit] means: *address = *address & ~mask; * Add set_dcd_param_v2 helper function to set DCD command parameters Signed-off-by: Adrian Alonso <aalonso@freescale.com> Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Diffstat (limited to 'tools/imximage.c')
-rw-r--r--tools/imximage.c95
1 files changed, 75 insertions, 20 deletions
diff --git a/tools/imximage.c b/tools/imximage.c
index 6f469ae..909efab 100644
--- a/tools/imximage.c
+++ b/tools/imximage.c
@@ -21,7 +21,10 @@
static table_entry_t imximage_cmds[] = {
{CMD_BOOT_FROM, "BOOT_FROM", "boot command", },
{CMD_BOOT_OFFSET, "BOOT_OFFSET", "Boot offset", },
- {CMD_DATA, "DATA", "Reg Write Data", },
+ {CMD_WRITE_DATA, "DATA", "Reg Write Data", },
+ {CMD_WRITE_CLR_BIT, "CLR_BIT", "Reg clear bit", },
+ {CMD_CHECK_BITS_SET, "CHECK_BITS_SET", "Reg Check bits set", },
+ {CMD_CHECK_BITS_CLR, "CHECK_BITS_CLR", "Reg Check bits clr", },
{CMD_CSF, "CSF", "Command Sequence File", },
{CMD_IMAGE_VERSION, "IMAGE_VERSION", "image version", },
{-1, "", "", },
@@ -62,7 +65,7 @@ static table_entry_t imximage_boot_loadsize[] = {
*/
static table_entry_t imximage_versions[] = {
{IMXIMAGE_V1, "", " (i.MX25/35/51 compatible)", },
- {IMXIMAGE_V2, "", " (i.MX53/6 compatible)", },
+ {IMXIMAGE_V2, "", " (i.MX53/6/7 compatible)", },
{-1, "", " (Invalid)", },
};
@@ -79,6 +82,7 @@ static uint32_t imximage_csf_size = UNDEFINED;
static uint32_t imximage_init_loadsize;
static set_dcd_val_t set_dcd_val;
+static set_dcd_param_t set_dcd_param;
static set_dcd_rst_t set_dcd_rst;
static set_imx_hdr_t set_imx_hdr;
static uint32_t max_dcd_entries;
@@ -156,6 +160,43 @@ static void set_dcd_val_v1(struct imx_header *imxhdr, char *name, int lineno,
}
}
+static void set_dcd_param_v2(struct imx_header *imxhdr, uint32_t dcd_len,
+ int32_t cmd)
+{
+ dcd_v2_t *dcd_v2 = &imxhdr->header.hdr_v2.dcd_table;
+
+ switch (cmd) {
+ case CMD_WRITE_DATA:
+ dcd_v2->write_dcd_command.tag = DCD_WRITE_DATA_COMMAND_TAG;
+ dcd_v2->write_dcd_command.length = cpu_to_be16(
+ dcd_len * sizeof(dcd_addr_data_t) + 4);
+ dcd_v2->write_dcd_command.param = DCD_WRITE_DATA_PARAM;
+ break;
+ case CMD_WRITE_CLR_BIT:
+ dcd_v2->write_dcd_command.tag = DCD_WRITE_DATA_COMMAND_TAG;
+ dcd_v2->write_dcd_command.length = cpu_to_be16(
+ dcd_len * sizeof(dcd_addr_data_t) + 4);
+ dcd_v2->write_dcd_command.param = DCD_WRITE_CLR_BIT_PARAM;
+ break;
+ /*
+ * Check data command only supports one entry,
+ * so use 0xC = size(address + value + command).
+ */
+ case CMD_CHECK_BITS_SET:
+ dcd_v2->write_dcd_command.tag = DCD_CHECK_DATA_COMMAND_TAG;
+ dcd_v2->write_dcd_command.length = cpu_to_be16(0xC);
+ dcd_v2->write_dcd_command.param = DCD_CHECK_BITS_SET_PARAM;
+ break;
+ case CMD_CHECK_BITS_CLR:
+ dcd_v2->write_dcd_command.tag = DCD_CHECK_DATA_COMMAND_TAG;
+ dcd_v2->write_dcd_command.length = cpu_to_be16(0xC);
+ dcd_v2->write_dcd_command.param = DCD_CHECK_BITS_SET_PARAM;
+ break;
+ default:
+ break;
+ }
+}
+
static void set_dcd_val_v2(struct imx_header *imxhdr, char *name, int lineno,
int fld, uint32_t value, uint32_t off)
{
@@ -200,10 +241,7 @@ static void set_dcd_rst_v2(struct imx_header *imxhdr, uint32_t dcd_len,
dcd_v2->header.length = cpu_to_be16(
dcd_len * sizeof(dcd_addr_data_t) + 8);
dcd_v2->header.version = DCD_VERSION;
- dcd_v2->write_dcd_command.tag = DCD_COMMAND_TAG;
- dcd_v2->write_dcd_command.length = cpu_to_be16(
- dcd_len * sizeof(dcd_addr_data_t) + 4);
- dcd_v2->write_dcd_command.param = DCD_COMMAND_PARAM;
+ set_dcd_param_v2(imxhdr, dcd_len, CMD_WRITE_DATA);
}
static void set_imx_hdr_v1(struct imx_header *imxhdr, uint32_t dcd_len,
@@ -266,12 +304,14 @@ static void set_hdr_func(void)
switch (imximage_version) {
case IMXIMAGE_V1:
set_dcd_val = set_dcd_val_v1;
+ set_dcd_param = NULL;
set_dcd_rst = set_dcd_rst_v1;
set_imx_hdr = set_imx_hdr_v1;
max_dcd_entries = MAX_HW_CFG_SIZE_V1;
break;
case IMXIMAGE_V2:
set_dcd_val = set_dcd_val_v2;
+ set_dcd_param = set_dcd_param_v2;
set_dcd_rst = set_dcd_rst_v2;
set_imx_hdr = set_imx_hdr_v2;
max_dcd_entries = MAX_HW_CFG_SIZE_V2;
@@ -396,8 +436,13 @@ static void parse_cfg_cmd(struct imx_header *imxhdr, int32_t cmd, char *token,
if (unlikely(cmd_ver_first != 1))
cmd_ver_first = 0;
break;
- case CMD_DATA:
+ case CMD_WRITE_DATA:
+ case CMD_WRITE_CLR_BIT:
+ case CMD_CHECK_BITS_SET:
+ case CMD_CHECK_BITS_CLR:
value = get_cfg_value(token, name, lineno);
+ if (set_dcd_param)
+ (*set_dcd_param)(imxhdr, dcd_len, cmd);
(*set_dcd_val)(imxhdr, name, lineno, fld, value, dcd_len);
if (unlikely(cmd_ver_first != 1))
cmd_ver_first = 0;
@@ -436,20 +481,30 @@ static void parse_cfg_fld(struct imx_header *imxhdr, int32_t *cmd,
break;
case CFG_REG_ADDRESS:
case CFG_REG_VALUE:
- if (*cmd != CMD_DATA)
- return;
-
- value = get_cfg_value(token, name, lineno);
- (*set_dcd_val)(imxhdr, name, lineno, fld, value, *dcd_len);
-
- if (fld == CFG_REG_VALUE) {
- (*dcd_len)++;
- if (*dcd_len > max_dcd_entries) {
- fprintf(stderr, "Error: %s[%d] -"
- "DCD table exceeds maximum size(%d)\n",
- name, lineno, max_dcd_entries);
- exit(EXIT_FAILURE);
+ switch(*cmd) {
+ case CMD_WRITE_DATA:
+ case CMD_WRITE_CLR_BIT:
+ case CMD_CHECK_BITS_SET:
+ case CMD_CHECK_BITS_CLR:
+
+ value = get_cfg_value(token, name, lineno);
+ if (set_dcd_param)
+ (*set_dcd_param)(imxhdr, *dcd_len, *cmd);
+ (*set_dcd_val)(imxhdr, name, lineno, fld, value,
+ *dcd_len);
+
+ if (fld == CFG_REG_VALUE) {
+ (*dcd_len)++;
+ if (*dcd_len > max_dcd_entries) {
+ fprintf(stderr, "Error: %s[%d] -"
+ "DCD table exceeds maximum size(%d)\n",
+ name, lineno, max_dcd_entries);
+ exit(EXIT_FAILURE);
+ }
}
+ break;
+ default:
+ break;
}
break;
default: