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authorShaohui Xie <Shaohui.Xie@freescale.com>2011-09-13 17:55:11 +0800
committerKumar Gala <galak@kernel.crashing.org>2011-10-03 08:30:02 -0500
commit44d50f0b54ef14534440bc5d789ec65240dfc0f8 (patch)
tree3abda67a24ea3aca853e69ef631d6837c6346329 /spl
parentba50fee6ae7e626bb2eda9d28403d7d3950f407a (diff)
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powerpc/p2041rdb: set sysclk according to status of physical switch SW1
P2041RDB supports 3 sysclk frequencies, it's selected by SW1[6~8], software need to read the SW1 status to decide what the sysclk needs. SW1[8~6] : frequency 0 0 1 : 83.3MHz 0 1 0 : 100MHz others: 66.667MHz Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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