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authorYe Li <ye.li@nxp.com>2016-11-14 16:33:29 +0800
committerYe Li <ye.li@nxp.com>2016-11-22 17:49:31 +0800
commit305b43f4f97dc3f1c6988a50c267af479bb2d89c (patch)
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parentc5f362dd97b1266328f3100752e6c757f6727b30 (diff)
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MLK-13450-5 mx7ulp: Add clock framework and functions
Add a clock framework to support SCG1/PCC2/PCC3 for A7 to support get/set clock source, divider, clock rate and parent source. Users need to include pcc.h to use the APIs to for peripherals clock. Each peripheral clock is defined in enum pcc_clk type. SCG relevants APIs are defined in scg.h which supports clock rate get, PLL/PFD enablement and settings, and all SCG clock initialization. User need use enum scg_clk to access each clock source. In clock.c, we initialize necessary clocks at u-boot s_init and implement the clock functions used by driver modules to operate clocks dynamically. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Shenwei Wang <shenwei.wang@nxp.com>
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