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authorLiu Ying <Ying.Liu@freescale.com>2014-02-24 16:49:34 +0800
committerLiu Ying <Ying.Liu@freescale.com>2014-02-26 09:55:11 +0800
commitef9c7998a2598305a751e68886d859dc9d898f17 (patch)
treef72d827f9df96220957954fed5f212623fd851d6 /snapshot.commit
parent7f789db44b3d5bcdf0aa4952f724701aa90e5fc1 (diff)
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ENGR00300374 video: ipu: wait for DP SF end irq when disabling sync BG flow
Instead of waiting for DC triple buffer to be cleared, this patch changes to wait for a relevant DP sync flow end irq when disabling sync BG flows. In this way, we align the implement to the FSL internal IPUv3 driver. After applying this patch, the uboot hang up issue at the arch_preboot_os stage on the MX6DL platforms is not observed any more. Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
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