diff options
author | Stefan Roese <sr@denx.de> | 2015-03-26 15:36:56 +0100 |
---|---|---|
committer | Luka Perkov <luka.perkov@sartura.hr> | 2015-07-23 10:38:44 +0200 |
commit | f1df9364459425abba75488a148ddd98fabf40d7 (patch) | |
tree | deddb8ec0e2a480bdd1637a9b1511fe9c19e7101 /scripts | |
parent | ff9112df8b643ad989e8673452c75e073f3c9ff3 (diff) | |
download | u-boot-imx-f1df9364459425abba75488a148ddd98fabf40d7.zip u-boot-imx-f1df9364459425abba75488a148ddd98fabf40d7.tar.gz u-boot-imx-f1df9364459425abba75488a148ddd98fabf40d7.tar.bz2 |
arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr
This patch adds the DDR3 setup and training code taken from the Marvell
U-Boot repository. This code used to be included as a binary (bin_hdr)
into the Armada A38x boot image. Not linked with the main U-Boot. With this
code addition and the serdes/PHY setup code, the Armada A38x support
in mainline U-Boot is finally self-contained. So the complete image
for booting can be built from mainline U-Boot. Without any additional
external inclusion.
Note:
This code has undergone many hours (days!) of coding-style cleanup and
refactoring. It still is not checkpatch clean though, I'm afraid. As the
factoring of the code has so many levels of indentation that many lines
are longer than 80 chars.
Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'scripts')
-rw-r--r-- | scripts/Makefile.spl | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/scripts/Makefile.spl b/scripts/Makefile.spl index 3c9a9a0..481ee5e 100644 --- a/scripts/Makefile.spl +++ b/scripts/Makefile.spl @@ -59,6 +59,7 @@ libs-$(CONFIG_SPL_I2C_SUPPORT) += drivers/i2c/ libs-$(CONFIG_SPL_GPIO_SUPPORT) += drivers/gpio/ libs-$(CONFIG_SPL_MMC_SUPPORT) += drivers/mmc/ libs-$(CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT) += drivers/ddr/fsl/ +libs-$(CONFIG_SYS_MVEBU_DDR_A38X) += drivers/ddr/marvell/a38x/ libs-$(CONFIG_SYS_MVEBU_DDR_AXP) += drivers/ddr/marvell/axp/ libs-$(CONFIG_SPL_SERIAL_SUPPORT) += drivers/serial/ libs-$(CONFIG_SPL_SPI_FLASH_SUPPORT) += drivers/mtd/spi/ |