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authorYe Li <ye.li@nxp.com>2016-11-24 10:36:51 +0800
committerRobby Cai <robby.cai@nxp.com>2017-04-19 19:21:00 +0800
commit568c9c9914863f20a2404c49db0b5ed7541a76ce (patch)
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parent9007dd86ea109d6634338b1752c045961da17dd3 (diff)
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MLK-13508-2 mx6sllarm2: Update DDR script to v2.3
DDR scripts are updated to fix DQS gating issue commonly for LPDDR2 and LPDDR3. That DQS sampling may have problem after enabling the SDE_0/SDE_1 in MDCTL. Changes: -Based on V2.2, move the "Read DQS Gating Disable" to the step after "MR setting", to avoid potential DDR initializaiton failures (especially in Plugin Mode). File: http://compass.freescale.net/livelink/livelink?func=ll&objid=235701297&objAction=browse&sort=name&viewType=1 Test: Passed stress test on 1 LPDDR2 ARM2 board and 1 LPDDR3 ARM2 board. Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit 8e0351e7d524a1d53b596710972e074487d9d1fe)
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